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Commit 848a0ccb by John Kessenich
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Merge branch 'greg-lunarg-flatten1'

parents b3cff2f2 8a3f7a12
Showing with 28 additions and 52 deletions
SPIRV/GlslangToSpv.cpp
...@@ -6086,6 +6086,8 @@ void GlslangToSpv(const glslang::TIntermediate& intermediate, std::vector<unsign ...@@ -6086,6 +6086,8 @@ void GlslangToSpv(const glslang::TIntermediate& intermediate, std::vector<unsign
}); });
optimizer.RegisterPass(CreateInlineExhaustivePass()); optimizer.RegisterPass(CreateInlineExhaustivePass());
optimizer.RegisterPass(CreateEliminateDeadFunctionsPass());
optimizer.RegisterPass(CreateScalarReplacementPass());
optimizer.RegisterPass(CreateLocalAccessChainConvertPass()); optimizer.RegisterPass(CreateLocalAccessChainConvertPass());
optimizer.RegisterPass(CreateLocalSingleBlockLoadStoreElimPass()); optimizer.RegisterPass(CreateLocalSingleBlockLoadStoreElimPass());
optimizer.RegisterPass(CreateLocalSingleStoreElimPass()); optimizer.RegisterPass(CreateLocalSingleStoreElimPass());
......
Test/baseLegalResults/hlsl.aliasOpaque.frag.out
...@@ -15,11 +15,9 @@ WARNING: AST will form illegal SPIR-V; need to transform to legalize ...@@ -15,11 +15,9 @@ WARNING: AST will form illegal SPIR-V; need to transform to legalize
MemberName 9(OS) 0 "ss" MemberName 9(OS) 0 "ss"
MemberName 9(OS) 1 "a" MemberName 9(OS) 1 "a"
MemberName 9(OS) 2 "tex" MemberName 9(OS) 2 "tex"
Name 44 "gss2"
Name 47 "gss" Name 47 "gss"
Name 51 "gtex" Name 51 "gtex"
Name 62 "@entryPointOutput" Name 62 "@entryPointOutput"
Decorate 44(gss2) DescriptorSet 0
Decorate 47(gss) DescriptorSet 0 Decorate 47(gss) DescriptorSet 0
Decorate 51(gtex) DescriptorSet 0 Decorate 51(gtex) DescriptorSet 0
Decorate 62(@entryPointOutput) Location 0 Decorate 62(@entryPointOutput) Location 0
...@@ -36,7 +34,6 @@ WARNING: AST will form illegal SPIR-V; need to transform to legalize ...@@ -36,7 +34,6 @@ WARNING: AST will form illegal SPIR-V; need to transform to legalize
36: 7(float) Constant 1050253722 36: 7(float) Constant 1050253722
37: 34(fvec2) ConstantComposite 35 36 37: 34(fvec2) ConstantComposite 35 36
43: TypePointer UniformConstant 6 43: TypePointer UniformConstant 6
44(gss2): 43(ptr) Variable UniformConstant
47(gss): 43(ptr) Variable UniformConstant 47(gss): 43(ptr) Variable UniformConstant
50: TypePointer UniformConstant 8 50: TypePointer UniformConstant 8
51(gtex): 50(ptr) Variable UniformConstant 51(gtex): 50(ptr) Variable UniformConstant
......
Test/baseLegalResults/hlsl.flattenSubset.frag.out
...@@ -2,7 +2,7 @@ hlsl.flattenSubset.frag ...@@ -2,7 +2,7 @@ hlsl.flattenSubset.frag
WARNING: AST will form illegal SPIR-V; need to transform to legalize WARNING: AST will form illegal SPIR-V; need to transform to legalize
// Module Version 10000 // Module Version 10000
// Generated by (magic number): 80003 // Generated by (magic number): 80003
// Id's are bound by 66 // Id's are bound by 72
Capability Shader Capability Shader
1: ExtInstImport "GLSL.std.450" 1: ExtInstImport "GLSL.std.450"
......
Test/baseLegalResults/hlsl.flattenSubset2.frag.out
...@@ -20,10 +20,8 @@ WARNING: AST will form illegal SPIR-V; need to transform to legalize ...@@ -20,10 +20,8 @@ WARNING: AST will form illegal SPIR-V; need to transform to legalize
Name 25 "B" Name 25 "B"
MemberName 25(B) 0 "n" MemberName 25(B) 0 "n"
MemberName 25(B) 1 "tex" MemberName 25(B) 1 "tex"
Name 36 "someTex"
Name 49 "vpos" Name 49 "vpos"
Name 52 "@entryPointOutput" Name 52 "@entryPointOutput"
Decorate 36(someTex) DescriptorSet 0
Decorate 49(vpos) Location 0 Decorate 49(vpos) Location 0
Decorate 52(@entryPointOutput) Location 0 Decorate 52(@entryPointOutput) Location 0
2: TypeVoid 2: TypeVoid
...@@ -34,8 +32,6 @@ WARNING: AST will form illegal SPIR-V; need to transform to legalize ...@@ -34,8 +32,6 @@ WARNING: AST will form illegal SPIR-V; need to transform to legalize
14(Nested): TypeStruct 6(float) 13 14(Nested): TypeStruct 6(float) 13
15(A): TypeStruct 14(Nested) 6(float) 15(A): TypeStruct 14(Nested) 6(float)
25(B): TypeStruct 14(Nested) 13 25(B): TypeStruct 14(Nested) 13
35: TypePointer UniformConstant 13
36(someTex): 35(ptr) Variable UniformConstant
43: 6(float) Constant 0 43: 6(float) Constant 0
44: 7(fvec4) ConstantComposite 43 43 43 43 44: 7(fvec4) ConstantComposite 43 43 43 43
48: TypePointer Input 7(fvec4) 48: TypePointer Input 7(fvec4)
......
Test/baseLegalResults/hlsl.partialFlattenLocal.vert.out
...@@ -2,7 +2,7 @@ hlsl.partialFlattenLocal.vert ...@@ -2,7 +2,7 @@ hlsl.partialFlattenLocal.vert
WARNING: AST will form illegal SPIR-V; need to transform to legalize WARNING: AST will form illegal SPIR-V; need to transform to legalize
// Module Version 10000 // Module Version 10000
// Generated by (magic number): 80003 // Generated by (magic number): 80003
// Id's are bound by 132 // Id's are bound by 165
Capability Shader Capability Shader
1: ExtInstImport "GLSL.std.450" 1: ExtInstImport "GLSL.std.450"
...@@ -16,10 +16,8 @@ WARNING: AST will form illegal SPIR-V; need to transform to legalize ...@@ -16,10 +16,8 @@ WARNING: AST will form illegal SPIR-V; need to transform to legalize
MemberName 22(Packed) 2 "uv" MemberName 22(Packed) 2 "uv"
MemberName 22(Packed) 3 "x" MemberName 22(Packed) 3 "x"
MemberName 22(Packed) 4 "n" MemberName 22(Packed) 4 "n"
Name 27 "tex"
Name 83 "pos" Name 83 "pos"
Name 86 "@entryPointOutput" Name 86 "@entryPointOutput"
Decorate 27(tex) DescriptorSet 0
Decorate 83(pos) Location 0 Decorate 83(pos) Location 0
Decorate 86(@entryPointOutput) BuiltIn Position Decorate 86(@entryPointOutput) BuiltIn Position
2: TypeVoid 2: TypeVoid
...@@ -36,72 +34,59 @@ WARNING: AST will form illegal SPIR-V; need to transform to legalize ...@@ -36,72 +34,59 @@ WARNING: AST will form illegal SPIR-V; need to transform to legalize
20: TypeArray 18(fvec2) 19 20: TypeArray 18(fvec2) 19
21: TypeInt 32 1 21: TypeInt 32 1
22(Packed): TypeStruct 13 17 20 6(float) 21(int) 22(Packed): TypeStruct 13 17 20 6(float) 21(int)
23: TypePointer Function 22(Packed)
25: 21(int) Constant 0 25: 21(int) Constant 0
26: TypePointer UniformConstant 13
27(tex): 26(ptr) Variable UniformConstant
29: TypePointer Function 13
31: 21(int) Constant 1 31: 21(int) Constant 1
32: 6(float) Constant 0 32: 6(float) Constant 0
33: 14(fvec3) ConstantComposite 32 32 32 33: 14(fvec3) ConstantComposite 32 32 32
34: TypePointer Function 14(fvec3) 34: TypePointer Function 14(fvec3)
36: 21(int) Constant 2
37: 6(float) Constant 1065353216 37: 6(float) Constant 1065353216
38: 18(fvec2) ConstantComposite 32 37 38: 18(fvec2) ConstantComposite 32 37
39: TypePointer Function 18(fvec2) 39: TypePointer Function 18(fvec2)
41: 21(int) Constant 3
42: TypePointer Function 6(float)
44: 21(int) Constant 4
45: TypePointer Function 21(int)
54: TypeBool 54: TypeBool
82: TypePointer Input 7(fvec4) 82: TypePointer Input 7(fvec4)
83(pos): 82(ptr) Variable Input 83(pos): 82(ptr) Variable Input
85: TypePointer Output 7(fvec4) 85: TypePointer Output 7(fvec4)
86(@entryPointOutput): 85(ptr) Variable Output 86(@entryPointOutput): 85(ptr) Variable Output
130: TypePointer Function 17
132: TypePointer Function 20
4(main): 2 Function None 3 4(main): 2 Function None 3
5: Label 5: Label
90: 23(ptr) Variable Function 133: 132(ptr) Variable Function
131: 130(ptr) Variable Function
84: 7(fvec4) Load 83(pos) 84: 7(fvec4) Load 83(pos)
94: 13 Load 27(tex) 136: 34(ptr) AccessChain 131 25
95: 29(ptr) AccessChain 90 25 Store 136 33
Store 95 94 137: 39(ptr) AccessChain 133 25
96: 34(ptr) AccessChain 90 31 25 Store 137 38
Store 96 33
97: 39(ptr) AccessChain 90 36 25
Store 97 38
98: 42(ptr) AccessChain 90 41
Store 98 37
99: 45(ptr) AccessChain 90 44
Store 99 41
Branch 100 Branch 100
100: Label 100: Label
131: 21(int) Phi 25 5 119 102 164: 21(int) Phi 25 5 119 102
LoopMerge 101 102 None LoopMerge 101 102 None
Branch 103 Branch 103
103: Label 103: Label
105: 54(bool) SLessThan 131 31 105: 54(bool) SLessThan 164 31
BranchConditional 105 106 101 BranchConditional 105 106 101
106: Label 106: Label
109: 39(ptr) AccessChain 90 36 131 138: 39(ptr) AccessChain 133 164
110: 18(fvec2) Load 109 110: 18(fvec2) Load 138
111: 34(ptr) AccessChain 90 31 131 139: 34(ptr) AccessChain 131 164
112: 14(fvec3) Load 111 112: 14(fvec3) Load 139
113: 18(fvec2) VectorShuffle 112 112 0 1 113: 18(fvec2) VectorShuffle 112 112 0 1
114: 18(fvec2) FAdd 113 110 114: 18(fvec2) FAdd 113 110
115: 34(ptr) AccessChain 90 31 131 140: 34(ptr) AccessChain 131 164
116: 14(fvec3) Load 115 116: 14(fvec3) Load 140
117: 14(fvec3) VectorShuffle 116 114 3 4 2 117: 14(fvec3) VectorShuffle 116 114 3 4 2
Store 115 117 Store 140 117
Branch 102 Branch 102
102: Label 102: Label
119: 21(int) IAdd 131 31 119: 21(int) IAdd 164 31
Branch 100 Branch 100
101: Label 101: Label
120: 22(Packed) Load 90 142: 17 Load 131
130: 14(fvec3) CompositeExtract 120 1 0 161: 14(fvec3) CompositeExtract 142 0
124: 6(float) CompositeExtract 130 0 124: 6(float) CompositeExtract 161 0
125: 6(float) CompositeExtract 130 1 125: 6(float) CompositeExtract 161 1
126: 6(float) CompositeExtract 130 2 126: 6(float) CompositeExtract 161 2
127: 7(fvec4) CompositeConstruct 124 125 126 32 127: 7(fvec4) CompositeConstruct 124 125 126 32
128: 7(fvec4) FAdd 84 127 128: 7(fvec4) FAdd 84 127
Store 86(@entryPointOutput) 128 Store 86(@entryPointOutput) 128
......
Test/baseLegalResults/hlsl.partialFlattenMixed.vert.out
...@@ -2,7 +2,7 @@ hlsl.partialFlattenMixed.vert ...@@ -2,7 +2,7 @@ hlsl.partialFlattenMixed.vert
WARNING: AST will form illegal SPIR-V; need to transform to legalize WARNING: AST will form illegal SPIR-V; need to transform to legalize
// Module Version 10000 // Module Version 10000
// Generated by (magic number): 80003 // Generated by (magic number): 80003
// Id's are bound by 36 // Id's are bound by 45
Capability Shader Capability Shader
1: ExtInstImport "GLSL.std.450" 1: ExtInstImport "GLSL.std.450"
...@@ -14,10 +14,8 @@ WARNING: AST will form illegal SPIR-V; need to transform to legalize ...@@ -14,10 +14,8 @@ WARNING: AST will form illegal SPIR-V; need to transform to legalize
MemberName 18(Packed) 0 "a" MemberName 18(Packed) 0 "a"
MemberName 18(Packed) 1 "membTex" MemberName 18(Packed) 1 "membTex"
MemberName 18(Packed) 2 "b" MemberName 18(Packed) 2 "b"
Name 23 "tex"
Name 32 "pos" Name 32 "pos"
Name 35 "@entryPointOutput" Name 35 "@entryPointOutput"
Decorate 23(tex) DescriptorSet 0
Decorate 32(pos) Location 0 Decorate 32(pos) Location 0
Decorate 35(@entryPointOutput) BuiltIn Position Decorate 35(@entryPointOutput) BuiltIn Position
2: TypeVoid 2: TypeVoid
...@@ -30,8 +28,6 @@ WARNING: AST will form illegal SPIR-V; need to transform to legalize ...@@ -30,8 +28,6 @@ WARNING: AST will form illegal SPIR-V; need to transform to legalize
16: 15(int) Constant 2 16: 15(int) Constant 2
17: TypeArray 14 16 17: TypeArray 14 16
18(Packed): TypeStruct 13(int) 17 13(int) 18(Packed): TypeStruct 13(int) 17 13(int)
22: TypePointer UniformConstant 17
23(tex): 22(ptr) Variable UniformConstant
31: TypePointer Input 7(fvec4) 31: TypePointer Input 7(fvec4)
32(pos): 31(ptr) Variable Input 32(pos): 31(ptr) Variable Input
34: TypePointer Output 7(fvec4) 34: TypePointer Output 7(fvec4)
......
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