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swiftshader
Commit 6106df80 by Jim Stichnoth
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Subzero: Separate "\t" from "opcode" in asm emission.

Instead of output like this: Str << "\tmov\t" << ... we prefer to use string concatenation: Str << "\t" "mov\t" << ... That way, "git grep -w mov" can be used for more precise pattern matching. BUG= none R=kschimpf@google.com Review URL: https://codereview.chromium.org/1523873003 .
parent e398428c
Showing with 136 additions and 87 deletions
src/IceAssemblerARM32.cpp
...@@ -453,7 +453,8 @@ size_t MoveRelocatableFixup::emit(GlobalContext *Ctx, ...@@ -453,7 +453,8 @@ size_t MoveRelocatableFixup::emit(GlobalContext *Ctx,
return InstARM32::InstSize; return InstARM32::InstSize;
Ostream &Str = Ctx->getStrEmit(); Ostream &Str = Ctx->getStrEmit();
IValueT Inst = Asm.load<IValueT>(position()); IValueT Inst = Asm.load<IValueT>(position());
Str << "\tmov" << (kind() == llvm::ELF::R_ARM_MOVW_ABS_NC ? "w" : "t") << "\t" Str << "\t"
"mov" << (kind() == llvm::ELF::R_ARM_MOVW_ABS_NC ? "w" : "t") << "\t"
<< RegARM32::RegNames[(Inst >> kRdShift) & 0xF] << RegARM32::RegNames[(Inst >> kRdShift) & 0xF]
<< ", #:" << (kind() == llvm::ELF::R_ARM_MOVW_ABS_NC ? "lower" : "upper") << ", #:" << (kind() == llvm::ELF::R_ARM_MOVW_ABS_NC ? "lower" : "upper")
<< "16:" << symbol(Ctx) << "\t@ .word " << "16:" << symbol(Ctx) << "\t@ .word "
...@@ -479,7 +480,7 @@ size_t BlRelocatableFixup::emit(GlobalContext *Ctx, ...@@ -479,7 +480,7 @@ size_t BlRelocatableFixup::emit(GlobalContext *Ctx,
Ostream &Str = Ctx->getStrEmit(); Ostream &Str = Ctx->getStrEmit();
IValueT Inst = Asm.load<IValueT>(position()); IValueT Inst = Asm.load<IValueT>(position());
Str << "\t" Str << "\t"
<< "bl\t" << symbol(Ctx) << "\t@ .word " "bl\t" << symbol(Ctx) << "\t@ .word "
<< llvm::format_hex_no_prefix(Inst, 8) << "\n"; << llvm::format_hex_no_prefix(Inst, 8) << "\n";
return InstARM32::InstSize; return InstARM32::InstSize;
} }
......
src/IceInst.cpp
...@@ -854,7 +854,8 @@ void InstBundleLock::emit(const Cfg *Func) const { ...@@ -854,7 +854,8 @@ void InstBundleLock::emit(const Cfg *Func) const {
case Opt_None: case Opt_None:
break; break;
case Opt_AlignToEnd: case Opt_AlignToEnd:
Str << "\talign_to_end"; Str << "\t"
"align_to_end";
break; break;
} }
Str << "\n"; Str << "\n";
......
src/IceInstARM32.cpp
...@@ -818,7 +818,7 @@ void InstARM32Mov::emitMultiDestSingleSource(const Cfg *Func) const { ...@@ -818,7 +818,7 @@ void InstARM32Mov::emitMultiDestSingleSource(const Cfg *Func) const {
assert(llvm::isa<Variable>(Src) && Src->hasReg()); assert(llvm::isa<Variable>(Src) && Src->hasReg());
Str << "\t" Str << "\t"
<< "vmov" << getPredicate() << "\t"; "vmov" << getPredicate() << "\t";
DestLo->emit(Func); DestLo->emit(Func);
Str << ", "; Str << ", ";
DestHi->emit(Func); DestHi->emit(Func);
...@@ -840,7 +840,7 @@ void InstARM32Mov::emitSingleDestMultiSource(const Cfg *Func) const { ...@@ -840,7 +840,7 @@ void InstARM32Mov::emitSingleDestMultiSource(const Cfg *Func) const {
assert(getSrcSize() == 2); assert(getSrcSize() == 2);
Str << "\t" Str << "\t"
<< "vmov" << getPredicate() << "\t"; "vmov" << getPredicate() << "\t";
Dest->emit(Func); Dest->emit(Func);
Str << ", "; Str << ", ";
SrcLo->emit(Func); SrcLo->emit(Func);
...@@ -981,7 +981,7 @@ void InstARM32Br::emit(const Cfg *Func) const { ...@@ -981,7 +981,7 @@ void InstARM32Br::emit(const Cfg *Func) const {
return; return;
Ostream &Str = Func->getContext()->getStrEmit(); Ostream &Str = Func->getContext()->getStrEmit();
Str << "\t" Str << "\t"
<< "b" << getPredicate() << "\t"; "b" << getPredicate() << "\t";
if (Label) { if (Label) {
Str << Label->getName(Func); Str << Label->getName(Func);
} else { } else {
...@@ -1052,13 +1052,13 @@ void InstARM32Call::emit(const Cfg *Func) const { ...@@ -1052,13 +1052,13 @@ void InstARM32Call::emit(const Cfg *Func) const {
// Calls only have 24-bits, but the linker should insert veneers to extend // Calls only have 24-bits, but the linker should insert veneers to extend
// the range if needed. // the range if needed.
Str << "\t" Str << "\t"
<< "bl" "bl"
<< "\t"; "\t";
CallTarget->emitWithoutPrefix(Func->getTarget()); CallTarget->emitWithoutPrefix(Func->getTarget());
} else { } else {
Str << "\t" Str << "\t"
<< "blx" "blx"
<< "\t"; "\t";
getCallTarget()->emit(Func); getCallTarget()->emit(Func);
} }
} }
...@@ -1496,8 +1496,8 @@ void InstARM32Ret::emit(const Cfg *Func) const { ...@@ -1496,8 +1496,8 @@ void InstARM32Ret::emit(const Cfg *Func) const {
assert(LR->getRegNum() == RegARM32::Reg_lr); assert(LR->getRegNum() == RegARM32::Reg_lr);
Ostream &Str = Func->getContext()->getStrEmit(); Ostream &Str = Func->getContext()->getStrEmit();
Str << "\t" Str << "\t"
<< "bx" "bx"
<< "\t"; "\t";
LR->emit(Func); LR->emit(Func);
} }
...@@ -1625,7 +1625,7 @@ void InstARM32Umull::emit(const Cfg *Func) const { ...@@ -1625,7 +1625,7 @@ void InstARM32Umull::emit(const Cfg *Func) const {
assert(getSrcSize() == 2); assert(getSrcSize() == 2);
assert(getDest()->hasReg()); assert(getDest()->hasReg());
Str << "\t" Str << "\t"
<< "umull" << getPredicate() << "\t"; "umull" << getPredicate() << "\t";
getDest()->emit(Func); getDest()->emit(Func);
Str << ", "; Str << ", ";
DestHi->emit(Func); DestHi->emit(Func);
...@@ -1689,7 +1689,7 @@ void InstARM32Vcvt::emit(const Cfg *Func) const { ...@@ -1689,7 +1689,7 @@ void InstARM32Vcvt::emit(const Cfg *Func) const {
assert(getSrcSize() == 1); assert(getSrcSize() == 1);
assert(getDest()->hasReg()); assert(getDest()->hasReg());
Str << "\t" Str << "\t"
<< "vcvt" << getPredicate() << vcvtVariantSuffix(Variant) << "\t"; "vcvt" << getPredicate() << vcvtVariantSuffix(Variant) << "\t";
getDest()->emit(Func); getDest()->emit(Func);
Str << ", "; Str << ", ";
getSrc(0)->emit(Func); getSrc(0)->emit(Func);
...@@ -1790,7 +1790,8 @@ void InstARM32Dmb::emitIAS(const Cfg *Func) const { ...@@ -1790,7 +1790,8 @@ void InstARM32Dmb::emitIAS(const Cfg *Func) const {
void InstARM32Dmb::dump(const Cfg *Func) const { void InstARM32Dmb::dump(const Cfg *Func) const {
if (!BuildDefs::dump()) if (!BuildDefs::dump())
return; return;
Func->getContext()->getStrDump() << "dmb\tsy"; Func->getContext()->getStrDump() << "dmb\t"
"sy";
} }
void OperandARM32Mem::emit(const Cfg *Func) const { void OperandARM32Mem::emit(const Cfg *Func) const {
......
src/IceInstMIPS32.cpp
...@@ -139,8 +139,8 @@ void InstMIPS32Ret::emit(const Cfg *Func) const { ...@@ -139,8 +139,8 @@ void InstMIPS32Ret::emit(const Cfg *Func) const {
assert(RA->getRegNum() == RegMIPS32::Reg_RA); assert(RA->getRegNum() == RegMIPS32::Reg_RA);
Ostream &Str = Func->getContext()->getStrEmit(); Ostream &Str = Func->getContext()->getStrEmit();
Str << "\t" Str << "\t"
<< "jr" "jr"
<< "\t"; "\t";
RA->emit(Func); RA->emit(Func);
} }
...@@ -258,8 +258,8 @@ void InstMIPS32Mov::emitSingleDestSingleSource(const Cfg *Func) const { ...@@ -258,8 +258,8 @@ void InstMIPS32Mov::emitSingleDestSingleSource(const Cfg *Func) const {
Str << "lw"; Str << "lw";
} else { } else {
if (S && S->hasReg()) { if (S && S->hasReg()) {
Str << "sw"; Str << "sw"
Str << "\t"; "\t";
getSrc(0)->emit(Func); getSrc(0)->emit(Func);
Str << ", "; Str << ", ";
getDest()->emit(Func); getDest()->emit(Func);
......
src/IceInstX86BaseImpl.h
...@@ -436,7 +436,8 @@ template <class Machine> void InstX86Br<Machine>::emit(const Cfg *Func) const { ...@@ -436,7 +436,8 @@ template <class Machine> void InstX86Br<Machine>::emit(const Cfg *Func) const {
} else { } else {
Str << "\t" << getTargetTrue()->getAsmName(); Str << "\t" << getTargetTrue()->getAsmName();
if (getTargetFalse()) { if (getTargetFalse()) {
Str << "\n\tjmp\t" << getTargetFalse()->getAsmName(); Str << "\n\t"
"jmp\t" << getTargetFalse()->getAsmName();
} }
} }
} }
...@@ -503,7 +504,8 @@ template <class Machine> void InstX86Jmp<Machine>::emit(const Cfg *Func) const { ...@@ -503,7 +504,8 @@ template <class Machine> void InstX86Jmp<Machine>::emit(const Cfg *Func) const {
return; return;
Ostream &Str = Func->getContext()->getStrEmit(); Ostream &Str = Func->getContext()->getStrEmit();
assert(this->getSrcSize() == 1); assert(this->getSrcSize() == 1);
Str << "\tjmp\t*"; Str << "\t"
"jmp\t*";
getJmpTarget()->emit(Func); getJmpTarget()->emit(Func);
} }
...@@ -560,7 +562,8 @@ void InstX86Call<Machine>::emit(const Cfg *Func) const { ...@@ -560,7 +562,8 @@ void InstX86Call<Machine>::emit(const Cfg *Func) const {
return; return;
Ostream &Str = Func->getContext()->getStrEmit(); Ostream &Str = Func->getContext()->getStrEmit();
assert(this->getSrcSize() == 1); assert(this->getSrcSize() == 1);
Str << "\tcall\t"; Str << "\t"
"call\t";
Operand *CallTarget = getCallTarget(); Operand *CallTarget = getCallTarget();
auto *Target = InstX86Base<Machine>::getTarget(Func); auto *Target = InstX86Base<Machine>::getTarget(Func);
if (const auto *CI = llvm::dyn_cast<ConstantInteger32>(CallTarget)) { if (const auto *CI = llvm::dyn_cast<ConstantInteger32>(CallTarget)) {
...@@ -997,7 +1000,8 @@ void InstX86Sqrtss<Machine>::emit(const Cfg *Func) const { ...@@ -997,7 +1000,8 @@ void InstX86Sqrtss<Machine>::emit(const Cfg *Func) const {
assert(this->getSrcSize() == 1); assert(this->getSrcSize() == 1);
Type Ty = this->getSrc(0)->getType(); Type Ty = this->getSrc(0)->getType();
assert(isScalarFloatingType(Ty)); assert(isScalarFloatingType(Ty));
Str << "\tsqrt" << InstX86Base<Machine>::Traits::TypeAttributes[Ty].SdSsString Str << "\t"
"sqrt" << InstX86Base<Machine>::Traits::TypeAttributes[Ty].SdSsString
<< "\t"; << "\t";
this->getSrc(0)->emit(Func); this->getSrc(0)->emit(Func);
Str << ", "; Str << ", ";
...@@ -1326,10 +1330,12 @@ void InstX86Imul<Machine>::emit(const Cfg *Func) const { ...@@ -1326,10 +1330,12 @@ void InstX86Imul<Machine>::emit(const Cfg *Func) const {
(void)Src0Var; (void)Src0Var;
assert(Src0Var->getRegNum() == assert(Src0Var->getRegNum() ==
InstX86Base<Machine>::Traits::RegisterSet::Reg_al); InstX86Base<Machine>::Traits::RegisterSet::Reg_al);
Str << "\timulb\t"; Str << "\t"
"imulb\t";
this->getSrc(1)->emit(Func); this->getSrc(1)->emit(Func);
} else if (llvm::isa<Constant>(this->getSrc(1))) { } else if (llvm::isa<Constant>(this->getSrc(1))) {
Str << "\timul" << this->getWidthString(Dest->getType()) << "\t"; Str << "\t"
"imul" << this->getWidthString(Dest->getType()) << "\t";
this->getSrc(1)->emit(Func); this->getSrc(1)->emit(Func);
Str << ", "; Str << ", ";
this->getSrc(0)->emit(Func); this->getSrc(0)->emit(Func);
...@@ -1379,7 +1385,8 @@ void InstX86ImulImm<Machine>::emit(const Cfg *Func) const { ...@@ -1379,7 +1385,8 @@ void InstX86ImulImm<Machine>::emit(const Cfg *Func) const {
Variable *Dest = this->getDest(); Variable *Dest = this->getDest();
assert(Dest->getType() == IceType_i16 || Dest->getType() == IceType_i32); assert(Dest->getType() == IceType_i16 || Dest->getType() == IceType_i32);
assert(llvm::isa<Constant>(this->getSrc(1))); assert(llvm::isa<Constant>(this->getSrc(1)));
Str << "\timul" << this->getWidthString(Dest->getType()) << "\t"; Str << "\t"
"imul" << this->getWidthString(Dest->getType()) << "\t";
this->getSrc(1)->emit(Func); this->getSrc(1)->emit(Func);
Str << ", "; Str << ", ";
this->getSrc(0)->emit(Func); this->getSrc(0)->emit(Func);
...@@ -1449,24 +1456,24 @@ void InstX86Cbwdq<Machine>::emit(const Cfg *Func) const { ...@@ -1449,24 +1456,24 @@ void InstX86Cbwdq<Machine>::emit(const Cfg *Func) const {
assert(DestReg == InstX86Base<Machine>::Traits::RegisterSet::Reg_ax || assert(DestReg == InstX86Base<Machine>::Traits::RegisterSet::Reg_ax ||
DestReg == InstX86Base<Machine>::Traits::RegisterSet::Reg_ah); DestReg == InstX86Base<Machine>::Traits::RegisterSet::Reg_ah);
Str << "\t" Str << "\t"
<< "cbtw"; "cbtw";
break; break;
case IceType_i16: case IceType_i16:
assert(SrcReg == InstX86Base<Machine>::Traits::RegisterSet::Reg_ax); assert(SrcReg == InstX86Base<Machine>::Traits::RegisterSet::Reg_ax);
assert(DestReg == InstX86Base<Machine>::Traits::RegisterSet::Reg_dx); assert(DestReg == InstX86Base<Machine>::Traits::RegisterSet::Reg_dx);
Str << "\t" Str << "\t"
<< "cwtd"; "cwtd";
break; break;
case IceType_i32: case IceType_i32:
assert(SrcReg == InstX86Base<Machine>::Traits::RegisterSet::Reg_eax); assert(SrcReg == InstX86Base<Machine>::Traits::RegisterSet::Reg_eax);
assert(DestReg == InstX86Base<Machine>::Traits::RegisterSet::Reg_edx); assert(DestReg == InstX86Base<Machine>::Traits::RegisterSet::Reg_edx);
Str << "\t" Str << "\t"
<< "cltd"; "cltd";
break; break;
case IceType_i64: case IceType_i64:
assert(DestReg == InstX86Base<Machine>::Traits::RegisterSet::Reg_edx); assert(DestReg == InstX86Base<Machine>::Traits::RegisterSet::Reg_edx);
Str << "\t" Str << "\t"
<< "cdto"; "cdto";
break; break;
} }
} }
...@@ -1519,7 +1526,8 @@ template <class Machine> void InstX86Mul<Machine>::emit(const Cfg *Func) const { ...@@ -1519,7 +1526,8 @@ template <class Machine> void InstX86Mul<Machine>::emit(const Cfg *Func) const {
assert( assert(
this->getDest()->getRegNum() == this->getDest()->getRegNum() ==
InstX86Base<Machine>::Traits::RegisterSet::Reg_eax); // TODO: allow edx? InstX86Base<Machine>::Traits::RegisterSet::Reg_eax); // TODO: allow edx?
Str << "\tmul" << this->getWidthString(this->getDest()->getType()) << "\t"; Str << "\t"
"mul" << this->getWidthString(this->getDest()->getType()) << "\t";
this->getSrc(1)->emit(Func); this->getSrc(1)->emit(Func);
} }
...@@ -1557,7 +1565,8 @@ void InstX86Shld<Machine>::emit(const Cfg *Func) const { ...@@ -1557,7 +1565,8 @@ void InstX86Shld<Machine>::emit(const Cfg *Func) const {
Variable *Dest = this->getDest(); Variable *Dest = this->getDest();
assert(this->getSrcSize() == 3); assert(this->getSrcSize() == 3);
assert(Dest == this->getSrc(0)); assert(Dest == this->getSrc(0));
Str << "\tshld" << this->getWidthString(Dest->getType()) << "\t"; Str << "\t"
"shld" << this->getWidthString(Dest->getType()) << "\t";
this->getSrc(2)->emit(Func); this->getSrc(2)->emit(Func);
Str << ", "; Str << ", ";
this->getSrc(1)->emit(Func); this->getSrc(1)->emit(Func);
...@@ -1597,7 +1606,8 @@ void InstX86Shrd<Machine>::emit(const Cfg *Func) const { ...@@ -1597,7 +1606,8 @@ void InstX86Shrd<Machine>::emit(const Cfg *Func) const {
Variable *Dest = this->getDest(); Variable *Dest = this->getDest();
assert(this->getSrcSize() == 3); assert(this->getSrcSize() == 3);
assert(Dest == this->getSrc(0)); assert(Dest == this->getSrc(0));
Str << "\tshrd" << this->getWidthString(Dest->getType()) << "\t"; Str << "\t"
"shrd" << this->getWidthString(Dest->getType()) << "\t";
this->getSrc(2)->emit(Func); this->getSrc(2)->emit(Func);
Str << ", "; Str << ", ";
this->getSrc(1)->emit(Func); this->getSrc(1)->emit(Func);
...@@ -1703,8 +1713,8 @@ void InstX86Cmpps<Machine>::emit(const Cfg *Func) const { ...@@ -1703,8 +1713,8 @@ void InstX86Cmpps<Machine>::emit(const Cfg *Func) const {
assert(this->getSrcSize() == 2); assert(this->getSrcSize() == 2);
assert(Condition < InstX86Base<Machine>::Traits::Cond::Cmpps_Invalid); assert(Condition < InstX86Base<Machine>::Traits::Cond::Cmpps_Invalid);
Type DestTy = this->Dest->getType(); Type DestTy = this->Dest->getType();
Str << "\t"; Str << "\t"
Str << "cmp" "cmp"
<< InstX86Base<Machine>::Traits::InstCmppsAttributes[Condition].EmitString << InstX86Base<Machine>::Traits::InstCmppsAttributes[Condition].EmitString
<< InstX86Base<Machine>::Traits::TypeAttributes[DestTy].PdPsString << InstX86Base<Machine>::Traits::TypeAttributes[DestTy].PdPsString
<< "\t"; << "\t";
...@@ -1750,7 +1760,7 @@ void InstX86Cmpps<Machine>::dump(const Cfg *Func) const { ...@@ -1750,7 +1760,7 @@ void InstX86Cmpps<Machine>::dump(const Cfg *Func) const {
Str << " = cmp" Str << " = cmp"
<< InstX86Base<Machine>::Traits::InstCmppsAttributes[Condition].EmitString << InstX86Base<Machine>::Traits::InstCmppsAttributes[Condition].EmitString
<< "ps" << "ps"
<< "\t"; "\t";
this->dumpSources(Func); this->dumpSources(Func);
} }
...@@ -1761,10 +1771,11 @@ void InstX86Cmpxchg<Machine>::emit(const Cfg *Func) const { ...@@ -1761,10 +1771,11 @@ void InstX86Cmpxchg<Machine>::emit(const Cfg *Func) const {
Ostream &Str = Func->getContext()->getStrEmit(); Ostream &Str = Func->getContext()->getStrEmit();
assert(this->getSrcSize() == 3); assert(this->getSrcSize() == 3);
if (this->Locked) { if (this->Locked) {
Str << "\tlock"; Str << "\t"
"lock";
} }
Str << "\tcmpxchg" << this->getWidthString(this->getSrc(0)->getType()) Str << "\t"
<< "\t"; "cmpxchg" << this->getWidthString(this->getSrc(0)->getType()) << "\t";
this->getSrc(2)->emit(Func); this->getSrc(2)->emit(Func);
Str << ", "; Str << ", ";
this->getSrc(0)->emit(Func); this->getSrc(0)->emit(Func);
...@@ -1810,9 +1821,11 @@ void InstX86Cmpxchg8b<Machine>::emit(const Cfg *Func) const { ...@@ -1810,9 +1821,11 @@ void InstX86Cmpxchg8b<Machine>::emit(const Cfg *Func) const {
Ostream &Str = Func->getContext()->getStrEmit(); Ostream &Str = Func->getContext()->getStrEmit();
assert(this->getSrcSize() == 5); assert(this->getSrcSize() == 5);
if (this->Locked) { if (this->Locked) {
Str << "\tlock"; Str << "\t"
"lock";
} }
Str << "\tcmpxchg8b\t"; Str << "\t"
"cmpxchg8b\t";
this->getSrc(0)->emit(Func); this->getSrc(0)->emit(Func);
} }
...@@ -1849,7 +1862,8 @@ template <class Machine> void InstX86Cvt<Machine>::emit(const Cfg *Func) const { ...@@ -1849,7 +1862,8 @@ template <class Machine> void InstX86Cvt<Machine>::emit(const Cfg *Func) const {
return; return;
Ostream &Str = Func->getContext()->getStrEmit(); Ostream &Str = Func->getContext()->getStrEmit();
assert(this->getSrcSize() == 1); assert(this->getSrcSize() == 1);
Str << "\tcvt"; Str << "\t"
"cvt";
if (isTruncating()) if (isTruncating())
Str << "t"; Str << "t";
Str << InstX86Base<Machine>::Traits::TypeAttributes[this->getSrc(0) Str << InstX86Base<Machine>::Traits::TypeAttributes[this->getSrc(0)
...@@ -1974,7 +1988,8 @@ void InstX86Icmp<Machine>::emit(const Cfg *Func) const { ...@@ -1974,7 +1988,8 @@ void InstX86Icmp<Machine>::emit(const Cfg *Func) const {
return; return;
Ostream &Str = Func->getContext()->getStrEmit(); Ostream &Str = Func->getContext()->getStrEmit();
assert(this->getSrcSize() == 2); assert(this->getSrcSize() == 2);
Str << "\tcmp" << this->getWidthString(this->getSrc(0)->getType()) << "\t"; Str << "\t"
"cmp" << this->getWidthString(this->getSrc(0)->getType()) << "\t";
this->getSrc(1)->emit(Func); this->getSrc(1)->emit(Func);
Str << ", "; Str << ", ";
this->getSrc(0)->emit(Func); this->getSrc(0)->emit(Func);
...@@ -2018,7 +2033,8 @@ void InstX86Ucomiss<Machine>::emit(const Cfg *Func) const { ...@@ -2018,7 +2033,8 @@ void InstX86Ucomiss<Machine>::emit(const Cfg *Func) const {
return; return;
Ostream &Str = Func->getContext()->getStrEmit(); Ostream &Str = Func->getContext()->getStrEmit();
assert(this->getSrcSize() == 2); assert(this->getSrcSize() == 2);
Str << "\tucomi" Str << "\t"
"ucomi"
<< InstX86Base<Machine>::Traits::TypeAttributes[this->getSrc(0) << InstX86Base<Machine>::Traits::TypeAttributes[this->getSrc(0)
->getType()] ->getType()]
.SdSsString << "\t"; .SdSsString << "\t";
...@@ -2055,7 +2071,8 @@ template <class Machine> void InstX86UD2<Machine>::emit(const Cfg *Func) const { ...@@ -2055,7 +2071,8 @@ template <class Machine> void InstX86UD2<Machine>::emit(const Cfg *Func) const {
return; return;
Ostream &Str = Func->getContext()->getStrEmit(); Ostream &Str = Func->getContext()->getStrEmit();
assert(this->getSrcSize() == 0); assert(this->getSrcSize() == 0);
Str << "\tud2"; Str << "\t"
"ud2";
} }
template <class Machine> template <class Machine>
...@@ -2078,7 +2095,8 @@ void InstX86Test<Machine>::emit(const Cfg *Func) const { ...@@ -2078,7 +2095,8 @@ void InstX86Test<Machine>::emit(const Cfg *Func) const {
return; return;
Ostream &Str = Func->getContext()->getStrEmit(); Ostream &Str = Func->getContext()->getStrEmit();
assert(this->getSrcSize() == 2); assert(this->getSrcSize() == 2);
Str << "\ttest" << this->getWidthString(this->getSrc(0)->getType()) << "\t"; Str << "\t"
"test" << this->getWidthString(this->getSrc(0)->getType()) << "\t";
this->getSrc(1)->emit(Func); this->getSrc(1)->emit(Func);
Str << ", "; Str << ", ";
this->getSrc(0)->emit(Func); this->getSrc(0)->emit(Func);
...@@ -2122,7 +2140,8 @@ void InstX86Mfence<Machine>::emit(const Cfg *Func) const { ...@@ -2122,7 +2140,8 @@ void InstX86Mfence<Machine>::emit(const Cfg *Func) const {
return; return;
Ostream &Str = Func->getContext()->getStrEmit(); Ostream &Str = Func->getContext()->getStrEmit();
assert(this->getSrcSize() == 0); assert(this->getSrcSize() == 0);
Str << "\tmfence"; Str << "\t"
"mfence";
} }
template <class Machine> template <class Machine>
...@@ -2147,7 +2166,8 @@ void InstX86Store<Machine>::emit(const Cfg *Func) const { ...@@ -2147,7 +2166,8 @@ void InstX86Store<Machine>::emit(const Cfg *Func) const {
Ostream &Str = Func->getContext()->getStrEmit(); Ostream &Str = Func->getContext()->getStrEmit();
assert(this->getSrcSize() == 2); assert(this->getSrcSize() == 2);
Type Ty = this->getSrc(0)->getType(); Type Ty = this->getSrc(0)->getType();
Str << "\tmov" << this->getWidthString(Ty) Str << "\t"
"mov" << this->getWidthString(Ty)
<< InstX86Base<Machine>::Traits::TypeAttributes[Ty].SdSsString << "\t"; << InstX86Base<Machine>::Traits::TypeAttributes[Ty].SdSsString << "\t";
this->getSrc(0)->emit(Func); this->getSrc(0)->emit(Func);
Str << ", "; Str << ", ";
...@@ -2211,7 +2231,8 @@ void InstX86StoreP<Machine>::emit(const Cfg *Func) const { ...@@ -2211,7 +2231,8 @@ void InstX86StoreP<Machine>::emit(const Cfg *Func) const {
Ostream &Str = Func->getContext()->getStrEmit(); Ostream &Str = Func->getContext()->getStrEmit();
assert(this->getSrcSize() == 2); assert(this->getSrcSize() == 2);
assert(isVectorType(this->getSrc(1)->getType())); assert(isVectorType(this->getSrc(1)->getType()));
Str << "\tmovups\t"; Str << "\t"
"movups\t";
this->getSrc(0)->emit(Func); this->getSrc(0)->emit(Func);
Str << ", "; Str << ", ";
this->getSrc(1)->emit(Func); this->getSrc(1)->emit(Func);
...@@ -2254,7 +2275,8 @@ void InstX86StoreQ<Machine>::emit(const Cfg *Func) const { ...@@ -2254,7 +2275,8 @@ void InstX86StoreQ<Machine>::emit(const Cfg *Func) const {
assert(this->getSrc(1)->getType() == IceType_i64 || assert(this->getSrc(1)->getType() == IceType_i64 ||
this->getSrc(1)->getType() == IceType_f64 || this->getSrc(1)->getType() == IceType_f64 ||
isVectorType(this->getSrc(1)->getType())); isVectorType(this->getSrc(1)->getType()));
Str << "\tmovq\t"; Str << "\t"
"movq\t";
this->getSrc(0)->emit(Func); this->getSrc(0)->emit(Func);
Str << ", "; Str << ", ";
this->getSrc(1)->emit(Func); this->getSrc(1)->emit(Func);
...@@ -2294,7 +2316,8 @@ template <class Machine> void InstX86Lea<Machine>::emit(const Cfg *Func) const { ...@@ -2294,7 +2316,8 @@ template <class Machine> void InstX86Lea<Machine>::emit(const Cfg *Func) const {
Ostream &Str = Func->getContext()->getStrEmit(); Ostream &Str = Func->getContext()->getStrEmit();
assert(this->getSrcSize() == 1); assert(this->getSrcSize() == 1);
assert(this->getDest()->hasReg()); assert(this->getDest()->hasReg());
Str << "\tleal\t"; Str << "\t"
"leal\t";
Operand *Src0 = this->getSrc(0); Operand *Src0 = this->getSrc(0);
if (const auto *Src0Var = llvm::dyn_cast<Variable>(Src0)) { if (const auto *Src0Var = llvm::dyn_cast<Variable>(Src0)) {
Type Ty = Src0Var->getType(); Type Ty = Src0Var->getType();
...@@ -2323,13 +2346,14 @@ template <class Machine> void InstX86Mov<Machine>::emit(const Cfg *Func) const { ...@@ -2323,13 +2346,14 @@ template <class Machine> void InstX86Mov<Machine>::emit(const Cfg *Func) const {
Type DestTy = this->getDest()->getType(); Type DestTy = this->getDest()->getType();
if (InstX86Base<Machine>::Traits::Is64Bit && DestTy == IceType_i64 && if (InstX86Base<Machine>::Traits::Is64Bit && DestTy == IceType_i64 &&
isIntegerConstant(Src)) { isIntegerConstant(Src)) {
Str << "\tmovabs\t"; Str << "\t"
"movabs\t";
} else { } else {
Str << "\tmov" Str << "\t"
<< (!isScalarFloatingType(DestTy) "mov" << (!isScalarFloatingType(DestTy)
? this->getWidthString(DestTy) ? this->getWidthString(DestTy)
: InstX86Base<Machine>::Traits::TypeAttributes[DestTy] : InstX86Base<Machine>::Traits::TypeAttributes[DestTy]
.SdSsString) << "\t"; .SdSsString) << "\t";
} }
// For an integer truncation operation, src is wider than dest. In this case, // For an integer truncation operation, src is wider than dest. In this case,
// we use a mov instruction whose data width matches the narrower dest. // we use a mov instruction whose data width matches the narrower dest.
...@@ -2499,7 +2523,8 @@ void InstX86Movp<Machine>::emit(const Cfg *Func) const { ...@@ -2499,7 +2523,8 @@ void InstX86Movp<Machine>::emit(const Cfg *Func) const {
// depending on the data type and alignment of the operands. // depending on the data type and alignment of the operands.
Ostream &Str = Func->getContext()->getStrEmit(); Ostream &Str = Func->getContext()->getStrEmit();
assert(this->getSrcSize() == 1); assert(this->getSrcSize() == 1);
Str << "\tmovups\t"; Str << "\t"
"movups\t";
this->getSrc(0)->emit(Func); this->getSrc(0)->emit(Func);
Str << ", "; Str << ", ";
this->getDest()->emit(Func); this->getDest()->emit(Func);
...@@ -2527,7 +2552,8 @@ void InstX86Movq<Machine>::emit(const Cfg *Func) const { ...@@ -2527,7 +2552,8 @@ void InstX86Movq<Machine>::emit(const Cfg *Func) const {
assert(this->getSrcSize() == 1); assert(this->getSrcSize() == 1);
assert(this->getDest()->getType() == IceType_i64 || assert(this->getDest()->getType() == IceType_i64 ||
this->getDest()->getType() == IceType_f64); this->getDest()->getType() == IceType_f64);
Str << "\tmovq\t"; Str << "\t"
"movq\t";
this->getSrc(0)->emit(Func); this->getSrc(0)->emit(Func);
Str << ", "; Str << ", ";
this->getDest()->emit(Func); this->getDest()->emit(Func);
...@@ -2596,7 +2622,8 @@ template <class Machine> void InstX86Nop<Machine>::emit(const Cfg *Func) const { ...@@ -2596,7 +2622,8 @@ template <class Machine> void InstX86Nop<Machine>::emit(const Cfg *Func) const {
return; return;
Ostream &Str = Func->getContext()->getStrEmit(); Ostream &Str = Func->getContext()->getStrEmit();
// TODO: Emit the right code for each variant. // TODO: Emit the right code for each variant.
Str << "\tnop\t# variant = " << Variant; Str << "\t"
"nop\t# variant = " << Variant;
} }
template <class Machine> template <class Machine>
...@@ -2625,15 +2652,18 @@ template <class Machine> void InstX86Fld<Machine>::emit(const Cfg *Func) const { ...@@ -2625,15 +2652,18 @@ template <class Machine> void InstX86Fld<Machine>::emit(const Cfg *Func) const {
// This is a physical xmm register, so we need to spill it to a temporary // This is a physical xmm register, so we need to spill it to a temporary
// stack slot. Function prolog emission guarantees that there is sufficient // stack slot. Function prolog emission guarantees that there is sufficient
// space to do this. // space to do this.
Str << "\tmov" Str << "\t"
<< InstX86Base<Machine>::Traits::TypeAttributes[Ty].SdSsString << "\t"; "mov" << InstX86Base<Machine>::Traits::TypeAttributes[Ty].SdSsString
<< "\t";
Var->emit(Func); Var->emit(Func);
Str << ", (%esp)\n"; Str << ", (%esp)\n"
Str << "\tfld" << this->getFldString(Ty) << "\t" "\t"
<< "(%esp)"; "fld" << this->getFldString(Ty) << "\t"
"(%esp)";
return; return;
} }
Str << "\tfld" << this->getFldString(Ty) << "\t"; Str << "\t"
"fld" << this->getFldString(Ty) << "\t";
this->getSrc(0)->emit(Func); this->getSrc(0)->emit(Func);
} }
...@@ -2692,23 +2722,28 @@ void InstX86Fstp<Machine>::emit(const Cfg *Func) const { ...@@ -2692,23 +2722,28 @@ void InstX86Fstp<Machine>::emit(const Cfg *Func) const {
// "partially" delete the fstp if the Dest is unused. Even if Dest is unused, // "partially" delete the fstp if the Dest is unused. Even if Dest is unused,
// the fstp should be kept for the SideEffects of popping the stack. // the fstp should be kept for the SideEffects of popping the stack.
if (!this->getDest()) { if (!this->getDest()) {
Str << "\tfstp\tst(0)"; Str << "\t"
"fstp\t"
"st(0)";
return; return;
} }
Type Ty = this->getDest()->getType(); Type Ty = this->getDest()->getType();
if (!this->getDest()->hasReg()) { if (!this->getDest()->hasReg()) {
Str << "\tfstp" << this->getFldString(Ty) << "\t"; Str << "\t"
"fstp" << this->getFldString(Ty) << "\t";
this->getDest()->emit(Func); this->getDest()->emit(Func);
return; return;
} }
// Dest is a physical (xmm) register, so st(0) needs to go through memory. // Dest is a physical (xmm) register, so st(0) needs to go through memory.
// Hack this by using caller-reserved memory at the top of stack, spilling // Hack this by using caller-reserved memory at the top of stack, spilling
// st(0) there, and loading it into the xmm register. // st(0) there, and loading it into the xmm register.
Str << "\tfstp" << this->getFldString(Ty) << "\t" Str << "\t"
<< "(%esp)\n"; "fstp" << this->getFldString(Ty) << "\t"
Str << "\tmov" << InstX86Base<Machine>::Traits::TypeAttributes[Ty].SdSsString "(%esp)\n";
Str << "\t"
"mov" << InstX86Base<Machine>::Traits::TypeAttributes[Ty].SdSsString
<< "\t" << "\t"
<< "(%esp), "; "(%esp), ";
this->getDest()->emit(Func); this->getDest()->emit(Func);
} }
...@@ -2953,7 +2988,8 @@ template <class Machine> void InstX86Pop<Machine>::emit(const Cfg *Func) const { ...@@ -2953,7 +2988,8 @@ template <class Machine> void InstX86Pop<Machine>::emit(const Cfg *Func) const {
return; return;
Ostream &Str = Func->getContext()->getStrEmit(); Ostream &Str = Func->getContext()->getStrEmit();
assert(this->getSrcSize() == 0); assert(this->getSrcSize() == 0);
Str << "\tpop\t"; Str << "\t"
"pop\t";
this->getDest()->emit(Func); this->getDest()->emit(Func);
} }
...@@ -2988,7 +3024,8 @@ void InstX86Push<Machine>::emit(const Cfg *Func) const { ...@@ -2988,7 +3024,8 @@ void InstX86Push<Machine>::emit(const Cfg *Func) const {
// Push is currently only used for saving GPRs. // Push is currently only used for saving GPRs.
const auto *Var = llvm::cast<Variable>(this->getSrc(0)); const auto *Var = llvm::cast<Variable>(this->getSrc(0));
assert(Var->hasReg()); assert(Var->hasReg());
Str << "\tpush\t"; Str << "\t"
"push\t";
Var->emit(Func); Var->emit(Func);
} }
...@@ -3060,7 +3097,8 @@ template <class Machine> void InstX86Ret<Machine>::emit(const Cfg *Func) const { ...@@ -3060,7 +3097,8 @@ template <class Machine> void InstX86Ret<Machine>::emit(const Cfg *Func) const {
if (!BuildDefs::dump()) if (!BuildDefs::dump())
return; return;
Ostream &Str = Func->getContext()->getStrEmit(); Ostream &Str = Func->getContext()->getStrEmit();
Str << "\tret"; Str << "\t"
"ret";
} }
template <class Machine> template <class Machine>
...@@ -3085,7 +3123,8 @@ void InstX86Setcc<Machine>::emit(const Cfg *Func) const { ...@@ -3085,7 +3123,8 @@ void InstX86Setcc<Machine>::emit(const Cfg *Func) const {
if (!BuildDefs::dump()) if (!BuildDefs::dump())
return; return;
Ostream &Str = Func->getContext()->getStrEmit(); Ostream &Str = Func->getContext()->getStrEmit();
Str << "\tset" Str << "\t"
"set"
<< InstX86Base<Machine>::Traits::InstBrAttributes[Condition].DisplayString << InstX86Base<Machine>::Traits::InstBrAttributes[Condition].DisplayString
<< "\t"; << "\t";
this->Dest->emit(Func); this->Dest->emit(Func);
...@@ -3124,9 +3163,11 @@ void InstX86Xadd<Machine>::emit(const Cfg *Func) const { ...@@ -3124,9 +3163,11 @@ void InstX86Xadd<Machine>::emit(const Cfg *Func) const {
return; return;
Ostream &Str = Func->getContext()->getStrEmit(); Ostream &Str = Func->getContext()->getStrEmit();
if (this->Locked) { if (this->Locked) {
Str << "\tlock"; Str << "\t"
"lock";
} }
Str << "\txadd" << this->getWidthString(this->getSrc(0)->getType()) << "\t"; Str << "\t"
"xadd" << this->getWidthString(this->getSrc(0)->getType()) << "\t";
this->getSrc(1)->emit(Func); this->getSrc(1)->emit(Func);
Str << ", "; Str << ", ";
this->getSrc(0)->emit(Func); this->getSrc(0)->emit(Func);
...@@ -3171,7 +3212,8 @@ void InstX86Xchg<Machine>::emit(const Cfg *Func) const { ...@@ -3171,7 +3212,8 @@ void InstX86Xchg<Machine>::emit(const Cfg *Func) const {
if (!BuildDefs::dump()) if (!BuildDefs::dump())
return; return;
Ostream &Str = Func->getContext()->getStrEmit(); Ostream &Str = Func->getContext()->getStrEmit();
Str << "\txchg" << this->getWidthString(this->getSrc(0)->getType()) << "\t"; Str << "\t"
"xchg" << this->getWidthString(this->getSrc(0)->getType()) << "\t";
this->getSrc(1)->emit(Func); this->getSrc(1)->emit(Func);
Str << ", "; Str << ", ";
this->getSrc(0)->emit(Func); this->getSrc(0)->emit(Func);
...@@ -3223,9 +3265,10 @@ void InstX86IacaStart<Machine>::emit(const Cfg *Func) const { ...@@ -3223,9 +3265,10 @@ void InstX86IacaStart<Machine>::emit(const Cfg *Func) const {
return; return;
Ostream &Str = Func->getContext()->getStrEmit(); Ostream &Str = Func->getContext()->getStrEmit();
Str << "\t# IACA_START\n" Str << "\t# IACA_START\n"
<< "\t.byte 0x0F, 0x0B\n" "\t.byte 0x0F, 0x0B\n"
<< "\tmovl\t$111, %ebx\n" "\t"
<< "\t.byte 0x64, 0x67, 0x90"; "movl\t$111, %ebx\n"
"\t.byte 0x64, 0x67, 0x90";
} }
template <class Machine> template <class Machine>
...@@ -3249,9 +3292,10 @@ void InstX86IacaEnd<Machine>::emit(const Cfg *Func) const { ...@@ -3249,9 +3292,10 @@ void InstX86IacaEnd<Machine>::emit(const Cfg *Func) const {
return; return;
Ostream &Str = Func->getContext()->getStrEmit(); Ostream &Str = Func->getContext()->getStrEmit();
Str << "\t# IACA_END\n" Str << "\t# IACA_END\n"
<< "\tmovl\t$222, %ebx\n" "\t"
<< "\t.byte 0x64, 0x67, 0x90\n" "movl\t$222, %ebx\n"
<< "\t.byte 0x0F, 0x0B"; "\t.byte 0x64, 0x67, 0x90\n"
"\t.byte 0x0F, 0x0B";
} }
template <class Machine> template <class Machine>
......
src/IceTargetLoweringMIPS32.cpp
...@@ -1072,8 +1072,10 @@ TargetHeaderMIPS32::TargetHeaderMIPS32(GlobalContext *Ctx) ...@@ -1072,8 +1072,10 @@ TargetHeaderMIPS32::TargetHeaderMIPS32(GlobalContext *Ctx)
void TargetHeaderMIPS32::lower() { void TargetHeaderMIPS32::lower() {
OstreamLocker L(Ctx); OstreamLocker L(Ctx);
Ostream &Str = Ctx->getStrEmit(); Ostream &Str = Ctx->getStrEmit();
Str << "\t.set\tnomicromips\n"; Str << "\t.set\t"
Str << "\t.set\tnomips16\n"; << "nomicromips\n";
Str << "\t.set\t"
<< "nomips16\n";
} }
llvm::SmallBitVector TargetMIPS32::TypeToRegisterSet[IceType_NUM]; llvm::SmallBitVector TargetMIPS32::TypeToRegisterSet[IceType_NUM];
......
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