Skip to content

S
swiftshader
Commit 70fa5255 by Jan Voung
Options

Fix ARM Om1 lowering for arithmetic, and test.

The original arithmetic lowering was introducing some unused mov instructions from legalization (e.g., the upper part of shift num bits -- which should be 0 anyway), and div helper calls don't actually use the legalized parameters (handled separately by lowerCall). These unused instructions cause the Om1 allocator to assert that LRBegin exists but LREnd does not. BUG= https://code.google.com/p/nativeclient/issues/detail?id=4076 R=kschimpf@google.com Review URL: https://codereview.chromium.org/1210073017.
parent 5d0acff3
Showing with 38 additions and 29 deletions
tests_lit/llvm2ice_tests/64bit.pnacl.ll
...@@ -18,6 +18,11 @@ ...@@ -18,6 +18,11 @@
; RUN: --disassemble --target arm32 -i %s --args -O2 --skip-unimplemented \ ; RUN: --disassemble --target arm32 -i %s --args -O2 --skip-unimplemented \
; RUN: | %if --need=target_ARM32 --need=allow_dump \ ; RUN: | %if --need=target_ARM32 --need=allow_dump \
; RUN: --command FileCheck --check-prefix ARM32 %s ; RUN: --command FileCheck --check-prefix ARM32 %s
; RUN: %if --need=target_ARM32 --need=allow_dump \
; RUN: --command %p2i --filetype=asm --assemble --disassemble --target arm32 \
; RUN: -i %s --args -Om1 --skip-unimplemented \
; RUN: | %if --need=target_ARM32 --need=allow_dump \
; RUN: --command FileCheck --check-prefix ARM32 %s
@__init_array_start = internal constant [0 x i8] zeroinitializer, align 4 @__init_array_start = internal constant [0 x i8] zeroinitializer, align 4
@__fini_array_start = internal constant [0 x i8] zeroinitializer, align 4 @__fini_array_start = internal constant [0 x i8] zeroinitializer, align 4
...@@ -94,16 +99,16 @@ entry: ...@@ -94,16 +99,16 @@ entry:
; ARM32: sub sp, {{.*}} #16 ; ARM32: sub sp, {{.*}} #16
; ARM32: str {{.*}}, [sp, #4] ; ARM32: str {{.*}}, [sp, #4]
; ARM32: str {{.*}}, [sp] ; ARM32: str {{.*}}, [sp]
; ARM32: mov r0 ; ARM32: {{mov|ldr}} r0
; ARM32: mov r1 ; ARM32: {{mov|ldr}} r1
; ARM32: movw r2, #123 ; ARM32: movw r2, #123
; ARM32: bl {{.*}} ignore64BitArgNoInline ; ARM32: bl {{.*}} ignore64BitArgNoInline
; ARM32: add sp, {{.*}} #16 ; ARM32: add sp, {{.*}} #16
; ARM32: sub sp, {{.*}} #16 ; ARM32: sub sp, {{.*}} #16
; ARM32: str {{.*}}, [sp, #4] ; ARM32: str {{.*}}, [sp, #4]
; ARM32: str {{.*}}, [sp] ; ARM32: str {{.*}}, [sp]
; ARM32: mov r0 ; ARM32: {{mov|ldr}} r0
; ARM32: mov r1 ; ARM32: {{mov|ldr}} r1
; ARM32: movw r2, #123 ; ARM32: movw r2, #123
; ARM32: bl {{.*}} ignore64BitArgNoInline ; ARM32: bl {{.*}} ignore64BitArgNoInline
; ARM32: add sp, {{.*}} #16 ; ARM32: add sp, {{.*}} #16
...@@ -147,27 +152,28 @@ entry: ...@@ -147,27 +152,28 @@ entry:
; ARM32: movt [[REG2:r.*]], {{.*}} ; 0x1234 ; ARM32: movt [[REG2:r.*]], {{.*}} ; 0x1234
; ARM32: str [[REG1]], [sp, #4] ; ARM32: str [[REG1]], [sp, #4]
; ARM32: str [[REG2]], [sp] ; ARM32: str [[REG2]], [sp]
; ARM32: mov r0, r2 ; ARM32: {{mov|ldr}} r0
; ARM32: mov r1, r3 ; ARM32: {{mov|ldr}} r1
; ARM32: movw r2, #123 ; ARM32: movw r2, #123
; ARM32: bl {{.*}} ignore64BitArgNoInline ; ARM32: bl {{.*}} ignore64BitArgNoInline
; ARM32: add sp, {{.*}} #16 ; ARM32: add sp, {{.*}} #16
define internal i64 @return64BitArg(i64 %a) { define internal i64 @return64BitArg(i64 %padding, i64 %a) {
entry: entry:
ret i64 %a ret i64 %a
} }
; CHECK-LABEL: return64BitArg ; CHECK-LABEL: return64BitArg
; CHECK: mov {{.*}},DWORD PTR [esp+0x4] ; CHECK: mov {{.*}},DWORD PTR [esp+0xc]
; CHECK: mov {{.*}},DWORD PTR [esp+0x8] ; CHECK: mov {{.*}},DWORD PTR [esp+0x10]
; ;
; OPTM1-LABEL: return64BitArg ; OPTM1-LABEL: return64BitArg
; OPTM1: mov {{.*}},DWORD PTR [esp+0x4] ; OPTM1: mov {{.*}},DWORD PTR [esp+0xc]
; OPTM1: mov {{.*}},DWORD PTR [esp+0x8] ; OPTM1: mov {{.*}},DWORD PTR [esp+0x10]
; Nothing to do for ARM O2 -- arg and return value are in r0,r1.
; ARM32-LABEL: return64BitArg ; ARM32-LABEL: return64BitArg
; ARM32-NEXT: bx lr ; ARM32: mov {{.*}}, r2
; ARM32: mov {{.*}}, r3
; ARM32: bx lr
define internal i64 @return64BitConst() { define internal i64 @return64BitConst() {
entry: entry:
...@@ -1002,13 +1008,11 @@ if.end3: ; preds = %if.then2, %if.end ...@@ -1002,13 +1008,11 @@ if.end3: ; preds = %if.then2, %if.end
; ARM32: cmpeq ; ARM32: cmpeq
; ARM32: moveq ; ARM32: moveq
; ARM32: movne ; ARM32: movne
; ARM32: beq
; ARM32: bl ; ARM32: bl
; ARM32: cmp ; ARM32: cmp
; ARM32: cmpeq ; ARM32: cmpeq
; ARM32: moveq ; ARM32: moveq
; ARM32: movne ; ARM32: movne
; ARM32: beq
; ARM32: bl ; ARM32: bl
declare void @func() declare void @func()
...@@ -1054,13 +1058,11 @@ if.end3: ; preds = %if.end, %if.then2 ...@@ -1054,13 +1058,11 @@ if.end3: ; preds = %if.end, %if.then2
; ARM32: cmpeq ; ARM32: cmpeq
; ARM32: movne ; ARM32: movne
; ARM32: moveq ; ARM32: moveq
; ARM32: beq
; ARM32: bl ; ARM32: bl
; ARM32: cmp ; ARM32: cmp
; ARM32: cmpeq ; ARM32: cmpeq
; ARM32: movne ; ARM32: movne
; ARM32: moveq ; ARM32: moveq
; ARM32: beq
; ARM32: bl ; ARM32: bl
define internal void @icmpGt64(i64 %a, i64 %b, i64 %c, i64 %d) { define internal void @icmpGt64(i64 %a, i64 %b, i64 %c, i64 %d) {
...@@ -1108,13 +1110,11 @@ if.end3: ; preds = %if.then2, %if.end ...@@ -1108,13 +1110,11 @@ if.end3: ; preds = %if.then2, %if.end
; ARM32: cmpeq ; ARM32: cmpeq
; ARM32: movhi ; ARM32: movhi
; ARM32: movls ; ARM32: movls
; ARM32: beq
; ARM32: bl ; ARM32: bl
; ARM32: cmp ; ARM32: cmp
; ARM32: sbcs ; ARM32: sbcs
; ARM32: movlt ; ARM32: movlt
; ARM32: movge ; ARM32: movge
; ARM32: beq
; ARM32: bl ; ARM32: bl
define internal void @icmpGe64(i64 %a, i64 %b, i64 %c, i64 %d) { define internal void @icmpGe64(i64 %a, i64 %b, i64 %c, i64 %d) {
...@@ -1162,13 +1162,11 @@ if.end3: ; preds = %if.end, %if.then2 ...@@ -1162,13 +1162,11 @@ if.end3: ; preds = %if.end, %if.then2
; ARM32: cmpeq ; ARM32: cmpeq
; ARM32: movcs ; ARM32: movcs
; ARM32: movcc ; ARM32: movcc
; ARM32: beq
; ARM32: bl ; ARM32: bl
; ARM32: cmp ; ARM32: cmp
; ARM32: sbcs ; ARM32: sbcs
; ARM32: movge ; ARM32: movge
; ARM32: movlt ; ARM32: movlt
; ARM32: beq
; ARM32: bl ; ARM32: bl
define internal void @icmpLt64(i64 %a, i64 %b, i64 %c, i64 %d) { define internal void @icmpLt64(i64 %a, i64 %b, i64 %c, i64 %d) {
...@@ -1216,13 +1214,11 @@ if.end3: ; preds = %if.then2, %if.end ...@@ -1216,13 +1214,11 @@ if.end3: ; preds = %if.then2, %if.end
; ARM32: cmpeq ; ARM32: cmpeq
; ARM32: movcc ; ARM32: movcc
; ARM32: movcs ; ARM32: movcs
; ARM32: beq
; ARM32: bl ; ARM32: bl
; ARM32: cmp ; ARM32: cmp
; ARM32: sbcs ; ARM32: sbcs
; ARM32: movlt ; ARM32: movlt
; ARM32: movge ; ARM32: movge
; ARM32: beq
; ARM32: bl ; ARM32: bl
define internal void @icmpLe64(i64 %a, i64 %b, i64 %c, i64 %d) { define internal void @icmpLe64(i64 %a, i64 %b, i64 %c, i64 %d) {
...@@ -1270,13 +1266,11 @@ if.end3: ; preds = %if.end, %if.then2 ...@@ -1270,13 +1266,11 @@ if.end3: ; preds = %if.end, %if.then2
; ARM32: cmpeq ; ARM32: cmpeq
; ARM32: movls ; ARM32: movls
; ARM32: movhi ; ARM32: movhi
; ARM32: beq
; ARM32: bl ; ARM32: bl
; ARM32: cmp ; ARM32: cmp
; ARM32: sbcs ; ARM32: sbcs
; ARM32: movge ; ARM32: movge
; ARM32: movlt ; ARM32: movlt
; ARM32: beq
; ARM32: bl ; ARM32: bl
define internal i32 @icmpEq64Bool(i64 %a, i64 %b) { define internal i32 @icmpEq64Bool(i64 %a, i64 %b) {
......
tests_lit/llvm2ice_tests/arith.ll
...@@ -17,6 +17,11 @@ ...@@ -17,6 +17,11 @@
; RUN: -i %s --args -O2 --mattr=hwdiv-arm --skip-unimplemented \ ; RUN: -i %s --args -O2 --mattr=hwdiv-arm --skip-unimplemented \
; RUN: | %if --need=target_ARM32 --need=allow_dump \ ; RUN: | %if --need=target_ARM32 --need=allow_dump \
; RUN: --command FileCheck --check-prefix ARM32HWDIV %s ; RUN: --command FileCheck --check-prefix ARM32HWDIV %s
; RUN: %if --need=target_ARM32 --need=allow_dump \
; RUN: --command %p2i --filetype=asm --assemble --disassemble --target arm32 \
; RUN: -i %s --args -Om1 --skip-unimplemented \
; RUN: | %if --need=target_ARM32 --need=allow_dump \
; RUN: --command FileCheck --check-prefix ARM32 %s
define i32 @Add(i32 %a, i32 %b) { define i32 @Add(i32 %a, i32 %b) {
entry: entry:
...@@ -107,8 +112,8 @@ entry: ...@@ -107,8 +112,8 @@ entry:
; CHECK-NOT: mul {{[0-9]+}} ; CHECK-NOT: mul {{[0-9]+}}
; ;
; ARM32-LABEL: MulImm64 ; ARM32-LABEL: MulImm64
; ARM32: mov {{.*}}, #99 ; ARM32: movw {{.*}}, #99
; ARM32: mov {{.*}}, #0 ; ARM32: movw {{.*}}, #0
; ARM32: mul r ; ARM32: mul r
; ARM32: mla r ; ARM32: mla r
; ARM32: umull r ; ARM32: umull r
...@@ -125,9 +130,9 @@ entry: ...@@ -125,9 +130,9 @@ entry:
; ;
; ARM32-LABEL: Sdiv ; ARM32-LABEL: Sdiv
; ARM32: tst [[DENOM:r.*]], [[DENOM]] ; ARM32: tst [[DENOM:r.*]], [[DENOM]]
; ARM32: bne [[LABEL:[0-9a-f]+]] ; ARM32: bne
; ARM32: .word 0xe7fedef0 ; ARM32: .word 0xe7fedef0
; ARM32: [[LABEL]]: {{.*}} bl {{.*}} __divsi3 ; ARM32: {{.*}} bl {{.*}} __divsi3
; ARM32HWDIV-LABEL: Sdiv ; ARM32HWDIV-LABEL: Sdiv
; ARM32HWDIV: tst ; ARM32HWDIV: tst
; ARM32HWDIV: bne ; ARM32HWDIV: bne
......
tests_lit/llvm2ice_tests/callindirect.pnacl.ll
...@@ -20,6 +20,11 @@ ...@@ -20,6 +20,11 @@
; RUN: --disassemble --target arm32 -i %s --args -O2 --skip-unimplemented \ ; RUN: --disassemble --target arm32 -i %s --args -O2 --skip-unimplemented \
; RUN: | %if --need=target_ARM32 --need=allow_dump \ ; RUN: | %if --need=target_ARM32 --need=allow_dump \
; RUN: --command FileCheck --check-prefix ARM32 %s ; RUN: --command FileCheck --check-prefix ARM32 %s
; RUN: %if --need=target_ARM32 --need=allow_dump \
; RUN: --command %p2i --filetype=asm --assemble \
; RUN: --disassemble --target arm32 -i %s --args -Om1 --skip-unimplemented \
; RUN: | %if --need=target_ARM32 --need=allow_dump \
; RUN: --command FileCheck --check-prefix ARM32 %s
@__init_array_start = internal constant [0 x i8] zeroinitializer, align 4 @__init_array_start = internal constant [0 x i8] zeroinitializer, align 4
@__fini_array_start = internal constant [0 x i8] zeroinitializer, align 4 @__fini_array_start = internal constant [0 x i8] zeroinitializer, align 4
......
tests_lit/llvm2ice_tests/unreachable.ll
...@@ -12,6 +12,11 @@ ...@@ -12,6 +12,11 @@
; RUN: --disassemble --target arm32 -i %s --args -O2 --skip-unimplemented \ ; RUN: --disassemble --target arm32 -i %s --args -O2 --skip-unimplemented \
; RUN: | %if --need=target_ARM32 --need=allow_dump \ ; RUN: | %if --need=target_ARM32 --need=allow_dump \
; RUN: --command FileCheck --check-prefix ARM32 %s ; RUN: --command FileCheck --check-prefix ARM32 %s
; RUN: %if --need=target_ARM32 --need=allow_dump \
; RUN: --command %p2i --filetype=asm --assemble \
; RUN: --disassemble --target arm32 -i %s --args -Om1 --skip-unimplemented \
; RUN: | %if --need=target_ARM32 --need=allow_dump \
; RUN: --command FileCheck --check-prefix ARM32 %s
define internal i32 @divide(i32 %num, i32 %den) { define internal i32 @divide(i32 %num, i32 %den) {
entry: entry:
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment