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swiftshader
Commit a8d47137 by Jim Stichnoth
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Fix warnings produced by g++ on Windows.

Scraped non-pragma related warnings from a recent trybot run: wget -O - 'http://build.chromium.org/p/tryserver.nacl/builders/nacl-toolchain-win7-pnacl-x86_64/builds/3221/steps/llvm_i686_w64_mingw32%20%28build%29/logs/stdio' | grep subzero | grep warning | grep -v pragma BUG= none R=ascull@google.com, jpp@chromium.org Review URL: https://codereview.chromium.org/1315193020.
parent 5300bfe5
Showing with 14 additions and 8 deletions
src/IceAssemblerX86Base.h
...@@ -954,7 +954,7 @@ private: ...@@ -954,7 +954,7 @@ private:
return IsGPR && (Reg & 0x04) != 0 && (Reg & 0x08) == 0 && return IsGPR && (Reg & 0x04) != 0 && (Reg & 0x08) == 0 &&
isByteSizedType(Ty); isByteSizedType(Ty);
}; }
// assembleAndEmitRex is used for determining which (if any) rex prefix should // assembleAndEmitRex is used for determining which (if any) rex prefix should
// be emitted for the current instruction. It allows different types for Reg // be emitted for the current instruction. It allows different types for Reg
...@@ -970,10 +970,13 @@ private: ...@@ -970,10 +970,13 @@ private:
? T::Operand::RexW ? T::Operand::RexW
: T::Operand::RexNone; : T::Operand::RexNone;
const uint8_t R = (Reg & 0x08) ? T::Operand::RexR : T::Operand::RexNone; const uint8_t R = (Reg & 0x08) ? T::Operand::RexR : T::Operand::RexNone;
const uint8_t X = (Addr != nullptr) ? Addr->rexX() : T::Operand::RexNone; const uint8_t X = (Addr != nullptr)
const uint8_t B = ? (typename T::Operand::RexBits)Addr->rexX()
(Addr != nullptr) ? Addr->rexB() : (Rm & 0x08) ? T::Operand::RexB
: T::Operand::RexNone; : T::Operand::RexNone;
const uint8_t B =
(Addr != nullptr)
? (typename T::Operand::RexBits)Addr->rexB()
: (Rm & 0x08) ? T::Operand::RexB : T::Operand::RexNone;
const uint8_t Prefix = W | R | X | B; const uint8_t Prefix = W | R | X | B;
if (Prefix != T::Operand::RexNone) { if (Prefix != T::Operand::RexNone) {
emitUint8(Prefix); emitUint8(Prefix);
......
src/IceCfgNode.cpp
...@@ -241,6 +241,7 @@ CfgNode *CfgNode::splitIncomingEdge(CfgNode *Pred, SizeT EdgeIndex) { ...@@ -241,6 +241,7 @@ CfgNode *CfgNode::splitIncomingEdge(CfgNode *Pred, SizeT EdgeIndex) {
} }
} }
assert(Found); assert(Found);
(void)Found;
// Repoint this node's in-edge. // Repoint this node's in-edge.
Found = false; Found = false;
for (CfgNode *&I : InEdges) { for (CfgNode *&I : InEdges) {
...@@ -252,12 +253,14 @@ CfgNode *CfgNode::splitIncomingEdge(CfgNode *Pred, SizeT EdgeIndex) { ...@@ -252,12 +253,14 @@ CfgNode *CfgNode::splitIncomingEdge(CfgNode *Pred, SizeT EdgeIndex) {
} }
} }
assert(Found); assert(Found);
(void)Found;
// Repoint all suitable branch instructions' target and return. // Repoint all suitable branch instructions' target and return.
Found = false; Found = false;
for (Inst &I : Pred->getInsts()) for (Inst &I : Pred->getInsts())
if (!I.isDeleted() && I.repointEdges(this, NewNode)) if (!I.isDeleted() && I.repointEdges(this, NewNode))
Found = true; Found = true;
assert(Found); assert(Found);
(void)Found;
return NewNode; return NewNode;
} }
......
src/IceInstX8632.cpp
...@@ -280,4 +280,4 @@ void MachineTraits<TargetX8632>::VariableSplit::dump(const Cfg *Func, ...@@ -280,4 +280,4 @@ void MachineTraits<TargetX8632>::VariableSplit::dump(const Cfg *Func,
} // namespace X86Internal } // namespace X86Internal
} // end of namespace Ice } // end of namespace Ice
X86INSTS_DEFINE_STATIC_DATA(TargetX8632); X86INSTS_DEFINE_STATIC_DATA(TargetX8632)
src/IceInstX8664.cpp
...@@ -254,4 +254,4 @@ void MachineTraits<TargetX8664>::VariableSplit::dump(const Cfg *Func, ...@@ -254,4 +254,4 @@ void MachineTraits<TargetX8664>::VariableSplit::dump(const Cfg *Func,
} // namespace X86Internal } // namespace X86Internal
} // end of namespace Ice } // end of namespace Ice
X86INSTS_DEFINE_STATIC_DATA(TargetX8664); X86INSTS_DEFINE_STATIC_DATA(TargetX8664)
src/IceTargetLoweringARM32.cpp
...@@ -2259,7 +2259,7 @@ void TargetARM32::lowerInsertElement(const InstInsertElement *Inst) { ...@@ -2259,7 +2259,7 @@ void TargetARM32::lowerInsertElement(const InstInsertElement *Inst) {
} }
void TargetARM32::lowerIntrinsicCall(const InstIntrinsicCall *Instr) { void TargetARM32::lowerIntrinsicCall(const InstIntrinsicCall *Instr) {
switch (Intrinsics::IntrinsicID ID = Instr->getIntrinsicInfo().ID) { switch (Instr->getIntrinsicInfo().ID) {
case Intrinsics::AtomicCmpxchg: { case Intrinsics::AtomicCmpxchg: {
UnimplementedError(Func->getContext()->getFlags()); UnimplementedError(Func->getContext()->getFlags());
return; return;
......
src/IceTargetLoweringMIPS32.cpp
...@@ -474,7 +474,7 @@ void TargetMIPS32::lowerInsertElement(const InstInsertElement *Inst) { ...@@ -474,7 +474,7 @@ void TargetMIPS32::lowerInsertElement(const InstInsertElement *Inst) {
} }
void TargetMIPS32::lowerIntrinsicCall(const InstIntrinsicCall *Instr) { void TargetMIPS32::lowerIntrinsicCall(const InstIntrinsicCall *Instr) {
switch (Intrinsics::IntrinsicID ID = Instr->getIntrinsicInfo().ID) { switch (Instr->getIntrinsicInfo().ID) {
case Intrinsics::AtomicCmpxchg: { case Intrinsics::AtomicCmpxchg: {
UnimplementedError(Func->getContext()->getFlags()); UnimplementedError(Func->getContext()->getFlags());
return; return;
......
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