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swiftshader
Commit c207d51e by Jan Voung
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Use ldr for movs out of stack slots (instead of mov reg, [sp/fp]).

So far we've been using ldr/str (32-bit) to load/store the whole stack slot, independent of the variable type. Toggle on some tests that didn't have an Om1 variant previously. Didn't toggle everything since there are still some problems with liveness from code being unimplemented. BUG= https://code.google.com/p/nativeclient/issues/detail?id=4076 R=stichnot@chromium.org Review URL: https://codereview.chromium.org/1144923008
parent b82baf2f
Showing with 48 additions and 3 deletions
src/IceInstARM32.cpp
...@@ -313,8 +313,18 @@ template <> void InstARM32Mov::emit(const Cfg *Func) const { ...@@ -313,8 +313,18 @@ template <> void InstARM32Mov::emit(const Cfg *Func) const {
assert(getSrcSize() == 1); assert(getSrcSize() == 1);
Variable *Dest = getDest(); Variable *Dest = getDest();
if (Dest->hasReg()) { if (Dest->hasReg()) {
Str << "\t" const char *Opcode = "mov";
<< "mov" << getPredicate() << "\t"; Operand *Src0 = getSrc(0);
if (const auto *Src0V = llvm::dyn_cast<Variable>(Src0)) {
if (!Src0V->hasReg()) {
Opcode = "ldr"; // Always load the full stack slot (vs ldrb, ldrh).
}
} else {
// If Src isn't a variable, it shouldn't be a memory operand either
// (otherwise Opcode will have to be ldr).
assert(!llvm::isa<OperandARM32Mem>(Src0));
}
Str << "\t" << Opcode << getPredicate() << "\t";
getDest()->emit(Func); getDest()->emit(Func);
Str << ", "; Str << ", ";
getSrc(0)->emit(Func); getSrc(0)->emit(Func);
......
tests_lit/llvm2ice_tests/alloc.ll
...@@ -15,6 +15,10 @@ ...@@ -15,6 +15,10 @@
; RUN: --disassemble --target arm32 -i %s --args -O2 --skip-unimplemented \ ; RUN: --disassemble --target arm32 -i %s --args -O2 --skip-unimplemented \
; RUN: | %if --need=target_ARM32 --command FileCheck --check-prefix ARM32 %s ; RUN: | %if --need=target_ARM32 --command FileCheck --check-prefix ARM32 %s
; RUN: %if --need=target_ARM32 --command %p2i --filetype=asm --assemble \
; RUN: --disassemble --target arm32 -i %s --args -Om1 --skip-unimplemented \
; RUN: | %if --need=target_ARM32 --command FileCheck --check-prefix ARM32 %s
define void @fixed_416_align_16(i32 %n) { define void @fixed_416_align_16(i32 %n) {
entry: entry:
%array = alloca i8, i32 416, align 16 %array = alloca i8, i32 416, align 16
......
tests_lit/llvm2ice_tests/branch-opt.ll
...@@ -12,11 +12,15 @@ ...@@ -12,11 +12,15 @@
; TODO(jvoung): Stop skipping unimplemented parts (via --skip-unimplemented) ; TODO(jvoung): Stop skipping unimplemented parts (via --skip-unimplemented)
; once enough infrastructure is in. Also, switch to --filetype=obj ; once enough infrastructure is in. Also, switch to --filetype=obj
; when possible. ; when possible.
; Also test Om1 when addProlog is done.
; RUN: %if --need=target_ARM32 --command %p2i --filetype=asm --assemble \ ; RUN: %if --need=target_ARM32 --command %p2i --filetype=asm --assemble \
; RUN: --disassemble --target arm32 -i %s --args -O2 --skip-unimplemented \ ; RUN: --disassemble --target arm32 -i %s --args -O2 --skip-unimplemented \
; RUN: | %if --need=target_ARM32 --command FileCheck --check-prefix ARM32O2 %s ; RUN: | %if --need=target_ARM32 --command FileCheck --check-prefix ARM32O2 %s
; RUN: %if --need=target_ARM32 --command %p2i --filetype=asm --assemble \
; RUN: --disassemble --target arm32 -i %s --args -Om1 --skip-unimplemented \
; RUN: | %if --need=target_ARM32 --command FileCheck \
; RUN: --check-prefix ARM32OM1 %s
declare void @dummy() declare void @dummy()
; An unconditional branch to the next block should be removed. ; An unconditional branch to the next block should be removed.
...@@ -44,6 +48,11 @@ next: ...@@ -44,6 +48,11 @@ next:
; ARM32O2: bl {{.*}} dummy ; ARM32O2: bl {{.*}} dummy
; ARM32O2-NEXT: bl {{.*}} dummy ; ARM32O2-NEXT: bl {{.*}} dummy
; ARM32OM1-LABEL: testUncondToNextBlock
; ARM32OM1: bl {{.*}} dummy
; ARM32OM1-NEXT: b
; ARM32OM1-NEXT: bl {{.*}} dummy
; For a conditional branch with a fallthrough to the next block, the ; For a conditional branch with a fallthrough to the next block, the
; fallthrough branch should be removed. ; fallthrough branch should be removed.
define void @testCondFallthroughToNextBlock(i32 %arg) { define void @testCondFallthroughToNextBlock(i32 %arg) {
...@@ -88,6 +97,17 @@ target: ...@@ -88,6 +97,17 @@ target:
; ARM32O2-NEXT: bl ; ARM32O2-NEXT: bl
; ARM32O2-NEXT: bx lr ; ARM32O2-NEXT: bx lr
; ARM32OM1-LABEL: testCondFallthroughToNextBlock
; ARM32OM1: cmp {{.*}}, #123
; ARM32OM1-NEXT: movge {{.*}}, #1
; ARM32OM1: cmp {{.*}}, #0
; ARM32OM1: bne
; ARM32OM1: b
; ARM32OM1: bl
; ARM32OM1: bx lr
; ARM32OM1: bl
; ARM32OM1: bx lr
; For a conditional branch with the next block as the target and a ; For a conditional branch with the next block as the target and a
; different block as the fallthrough, the branch condition should be ; different block as the fallthrough, the branch condition should be
; inverted, the fallthrough block changed to the target, and the ; inverted, the fallthrough block changed to the target, and the
...@@ -134,3 +154,14 @@ target: ...@@ -134,3 +154,14 @@ target:
; ARM32O2-NEXT: bx lr ; ARM32O2-NEXT: bx lr
; ARM32O2-NEXT: bl ; ARM32O2-NEXT: bl
; ARM32O2-NEXT: bx lr ; ARM32O2-NEXT: bx lr
; ARM32OM1-LABEL: testCondTargetNextBlock
; ARM32OM1: cmp {{.*}}, #123
; ARM32OM1: movge {{.*}}, #1
; ARM32OM1: cmp {{.*}}, #0
; ARM32OM1: bne
; ARM32OM1: b
; ARM32OM1: bl
; ARM32OM1: bx lr
; ARM32OM1: bl
; ARM32OM1: bx lr
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