SubZero: Adding support for all Reg pairs in getI64PairFirst/SecondGPRNum

src/IceRegistersMIPS32.h

@@ -89,22 +89,32 @@ static inline bool isFPRReg(RegNumT RegNum) {
 
 const char *getRegName(RegNumT RegNum);
 
-static inline RegNumT getI64PairFirstGPRNum(RegNumT RegNum) {
-  // For now it works only for argument register pairs
-  // TODO(mohit.bhakkad): Change this to support all the register pairs once we
-  // have table-driven approach ready
-  assert(RegNum == Reg_A0A1 || RegNum == Reg_A2A3);
-  return (RegNum == RegMIPS32::Reg_A0A1) ? RegMIPS32::Reg_A0
-                                         : RegMIPS32::Reg_A2;
+static inline RegNumT get64PairFirstRegNum(RegNumT RegNum) {
+  assert(unsigned(RegNum) >= Reg_I64PAIR_First);
+  assert(unsigned(RegNum) <= Reg_F64PAIR_Last);
+  if (unsigned(RegNum) >= Reg_F64PAIR_First &&
+      unsigned(RegNum) <= Reg_F64PAIR_Last)
+    return RegNumT::fixme(((RegNum - Reg_F64PAIR_First) * 2) +
+                          unsigned(Reg_FPR_First));
+  if (unsigned(RegNum) >= Reg_I64PAIR_First &&
+           unsigned(RegNum) <= Reg_T8T9)
+    return RegNumT::fixme(((RegNum - Reg_I64PAIR_First) * 2) +
+                          unsigned(Reg_V0));
+  return RegMIPS32::Reg_LO;
 }
 
-static inline RegNumT getI64PairSecondGPRNum(RegNumT RegNum) {
-  // For now it works only for argument register pairs
-  // TODO(mohit.bhakkad): Change this to support all the register pairs once we
-  // have table-driven approach ready
-  assert(RegNum == Reg_A0A1 || RegNum == Reg_A2A3);
-  return (RegNum == RegMIPS32::Reg_A0A1) ? RegMIPS32::Reg_A1
-                                         : RegMIPS32::Reg_A3;
+static inline RegNumT get64PairSecondRegNum(RegNumT RegNum) {
+  assert(unsigned(RegNum) >= Reg_I64PAIR_First);
+  assert(unsigned(RegNum) <= Reg_F64PAIR_Last);
+  if (unsigned(RegNum) >= Reg_F64PAIR_First &&
+      unsigned(RegNum) <= Reg_F64PAIR_Last)
+    return RegNumT::fixme(((RegNum - Reg_F64PAIR_First) * 2) +
+                          unsigned(Reg_FPR_First) + 1);
+  if (unsigned(RegNum) >= Reg_I64PAIR_First &&
+           unsigned(RegNum) <= Reg_T8T9)
+    return RegNumT::fixme(((RegNum - Reg_I64PAIR_First) * 2) +
+                          unsigned(Reg_V1));
+  return RegMIPS32::Reg_HI;
 }
 
 } // end of namespace RegMIPS32

src/IceTargetLoweringMIPS32.cpp

@@ -696,9 +696,9 @@ void TargetMIPS32::lowerArguments() {
       auto *RegisterArg64 = llvm::cast<Variable64On32>(RegisterArg);
       RegisterArg64->initHiLo(Func);
       RegisterArg64->getLo()->setRegNum(
-          RegNumT::fixme(RegMIPS32::getI64PairFirstGPRNum(RegNum)));
+          RegNumT::fixme(RegMIPS32::get64PairFirstRegNum(RegNum)));
       RegisterArg64->getHi()->setRegNum(
-          RegNumT::fixme(RegMIPS32::getI64PairSecondGPRNum(RegNum)));
+          RegNumT::fixme(RegMIPS32::get64PairSecondRegNum(RegNum)));
     } break;
     }
     Context.insert<InstAssign>(Arg, RegisterArg);
@@ -1710,9 +1710,9 @@ void TargetMIPS32::lowerCall(const InstCall *Instr) {
       Operand *Lo = loOperand(Arg);
       Operand *Hi = hiOperand(Arg);
       GPRArgs.push_back(
-          std::make_pair(Lo, RegMIPS32::getI64PairFirstGPRNum(Reg)));
+          std::make_pair(Lo, RegMIPS32::get64PairFirstRegNum(Reg)));
       GPRArgs.push_back(
-          std::make_pair(Hi, RegMIPS32::getI64PairSecondGPRNum(Reg)));
+          std::make_pair(Hi, RegMIPS32::get64PairSecondRegNum(Reg)));
     } else if (isScalarIntegerType(Ty)) {
       GPRArgs.push_back(std::make_pair(Arg, Reg));
     } else {