Commit 2613cdba by Shahbaz Youssefi Committed by Commit Bot

Vulkan: Fix barriers between render passes

Color attachment output ordering applies to commands recorded within a render pass subpass. We still need execution barriers between render passes (and subpasses, but we don't use them). Bug: angleproject:3347 Change-Id: Ifaddaeac35347d8a35e771f46a29047d52c9541c Reviewed-on: https://chromium-review.googlesource.com/c/angle/angle/+/1713085Reviewed-by: 's avatarFei Yang <fei.yang@arm.com> Reviewed-by: 's avatarJamie Madill <jmadill@chromium.org> Commit-Queue: Shahbaz Youssefi <syoussefi@chromium.org>
parent 70cded6a
...@@ -59,9 +59,7 @@ struct ImageMemoryBarrierData ...@@ -59,9 +59,7 @@ struct ImageMemoryBarrierData
// If access is read-only, the execution barrier can be skipped altogether if retransitioning to // If access is read-only, the execution barrier can be skipped altogether if retransitioning to
// the same layout. This is because read-after-read does not need an execution or memory // the same layout. This is because read-after-read does not need an execution or memory
// barrier. Vulkan additionally guarantees color attachment and depth/stencil attachment // barrier.
// read/writes to be in execution order, so they too won't need a barrier if transitioning to
// the same layout.
// //
// Otherwise, same-layout transitions only require an execution barrier (and not a memory // Otherwise, same-layout transitions only require an execution barrier (and not a memory
// barrier). // barrier).
...@@ -171,28 +169,28 @@ constexpr angle::PackedEnumMap<ImageLayout, ImageMemoryBarrierData> kImageMemory ...@@ -171,28 +169,28 @@ constexpr angle::PackedEnumMap<ImageLayout, ImageMemoryBarrierData> kImageMemory
VK_ACCESS_COLOR_ATTACHMENT_READ_BIT | VK_ACCESS_COLOR_ATTACHMENT_WRITE_BIT, VK_ACCESS_COLOR_ATTACHMENT_READ_BIT | VK_ACCESS_COLOR_ATTACHMENT_WRITE_BIT,
// Transition from: all writes must finish before barrier. // Transition from: all writes must finish before barrier.
VK_ACCESS_COLOR_ATTACHMENT_WRITE_BIT, VK_ACCESS_COLOR_ATTACHMENT_WRITE_BIT,
false, true,
}, },
}, },
{ {
ImageLayout::DepthStencilAttachment, ImageLayout::DepthStencilAttachment,
{ {
VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL, VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL,
VK_PIPELINE_STAGE_EARLY_FRAGMENT_TESTS_BIT, VK_PIPELINE_STAGE_EARLY_FRAGMENT_TESTS_BIT | VK_PIPELINE_STAGE_LATE_FRAGMENT_TESTS_BIT,
VK_PIPELINE_STAGE_LATE_FRAGMENT_TESTS_BIT, VK_PIPELINE_STAGE_EARLY_FRAGMENT_TESTS_BIT | VK_PIPELINE_STAGE_LATE_FRAGMENT_TESTS_BIT,
// Transition to: all reads and writes must happen after barrier. // Transition to: all reads and writes must happen after barrier.
VK_ACCESS_DEPTH_STENCIL_ATTACHMENT_READ_BIT | VK_ACCESS_DEPTH_STENCIL_ATTACHMENT_WRITE_BIT, VK_ACCESS_DEPTH_STENCIL_ATTACHMENT_READ_BIT | VK_ACCESS_DEPTH_STENCIL_ATTACHMENT_WRITE_BIT,
// Transition from: all writes must finish before barrier. // Transition from: all writes must finish before barrier.
VK_ACCESS_DEPTH_STENCIL_ATTACHMENT_WRITE_BIT, VK_ACCESS_DEPTH_STENCIL_ATTACHMENT_WRITE_BIT,
false, true,
}, },
}, },
{ {
ImageLayout::AllGraphicsShadersReadOnly, ImageLayout::AllGraphicsShadersReadOnly,
{ {
VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL, VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL,
VK_PIPELINE_STAGE_VERTEX_SHADER_BIT, VK_PIPELINE_STAGE_ALL_GRAPHICS_BIT,
VK_PIPELINE_STAGE_FRAGMENT_SHADER_BIT, VK_PIPELINE_STAGE_ALL_GRAPHICS_BIT,
// Transition to: all reads must happen after barrier. // Transition to: all reads must happen after barrier.
VK_ACCESS_SHADER_READ_BIT, VK_ACCESS_SHADER_READ_BIT,
// Transition from: RAR and WAR don't need memory barrier. // Transition from: RAR and WAR don't need memory barrier.
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment