Always collect variables when generating HLSL

src/compiler/translator/Compiler.cpp

@@ -329,7 +329,7 @@ TIntermNode *TCompiler::compileTreeImpl(const char *const shaderStrings[],
             RemovePow(root);
         }
 
-        if (success && (compileOptions & SH_VARIABLES))
+        if (success && shouldCollectVariables(compileOptions))
         {
             collectVariables(root);
             if (compileOptions & SH_ENFORCE_PACKING_RESTRICTIONS)

src/compiler/translator/Compiler.h

@@ -164,6 +164,11 @@ class TCompiler : public TShHandleBase
     std::vector<sh::Varying> varyings;
     std::vector<sh::InterfaceBlock> interfaceBlocks;
 
+    virtual bool shouldCollectVariables(int compileOptions)
+    {
+        return (compileOptions & SH_VARIABLES) != 0;
+    }
+
   private:
     // Creates the function call DAG for further analysis, returning false if there is a recursion
     bool initCallDag(TIntermNode *root);

src/compiler/translator/TranslatorHLSL.h

@@ -13,7 +13,7 @@ class TranslatorHLSL : public TCompiler
 {
   public:
     TranslatorHLSL(sh::GLenum type, ShShaderSpec spec, ShShaderOutput output);
-    virtual TranslatorHLSL *getAsTranslatorHLSL() { return this; }
+    TranslatorHLSL *getAsTranslatorHLSL() override { return this; }
 
     bool hasInterfaceBlock(const std::string &interfaceBlockName) const;
     unsigned int getInterfaceBlockRegister(const std::string &interfaceBlockName) const;
@@ -22,7 +22,10 @@ class TranslatorHLSL : public TCompiler
     unsigned int getUniformRegister(const std::string &uniformName) const;
 
   protected:
-    virtual void translate(TIntermNode *root, int compileOptions);
+    void translate(TIntermNode *root, int compileOptions) override;
+
+    // collectVariables needs to be run always so registers can be assigned.
+    bool shouldCollectVariables(int compileOptions) override { return true; }
 
     std::map<std::string, unsigned int> mInterfaceBlockRegisterMap;
     std::map<std::string, unsigned int> mUniformRegisterMap;