Commit 9fe25e9e by Jamie Madill

Add a uniform register query to the translator.

This returns the uniform index that we assigned for default uniforms. All the dependent structure offsets can be determined from the base register, so we won't have to store uniform information in the shader variable. BUG=angle:466 Change-Id: I0dd05251e8dba00c20d09fd865dfb150de56738e Reviewed-on: https://chromium-review.googlesource.com/207254Tested-by: 's avatarJamie Madill <jmadill@chromium.org> Reviewed-by: 's avatarZhenyao Mo <zmo@chromium.org> Reviewed-by: 's avatarNicolas Capens <capn@chromium.org>
parent 18fe4294
...@@ -43,7 +43,7 @@ extern "C" { ...@@ -43,7 +43,7 @@ extern "C" {
// Version number for shader translation API. // Version number for shader translation API.
// It is incremented every time the API changes. // It is incremented every time the API changes.
#define ANGLE_SH_VERSION 127 #define ANGLE_SH_VERSION 128
typedef enum { typedef enum {
SH_GLES2_SPEC = 0x8B40, SH_GLES2_SPEC = 0x8B40,
...@@ -495,6 +495,18 @@ COMPILER_EXPORT bool ShGetInterfaceBlockRegister(const ShHandle handle, ...@@ -495,6 +495,18 @@ COMPILER_EXPORT bool ShGetInterfaceBlockRegister(const ShHandle handle,
const char *interfaceBlockName, const char *interfaceBlockName,
unsigned int *indexOut); unsigned int *indexOut);
// Gives the compiler-assigned register for uniforms in the default
// interface block.
// The method writes the value to the output variable "indexOut".
// Returns true if it found a valid default uniform, false otherwise.
// Parameters:
// handle: Specifies the compiler
// interfaceBlockName: Specifies the uniform
// indexOut: output variable that stores the assigned register
COMPILER_EXPORT bool ShGetUniformRegister(const ShHandle handle,
const char *uniformName,
unsigned int *indexOut);
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
......
...@@ -242,6 +242,11 @@ const std::map<std::string, unsigned int> &OutputHLSL::getInterfaceBlockRegister ...@@ -242,6 +242,11 @@ const std::map<std::string, unsigned int> &OutputHLSL::getInterfaceBlockRegister
return mUniformHLSL->getInterfaceBlockRegisterMap(); return mUniformHLSL->getInterfaceBlockRegisterMap();
} }
const std::map<std::string, unsigned int> &OutputHLSL::getUniformRegisterMap() const
{
return mUniformHLSL->getUniformRegisterMap();
}
int OutputHLSL::vectorSize(const TType &type) const int OutputHLSL::vectorSize(const TType &type) const
{ {
int elementSize = type.isMatrix() ? type.getCols() : 1; int elementSize = type.isMatrix() ? type.getCols() : 1;
......
...@@ -40,6 +40,7 @@ class OutputHLSL : public TIntermTraverser ...@@ -40,6 +40,7 @@ class OutputHLSL : public TIntermTraverser
const std::vector<sh::Varying> &getVaryings() const; const std::vector<sh::Varying> &getVaryings() const;
const std::map<std::string, unsigned int> &getInterfaceBlockRegisterMap() const; const std::map<std::string, unsigned int> &getInterfaceBlockRegisterMap() const;
const std::map<std::string, unsigned int> &getUniformRegisterMap() const;
static TString initializer(const TType &type); static TString initializer(const TType &type);
......
...@@ -499,3 +499,28 @@ bool ShGetInterfaceBlockRegister(const ShHandle handle, ...@@ -499,3 +499,28 @@ bool ShGetInterfaceBlockRegister(const ShHandle handle,
*indexOut = translator->getInterfaceBlockRegister(interfaceBlockName); *indexOut = translator->getInterfaceBlockRegister(interfaceBlockName);
return true; return true;
} }
bool ShGetUniformRegister(const ShHandle handle,
const char *uniformName,
unsigned int *indexOut)
{
if (!handle || !uniformName || !indexOut)
{
return false;
}
TShHandleBase* base = static_cast<TShHandleBase*>(handle);
TranslatorHLSL* translator = base->getAsTranslatorHLSL();
if (!translator)
{
return false;
}
if (!translator->hasUniform(uniformName))
{
return false;
}
*indexOut = translator->getUniformRegister(uniformName);
return true;
}
...@@ -28,6 +28,7 @@ void TranslatorHLSL::translate(TIntermNode *root) ...@@ -28,6 +28,7 @@ void TranslatorHLSL::translate(TIntermNode *root)
interfaceBlocks = outputHLSL.getInterfaceBlocks(); interfaceBlocks = outputHLSL.getInterfaceBlocks();
mInterfaceBlockRegisterMap = outputHLSL.getInterfaceBlockRegisterMap(); mInterfaceBlockRegisterMap = outputHLSL.getInterfaceBlockRegisterMap();
mUniformRegisterMap = outputHLSL.getUniformRegisterMap();
} }
bool TranslatorHLSL::hasInterfaceBlock(const std::string &interfaceBlockName) const bool TranslatorHLSL::hasInterfaceBlock(const std::string &interfaceBlockName) const
...@@ -40,3 +41,14 @@ unsigned int TranslatorHLSL::getInterfaceBlockRegister(const std::string &interf ...@@ -40,3 +41,14 @@ unsigned int TranslatorHLSL::getInterfaceBlockRegister(const std::string &interf
ASSERT(hasInterfaceBlock(interfaceBlockName)); ASSERT(hasInterfaceBlock(interfaceBlockName));
return mInterfaceBlockRegisterMap.find(interfaceBlockName)->second; return mInterfaceBlockRegisterMap.find(interfaceBlockName)->second;
} }
bool TranslatorHLSL::hasUniform(const std::string &uniformName) const
{
return (mUniformRegisterMap.count(uniformName) > 0);
}
unsigned int TranslatorHLSL::getUniformRegister(const std::string &uniformName) const
{
ASSERT(hasUniform(uniformName));
return mUniformRegisterMap.find(uniformName)->second;
}
...@@ -19,10 +19,14 @@ class TranslatorHLSL : public TCompiler ...@@ -19,10 +19,14 @@ class TranslatorHLSL : public TCompiler
bool hasInterfaceBlock(const std::string &interfaceBlockName) const; bool hasInterfaceBlock(const std::string &interfaceBlockName) const;
unsigned int getInterfaceBlockRegister(const std::string &interfaceBlockName) const; unsigned int getInterfaceBlockRegister(const std::string &interfaceBlockName) const;
bool hasUniform(const std::string &uniformName) const;
unsigned int getUniformRegister(const std::string &uniformName) const;
protected: protected:
virtual void translate(TIntermNode* root); virtual void translate(TIntermNode* root);
std::map<std::string, unsigned int> mInterfaceBlockRegisterMap; std::map<std::string, unsigned int> mInterfaceBlockRegisterMap;
std::map<std::string, unsigned int> mUniformRegisterMap;
}; };
#endif // COMPILER_TRANSLATORHLSL_H_ #endif // COMPILER_TRANSLATORHLSL_H_
...@@ -119,13 +119,15 @@ void UniformHLSL::reserveInterfaceBlockRegisters(unsigned int registerCount) ...@@ -119,13 +119,15 @@ void UniformHLSL::reserveInterfaceBlockRegisters(unsigned int registerCount)
mInterfaceBlockRegister = registerCount; mInterfaceBlockRegister = registerCount;
} }
int UniformHLSL::declareUniformAndAssignRegister(const TType &type, const TString &name) unsigned int UniformHLSL::declareUniformAndAssignRegister(const TType &type, const TString &name)
{ {
int registerIndex = (IsSampler(type.getBasicType()) ? mSamplerRegister : mUniformRegister); unsigned int registerIndex = (IsSampler(type.getBasicType()) ? mSamplerRegister : mUniformRegister);
declareUniformToList(type, name, registerIndex, &mActiveUniforms); declareUniformToList(type, name, registerIndex, &mActiveUniforms);
unsigned int registerCount = HLSLVariableRegisterCount(mActiveUniforms.back(), mOutputType); const sh::Uniform &activeUniform = mActiveUniforms.back();
unsigned int registerCount = HLSLVariableRegisterCount(activeUniform, mOutputType);
mUniformRegisterMap[activeUniform.name] = registerIndex;
if (IsSampler(type.getBasicType())) if (IsSampler(type.getBasicType()))
{ {
...@@ -187,7 +189,7 @@ TString UniformHLSL::uniformsHeader(ShShaderOutput outputType, const ReferencedS ...@@ -187,7 +189,7 @@ TString UniformHLSL::uniformsHeader(ShShaderOutput outputType, const ReferencedS
const TType &type = uniform.getType(); const TType &type = uniform.getType();
const TString &name = uniform.getSymbol(); const TString &name = uniform.getSymbol();
int registerIndex = declareUniformAndAssignRegister(type, name); unsigned int registerIndex = declareUniformAndAssignRegister(type, name);
if (outputType == SH_HLSL11_OUTPUT && IsSampler(type.getBasicType())) // Also declare the texture if (outputType == SH_HLSL11_OUTPUT && IsSampler(type.getBasicType())) // Also declare the texture
{ {
......
...@@ -36,6 +36,10 @@ class UniformHLSL ...@@ -36,6 +36,10 @@ class UniformHLSL
{ {
return mInterfaceBlockRegisterMap; return mInterfaceBlockRegisterMap;
} }
const std::map<std::string, unsigned int> &getUniformRegisterMap() const
{
return mUniformRegisterMap;
}
private: private:
TString interfaceBlockString(const TInterfaceBlock &interfaceBlock, unsigned int registerIndex, unsigned int arrayIndex); TString interfaceBlockString(const TInterfaceBlock &interfaceBlock, unsigned int registerIndex, unsigned int arrayIndex);
...@@ -43,7 +47,7 @@ class UniformHLSL ...@@ -43,7 +47,7 @@ class UniformHLSL
TString interfaceBlockStructString(const TInterfaceBlock &interfaceBlock); TString interfaceBlockStructString(const TInterfaceBlock &interfaceBlock);
// Returns the uniform's register index // Returns the uniform's register index
int declareUniformAndAssignRegister(const TType &type, const TString &name); unsigned int declareUniformAndAssignRegister(const TType &type, const TString &name);
void declareUniformToList(const TType &type, const TString &name, int registerIndex, std::vector<Uniform> *output); void declareUniformToList(const TType &type, const TString &name, int registerIndex, std::vector<Uniform> *output);
unsigned int mUniformRegister; unsigned int mUniformRegister;
...@@ -55,6 +59,7 @@ class UniformHLSL ...@@ -55,6 +59,7 @@ class UniformHLSL
std::vector<Uniform> mActiveUniforms; std::vector<Uniform> mActiveUniforms;
std::vector<InterfaceBlock> mActiveInterfaceBlocks; std::vector<InterfaceBlock> mActiveInterfaceBlocks;
std::map<std::string, unsigned int> mInterfaceBlockRegisterMap; std::map<std::string, unsigned int> mInterfaceBlockRegisterMap;
std::map<std::string, unsigned int> mUniformRegisterMap;
}; };
} }
......
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