Commit 48891674 by John Kessenich

SPV: Use a more accurate MemorySemanticsAllMemory mask.

parent cd26144d
...@@ -70,7 +70,17 @@ const Id NoType = 0; ...@@ -70,7 +70,17 @@ const Id NoType = 0;
const unsigned int BadValue = 0xFFFFFFFF; const unsigned int BadValue = 0xFFFFFFFF;
const Decoration NoPrecision = (Decoration)BadValue; const Decoration NoPrecision = (Decoration)BadValue;
const MemorySemanticsMask MemorySemanticsAllMemory = (MemorySemanticsMask)0x3FF; const MemorySemanticsMask MemorySemanticsAllMemory =
(MemorySemanticsMask)(MemorySemanticsAcquireMask |
MemorySemanticsReleaseMask |
MemorySemanticsAcquireReleaseMask |
MemorySemanticsSequentiallyConsistentMask |
MemorySemanticsUniformMemoryMask |
MemorySemanticsSubgroupMemoryMask |
MemorySemanticsWorkgroupMemoryMask |
MemorySemanticsCrossWorkgroupMemoryMask |
MemorySemanticsAtomicCounterMemoryMask |
MemorySemanticsImageMemoryMask);
// //
// SPIR-V IR instruction. // SPIR-V IR instruction.
......
...@@ -45,7 +45,7 @@ Linked compute stage: ...@@ -45,7 +45,7 @@ Linked compute stage:
3: TypeFunction 2 3: TypeFunction 2
6: TypeInt 32 0 6: TypeInt 32 0
7: 6(int) Constant 1 7: 6(int) Constant 1
8: 6(int) Constant 1023 8: 6(int) Constant 4062
9: 6(int) Constant 0 9: 6(int) Constant 0
10: TypeFloat 32 10: TypeFloat 32
11: TypeVector 10(float) 3 11: TypeVector 10(float) 3
......
...@@ -71,7 +71,7 @@ Linked tessellation control stage: ...@@ -71,7 +71,7 @@ Linked tessellation control stage:
3: TypeFunction 2 3: TypeFunction 2
6: TypeInt 32 0 6: TypeInt 32 0
7: 6(int) Constant 1 7: 6(int) Constant 1
8: 6(int) Constant 1023 8: 6(int) Constant 4062
9: 6(int) Constant 0 9: 6(int) Constant 0
10: TypeInt 32 1 10: TypeInt 32 1
11: TypePointer Function 10(int) 11: TypePointer Function 10(int)
......
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