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Chen Yisong
glslang
Commits
844e0773
Unverified
Commit
844e0773
authored
Nov 14, 2018
by
John Kessenich
Committed by
GitHub
Nov 14, 2018
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Merge pull request #1580 from TiemoJung/float1_times_scalar_fix
HLSL: fix invalid spir-v vector * scalar for float1
parents
e323a454
697fdf01
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2 changed files
with
5 additions
and
7 deletions
+5
-7
GlslangToSpv.cpp
SPIRV/GlslangToSpv.cpp
+3
-1
hlsl.float1.frag.out
Test/baseResults/hlsl.float1.frag.out
+2
-6
No files found.
SPIRV/GlslangToSpv.cpp
View file @
844e0773
...
...
@@ -4633,7 +4633,9 @@ spv::Id TGlslangToSpvTraverser::createBinaryOperation(glslang::TOperator op, OpD
assert
(
builder
.
isScalar
(
right
));
needMatchingVectors
=
false
;
binOp
=
spv
::
OpVectorTimesScalar
;
}
else
}
else
if
(
isFloat
)
binOp
=
spv
::
OpFMul
;
else
binOp
=
spv
::
OpIMul
;
break
;
case
glslang
:
:
EOpVectorTimesMatrix
:
...
...
Test/baseResults/hlsl.float1.frag.out
View file @
844e0773
...
...
@@ -64,10 +64,6 @@ gl_FragCoord origin is upper left
0:? 'f1' ( global 1-component vector of float)
0:? 'scalar' ( global float)
error: SPIRV-Tools Validation Errors
error: Expected int scalar or vector type as Result Type: IMul
%20 = OpIMul %float %18 %19
// Module Version 10000
// Generated by (magic number): 80007
// Id's are bound by 27
...
...
@@ -106,10 +102,10 @@ error: Expected int scalar or vector type as Result Type: IMul
12: Label
18: 6(float) Load 14(f1)
19: 6(float) Load 16(scalar)
20: 6(float)
I
Mul 18 19
20: 6(float)
F
Mul 18 19
21: 6(float) Load 9(inFloat1)
22: 6(float) Load 10(inScalar)
23: 6(float)
I
Mul 21 22
23: 6(float)
F
Mul 21 22
24: 6(float) FAdd 20 23
ReturnValue 24
FunctionEnd
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