For operations such as
    t0 = t1 + t2
Subzero's pattern for arithmetic operations generates two address code that
looks like
    movl ...t1..., %ecx
    addl ...t2..., %ecx // t0 is in %ecx

When register pressure is high this sometimes becomes:
    movl ...t2..., SPILL
    movl ...t1..., %ecx
    addl SPILL, %ecx // t0 is in %ecx

This CL takes advantage of cases where the use of t2 is the last one, so the
register that held t2 before the operation can be reused.  The optimization
simply swaps the (commutative) operation to
    t0 = t2 + t1
which then generates code as
    movl ...t2..., %ecx
    addl ...t1..., %ecx // t0 is in %ecx

This optimization is used for any commutative operation, which now includes
Fadd and Fmul, which were erroneously marked as non-commutative.  See the
rationale in IceInst.def for the IEEE wordings.

BUG=
R=jfb@chromium.org, stichnot@chromium.org

Review URL: https://codereview.chromium.org/1371703003 .