The intrinsic is lowered using the standard technique of masking off the FP sign bit, which is the high-order bit.

To construct this mask, we use the existing trick of loading a vector register with all "1" bits, then logical-shift-right by one bit.

In the future, we should add 128-bit vector values to the constant pool and force them to memory, and this could be used for the other routines that synthesize a vector constant.

BUG= https://code.google.com/p/nativeclient/issues/detail?id=4097
R=jvoung@chromium.org

Review URL: https://codereview.chromium.org/1022573004