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Lower a few basic ARM binops for i{8,16,32,64}. · 2971997aJan Voung authored
Do basic lowering for add, sub, and, or, xor, mul. We don't yet take advantage of commuting immediate operands (e.g., use rsb to reverse subtract instead of sub) or inverting immediate operands (use bic to bit clear instead of using and). The binary operations can set the flags register (e.g., to have the carry bit for use with a subsequent adc instruction). That is optional for the "data processing" instructions. I'm not yet able to compile 8bit.pnacl.ll and 64bit.pnacl.ll so 8-bit and 64-bit are not well tested yet. Only tests are in the arith.ll file (like arith-opt.ll, but assembled instead of testing the "verbose inst" output). Not doing divide yet. ARM divide by 0 does not trap, but PNaCl requires uniform behavior for such bad code. Thus, in LLVM we insert a 0 check and would have to do the same. BUG= https://code.google.com/p/nativeclient/issues/detail?id=4076 R=stichnot@chromium.org Review URL: https://codereview.chromium.org/1127003003
2971997a
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