Make ARM RegNames[] static like X86 (no ARM syms in X86-only build).

The X86 code was switch out here: https://codereview.chromium.org/1216933015/diff/150001/src/IceTargetLoweringX86Base.h The important bit might be that it's static const char * instead of static IceString. This removes static ctor/dtor for that array, which LTO doesn't seem to be able to optimize out, leaving ARM and MIPS symbols in the X86-only build. After changing it to static const char *, LTO is able to optimize out the ARM and MIPS symbols in the x86-only build, saving about 3KB of .text and few bytes of .rodata. BUG=none R=jpp@chromium.org Review URL: https://codereview.chromium.org/1246013004 .

Make ARM RegNames[] static like X86 (no ARM syms in X86-only build).
0dab0324 · Jan Voung · 5aeed955 · 0dab0324 · 0dab0324 · 0dab0324
Commit 0dab0324 authored Jul 21, 2015 by Jan Voung
4 changed files
--- a/src/IceTargetLoweringARM32.cpp
+++ b/src/IceTargetLoweringARM32.cpp
@@ -348,17 +348,17 @@ bool TargetARM32::doBranchOpt(Inst *I, const CfgNode *NextNode) {
  return false;
 }
-IceString TargetARM32::RegNames[] = {
+IceString TargetARM32::getRegName(SizeT RegNum, Type Ty) const {
+  assert(RegNum < RegARM32::Reg_NUM);
+  (void)Ty;
+  static const char *RegNames[] = {
 #define X(val, encode, name, scratch, preserved, stackptr, frameptr, isInt,    \
          isFP)                                                                \
  name,
-    REGARM32_TABLE
+      REGARM32_TABLE
 #undef X
-};
+  };
-IceString TargetARM32::getRegName(SizeT RegNum, Type Ty) const {
-  assert(RegNum < RegARM32::Reg_NUM);
-  (void)Ty;
  return RegNames[RegNum];
 }

--- a/src/IceTargetLoweringARM32.h
+++ b/src/IceTargetLoweringARM32.h
@@ -389,7 +389,6 @@ protected:
  llvm::SmallBitVector ScratchRegs;
  llvm::SmallBitVector RegsUsed;
  VarList PhysicalRegisters[IceType_NUM];
-  static IceString RegNames[];
  /// Helper class that understands the Calling Convention and register
  /// assignments. The first few integer type parameters can use r0-r3,

--- a/src/IceTargetLoweringMIPS32.cpp
+++ b/src/IceTargetLoweringMIPS32.cpp
@@ -220,17 +220,16 @@ bool TargetMIPS32::doBranchOpt(Inst *I, const CfgNode *NextNode) {
  return false;
 }
-IceString TargetMIPS32::RegNames[] = {
+IceString TargetMIPS32::getRegName(SizeT RegNum, Type Ty) const {
+  assert(RegNum < RegMIPS32::Reg_NUM);
+  (void)Ty;
+  static const char *RegNames[] = {
 #define X(val, encode, name, scratch, preserved, stackptr, frameptr, isInt,    \
          isFP)                                                                \
  name,
-    REGMIPS32_TABLE
+      REGMIPS32_TABLE
 #undef X
-};
+  };
-IceString TargetMIPS32::getRegName(SizeT RegNum, Type Ty) const {
-  assert(RegNum < RegMIPS32::Reg_NUM);
-  (void)Ty;
  return RegNames[RegNum];
 }

--- a/src/IceTargetLoweringMIPS32.h
+++ b/src/IceTargetLoweringMIPS32.h
@@ -129,7 +129,6 @@ protected:
  llvm::SmallBitVector ScratchRegs;
  llvm::SmallBitVector RegsUsed;
  VarList PhysicalRegisters[IceType_NUM];
-  static IceString RegNames[];
 private:
  ~TargetMIPS32() override = default;