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swiftshader
Commit 0faec4c9 by Jan Voung
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Rearrange emit vs emitIAS. Wait till function is done before dumping text.

Eventually, I wanted to have a flag "UseELFWriter" like: https://codereview.chromium.org/678533005/diff/120001/src/IceCfg.cpp Where the emit OStream would not have text, and only have binary. This refactor hopefully means fewer places to check for a flag to disable the text version of IAS, and be able to write binary. Otherwise, there are some text labels for branches that are still being dumped out. BUG=none R=stichnot@chromium.org Review URL: https://codereview.chromium.org/700263003
parent bfb410dd
Showing with 194 additions and 133 deletions
src/IceCfg.cpp
......@@ -390,6 +390,22 @@ void Cfg::doBranchOpt() {
// ======================== Dump routines ======================== //
void Cfg::emitTextHeader(const IceString &MangledName) {
Ostream &Str = Ctx->getStrEmit();
Str << "\t.text\n";
if (Ctx->getFlags().FunctionSections)
Str << "\t.section\t.text." << MangledName << ",\"ax\",@progbits\n";
if (!getInternal() || Ctx->getFlags().DisableInternal) {
Str << "\t.globl\t" << MangledName << "\n";
Str << "\t.type\t" << MangledName << ",@function\n";
}
Str << "\t.p2align " << getTarget()->getBundleAlignLog2Bytes() << ",0x";
for (AsmCodeByte I : getTarget()->getNonExecBundlePadding())
Str.write_hex(I);
Str << "\n";
Str << MangledName << ":\n";
}
void Cfg::emit() {
TimerMarker T(TimerStack::TT_emit, this);
if (Ctx->getFlags().DecorateAsm) {
......@@ -409,23 +425,23 @@ void Cfg::emit() {
<< " -o=MyObj.o"
<< "\n\n";
}
Str << "\t.text\n";
IceString MangledName = getContext()->mangleName(getFunctionName());
if (Ctx->getFlags().FunctionSections)
Str << "\t.section\t.text." << MangledName << ",\"ax\",@progbits\n";
if (!getInternal() || Ctx->getFlags().DisableInternal) {
Str << "\t.globl\t" << MangledName << "\n";
Str << "\t.type\t" << MangledName << ",@function\n";
}
Str << "\t.p2align " << getTarget()->getBundleAlignLog2Bytes() << ",0x";
for (AsmCodeByte I : getTarget()->getNonExecBundlePadding())
Str.write_hex(I);
Str << "\n";
emitTextHeader(MangledName);
for (CfgNode *Node : Nodes)
Node->emit(this);
Str << "\n";
}
void Cfg::emitIAS() {
TimerMarker T(TimerStack::TT_emit, this);
assert(!Ctx->getFlags().DecorateAsm);
IceString MangledName = getContext()->mangleName(getFunctionName());
emitTextHeader(MangledName);
for (CfgNode *Node : Nodes)
Node->emitIAS(this);
getAssembler<Assembler>()->emitIASBytes(Ctx);
}
// Dumps the IR with an optional introductory message.
void Cfg::dump(const IceString &Message) {
if (!Ctx->isVerbose())
......
src/IceCfg.h
......@@ -94,9 +94,6 @@ public:
template <typename T> T *getAssembler() const {
return static_cast<T *>(TargetAssembler.get());
}
bool useIntegratedAssembler() const {
return getContext()->getFlags().UseIntegratedAssembler;
}
bool hasComputedFrame() const;
bool getFocusedTiming() const { return FocusedTiming; }
void setFocusedTiming() { FocusedTiming = true; }
......@@ -131,6 +128,8 @@ public:
const CfgNode *getCurrentNode() const { return CurrentNode; }
void emit();
void emitIAS();
void emitTextHeader(const IceString &MangledName);
void dump(const IceString &Message = "");
// Allocate data of type T using the per-Cfg allocator.
......
src/IceCfgNode.cpp
......@@ -864,6 +864,24 @@ void emitLiveRangesEnded(Ostream &Str, const Cfg *Func, const Inst *Instr,
}
}
void updateStats(Cfg *Func, const Inst *I) {
// Update emitted instruction count, plus fill/spill count for
// Variable operands without a physical register.
if (uint32_t Count = I->getEmitInstCount()) {
Func->getContext()->statsUpdateEmitted(Count);
if (Variable *Dest = I->getDest()) {
if (!Dest->hasReg())
Func->getContext()->statsUpdateFills();
}
for (SizeT S = 0; S < I->getSrcSize(); ++S) {
if (Variable *Src = llvm::dyn_cast<Variable>(I->getSrc(S))) {
if (!Src->hasReg())
Func->getContext()->statsUpdateSpills();
}
}
}
}
} // end of anonymous namespace
void CfgNode::emit(Cfg *Func) const {
......@@ -871,14 +889,7 @@ void CfgNode::emit(Cfg *Func) const {
Ostream &Str = Func->getContext()->getStrEmit();
Liveness *Liveness = Func->getLiveness();
bool DecorateAsm = Liveness && Func->getContext()->getFlags().DecorateAsm;
if (Func->getEntryNode() == this) {
Str << Func->getContext()->mangleName(Func->getFunctionName()) << ":\n";
}
Str << getAsmName() << ":\n";
if (Func->useIntegratedAssembler()) {
Assembler *Asm = Func->getAssembler<Assembler>();
Asm->BindCfgNodeLabel(getIndex());
}
std::vector<SizeT> LiveRegCount(Func->getTarget()->getNumRegisters());
if (DecorateAsm)
emitRegisterUsage(Str, Func, this, true, LiveRegCount);
......@@ -899,34 +910,37 @@ void CfgNode::emit(Cfg *Func) const {
++LiveRegCount[Dest->getRegNum()];
continue;
}
if (Func->useIntegratedAssembler()) {
I->emitIAS(Func);
} else {
I->emit(Func);
if (DecorateAsm)
emitLiveRangesEnded(Str, Func, I, LiveRegCount);
Str << "\n";
}
// Update emitted instruction count, plus fill/spill count for
// Variable operands without a physical register.
if (uint32_t Count = I->getEmitInstCount()) {
Func->getContext()->statsUpdateEmitted(Count);
if (Variable *Dest = I->getDest()) {
if (!Dest->hasReg())
Func->getContext()->statsUpdateFills();
}
for (SizeT S = 0; S < I->getSrcSize(); ++S) {
if (Variable *Src = llvm::dyn_cast<Variable>(I->getSrc(S))) {
if (!Src->hasReg())
Func->getContext()->statsUpdateSpills();
}
}
}
I->emit(Func);
if (DecorateAsm)
emitLiveRangesEnded(Str, Func, I, LiveRegCount);
Str << "\n";
updateStats(Func, I);
}
if (DecorateAsm)
emitRegisterUsage(Str, Func, this, false, LiveRegCount);
}
void CfgNode::emitIAS(Cfg *Func) const {
Func->setCurrentNode(this);
Assembler *Asm = Func->getAssembler<Assembler>();
Asm->BindCfgNodeLabel(getIndex());
for (InstPhi *Phi : Phis) {
if (Phi->isDeleted())
continue;
// Emitting a Phi instruction should cause an error.
Inst *Instr = Phi;
Instr->emitIAS(Func);
}
for (Inst *I : Insts) {
if (I->isDeleted())
continue;
if (I->isRedundantAssign())
continue;
I->emitIAS(Func);
updateStats(Func, I);
}
}
void CfgNode::dump(Cfg *Func) const {
Func->setCurrentNode(this);
Ostream &Str = Func->getContext()->getStrDump();
......
src/IceCfgNode.h
......@@ -82,6 +82,7 @@ public:
void contractIfEmpty();
void doBranchOpt(const CfgNode *NextNode);
void emit(Cfg *Func) const;
void emitIAS(Cfg *Func) const;
void dump(Cfg *Func) const;
private:
......
src/IceTranslator.cpp
......@@ -83,7 +83,11 @@ void Translator::translateFcn(Cfg *Fcn) {
ErrorStatus = true;
}
Func->emit();
if (Ctx->getFlags().UseIntegratedAssembler) {
Func->emitIAS();
} else {
Func->emit();
}
Ctx->dumpStats(Func->getFunctionName());
}
......
src/assembler.cpp
......@@ -19,7 +19,9 @@
//===----------------------------------------------------------------------===//
#include "assembler.h"
#include "IceGlobalContext.h"
#include "IceMemoryRegion.h"
#include "IceOperand.h"
namespace Ice {
......@@ -74,18 +76,6 @@ AssemblerBuffer::AssemblerBuffer(Assembler &assembler) : assembler_(assembler) {
AssemblerBuffer::~AssemblerBuffer() {}
// Returns the latest fixup at or after the given position, or nullptr if
// there is none. Assumes fixups were added in increasing order.
AssemblerFixup *AssemblerBuffer::GetLatestFixup(intptr_t position) const {
AssemblerFixup *latest_fixup = nullptr;
for (auto I = fixups_.rbegin(), E = fixups_.rend(); I != E; ++I) {
if ((*I)->position() < position)
return latest_fixup;
latest_fixup = *I;
}
return latest_fixup;
}
void AssemblerBuffer::ProcessFixups(const MemoryRegion &region) {
for (SizeT I = 0; I < fixups_.size(); ++I) {
AssemblerFixup *fixup = fixups_[I];
......@@ -133,4 +123,43 @@ void AssemblerBuffer::ExtendCapacity() {
assert(Size() == old_size);
}
void Assembler::emitIASBytes(GlobalContext *Ctx) const {
Ostream &Str = Ctx->getStrEmit();
intptr_t EndPosition = buffer_.Size();
intptr_t CurPosition = 0;
const intptr_t FixupSize = 4;
for (AssemblerBuffer::FixupList::const_iterator
FixupI = buffer_.fixups_begin(),
FixupE = buffer_.fixups_end(); FixupI != FixupE; ++FixupI) {
AssemblerFixup *NextFixup = *FixupI;
intptr_t NextFixupLoc = NextFixup->position();
for (intptr_t i = CurPosition; i < NextFixupLoc; ++i) {
Str << "\t.byte 0x";
Str.write_hex(buffer_.Load<uint8_t>(i));
Str << "\n";
}
Str << "\t.long ";
const ConstantRelocatable *Reloc = NextFixup->value();
if (Reloc->getSuppressMangling())
Str << Reloc->getName();
else
Str << Ctx->mangleName(Reloc->getName());
if (Reloc->getOffset()) {
Str << " + " << Reloc->getOffset();
}
bool IsPCRel = NextFixup->kind() == FK_PcRel_4;
if (IsPCRel)
Str << " - (. + " << FixupSize << ")";
Str << "\n";
CurPosition = NextFixupLoc + FixupSize;
assert(CurPosition <= EndPosition);
}
// Handle any bytes that are not prefixed by a fixup.
for (intptr_t i = CurPosition; i < EndPosition; ++i) {
Str << "\t.byte 0x";
Str.write_hex(buffer_.Load<uint8_t>(i));
Str << "\n";
}
}
} // end of namespace Ice
src/assembler.h
......@@ -162,8 +162,10 @@ public:
// Returns the position in the instruction stream.
intptr_t GetPosition() const { return cursor_ - contents_; }
// For bringup only.
AssemblerFixup *GetLatestFixup(intptr_t position) const;
// List of pool-allocated fixups.
typedef std::vector<AssemblerFixup *> FixupList;
FixupList::const_iterator fixups_begin() const { return fixups_.begin(); }
FixupList::const_iterator fixups_end() const { return fixups_.end(); }
private:
// The limit is set to kMinimumGap bytes before the end of the data area.
......@@ -175,7 +177,7 @@ private:
uintptr_t cursor_;
uintptr_t limit_;
Assembler &assembler_;
std::vector<AssemblerFixup *> fixups_;
FixupList fixups_;
#ifndef NDEBUG
bool fixups_processed_;
#endif // !NDEBUG
......@@ -206,7 +208,7 @@ class Assembler {
Assembler &operator=(const Assembler &) = delete;
public:
Assembler() {}
Assembler() : buffer_(*this) {}
virtual ~Assembler() {}
// Allocate a chunk of bytes using the per-Assembler allocator.
......@@ -226,8 +228,13 @@ public:
virtual void BindCfgNodeLabel(SizeT NodeNumber) = 0;
void emitIASBytes(GlobalContext *Ctx) const;
private:
llvm::BumpPtrAllocator Allocator;
protected:
AssemblerBuffer buffer_;
};
} // end of namespace Ice
......
src/assembler_ia32.h
......@@ -364,7 +364,7 @@ class AssemblerX86 : public Assembler {
AssemblerX86 &operator=(const AssemblerX86 &) = delete;
public:
explicit AssemblerX86(bool use_far_branches = false) : buffer_(*this) {
explicit AssemblerX86(bool use_far_branches = false) : Assembler() {
// This mode is only needed and implemented for MIPS and ARM.
assert(!use_far_branches);
(void)use_far_branches;
......@@ -829,15 +829,6 @@ public:
buffer_.FinalizeInstructions(region);
}
// Expose the buffer, for bringup...
intptr_t GetPosition() const { return buffer_.GetPosition(); }
template <typename T> T LoadBuffer(intptr_t position) const {
return buffer_.Load<T>(position);
}
AssemblerFixup *GetLatestFixup(intptr_t position) const {
return buffer_.GetLatestFixup(position);
}
private:
inline void EmitUint8(uint8_t value);
inline void EmitInt16(int16_t value);
......@@ -868,8 +859,6 @@ private:
LabelVector LocalLabels;
Label *GetOrCreateLabel(SizeT Number, LabelVector &Labels);
AssemblerBuffer buffer_;
};
inline void AssemblerX86::EmitUint8(uint8_t value) {
......
tests_lit/llvm2ice_tests/64bit.pnacl.ll
......@@ -44,7 +44,7 @@ entry:
; CHECK: mov dword ptr [esp + 16]
; CHECK: mov dword ptr [esp + 12]
; CHECK: call -4
; CALLTARGETS: call ignore64BitArgNoInline
; CALLTARGETS: .long ignore64BitArgNoInline
; CHECK: sub esp
; CHECK: mov dword ptr [esp + 4]
; CHECK: mov dword ptr [esp]
......@@ -52,7 +52,7 @@ entry:
; CHECK: mov dword ptr [esp + 16]
; CHECK: mov dword ptr [esp + 12]
; CHECK: call -4
; CALLTARGETS: call ignore64BitArgNoInline
; CALLTARGETS: .long ignore64BitArgNoInline
; CHECK: sub esp
; CHECK: mov dword ptr [esp + 4]
; CHECK: mov dword ptr [esp]
......@@ -60,7 +60,7 @@ entry:
; CHECK: mov dword ptr [esp + 16]
; CHECK: mov dword ptr [esp + 12]
; CHECK: call -4
; CALLTARGETS: call ignore64BitArgNoInline
; CALLTARGETS: .long ignore64BitArgNoInline
;
; OPTM1-LABEL: pass64BitArg
; OPTM1: sub esp
......@@ -104,7 +104,7 @@ entry:
; Bundle padding will push the call down.
; CHECK-NOT: mov
; CHECK: call -4
; CALLTARGETS: call ignore64BitArgNoInline
; CALLTARGETS: .long ignore64BitArgNoInline
;
; OPTM1-LABEL: pass64BitConstArg
; OPTM1: sub esp
......@@ -239,7 +239,7 @@ entry:
; CHECK-LABEL: div64BitSigned
; CALLTARGETS-LABEL: div64BitSigned
; CHECK: call -4
; CALLTARGETS: call __divdi3
; CALLTARGETS: .long __divdi3
; OPTM1-LABEL: div64BitSigned
; OPTM1: call -4
......@@ -254,7 +254,7 @@ entry:
; CHECK: mov dword ptr [esp + 12], 2874
; CHECK: mov dword ptr [esp + 8], 1942892530
; CHECK: call -4
; CALLTARGETS: call __divdi3
; CALLTARGETS: .long __divdi3
;
; OPTM1-LABEL: div64BitSignedConst
; OPTM1: mov dword ptr [esp + 12], 2874
......@@ -269,7 +269,7 @@ entry:
; CHECK-LABEL: div64BitUnsigned
; CALLTARGETS-LABEL: div64BitUnsigned
; CHECK: call -4
; CALLTARGETS: call __udivdi3
; CALLTARGETS: .long __udivdi3
;
; OPTM1-LABEL: div64BitUnsigned
; OPTM1: call -4
......@@ -282,7 +282,7 @@ entry:
; CHECK-LABEL: rem64BitSigned
; CALLTARGETS-LABEL: rem64BitSigned
; CHECK: call -4
; CALLTARGETS: call __moddi3
; CALLTARGETS: .long __moddi3
;
; OPTM1-LABEL: rem64BitSigned
; OPTM1: call -4
......@@ -295,7 +295,7 @@ entry:
; CHECK-LABEL: rem64BitUnsigned
; CALLTARGETS-LABEL: rem64BitUnsigned
; CHECK: call -4
; CALLTARGETS: call __umoddi3
; CALLTARGETS: .long __umoddi3
;
; OPTM1-LABEL: rem64BitUnsigned
; OPTM1: call -4
......
tests_lit/llvm2ice_tests/arith-opt.ll
; This is a very early test that just checks the representation of i32
; arithmetic instructions. No assembly tests are done.
; RUN: %p2i -i %s --args --verbose inst | FileCheck %s
; RUN: %p2i -i %s --args --verbose inst -ias=0 | FileCheck %s
define i32 @Add(i32 %a, i32 %b) {
; CHECK: define i32 @Add
......
tests_lit/llvm2ice_tests/fp.pnacl.ll
......@@ -47,17 +47,18 @@ entry:
ret i32 %add3
}
; CHECK-LABEL: passFpArgs
; CALLTARGETS-LABEL: passFpArgs
; CHECK: mov dword ptr [esp + 4], 123
; CHECK: call ignoreFpArgsNoInline
; CHECK: call -4
; CALLTARGETS: .long ignoreFpArgsNoInline
; CHECK: mov dword ptr [esp + 4], 123
; CHECK: call ignoreFpArgsNoInline
; CHECK: call -4
; CALLTARGETS: .long ignoreFpArgsNoInline
; CHECK: mov dword ptr [esp + 4], 123
; CHECK: call ignoreFpArgsNoInline
; CHECK: call -4
; CALLTARGETS: .long ignoreFpArgsNoInline
define i32 @ignoreFpArgsNoInline(float %x, i32 %y, double %z) {
entry:
ret i32 %y
}
declare i32 @ignoreFpArgsNoInline(float %x, i32 %y, double %z)
define internal i32 @passFpConstArg(float %a, double %b) {
entry:
......@@ -65,8 +66,10 @@ entry:
ret i32 %call
}
; CHECK-LABEL: passFpConstArg
; CALLTARGETS-LABEL: passFpConstArg
; CHECK: mov dword ptr [esp + 4], 123
; CHECK: call ignoreFpArgsNoInline
; CHECK: call -4
; CALLTARGETS: .long ignoreFpArgsNoInline
define internal i32 @passFp32ConstArg(float %a) {
entry:
......@@ -191,7 +194,7 @@ entry:
; CHECK-LABEL: remFloat
; CALLTARGETS-LABEL: remFloat
; CHECK: call -4
; CALLTARGETS: call fmodf
; CALLTARGETS: .long fmodf
define internal double @remDouble(double %a, double %b) {
entry:
......@@ -201,7 +204,7 @@ entry:
; CHECK-LABEL: remDouble
; CALLTARGETS-LABEL: remDouble
; CHECK: call -4
; CALLTARGETS: call fmod
; CALLTARGETS: .long fmod
define internal float @fptrunc(double %a) {
entry:
......@@ -229,7 +232,7 @@ entry:
; CHECK-LABEL: doubleToSigned64
; CALLTARGETS-LABEL: doubleToSigned64
; CHECK: call -4
; CALLTARGETS: call cvtdtosi64
; CALLTARGETS: .long cvtdtosi64
define internal i64 @floatToSigned64(float %a) {
entry:
......@@ -239,7 +242,7 @@ entry:
; CHECK-LABEL: floatToSigned64
; CALLTARGETS-LABEL: floatToSigned64
; CHECK: call -4
; CALLTARGETS: call cvtftosi64
; CALLTARGETS: .long cvtftosi64
define internal i64 @doubleToUnsigned64(double %a) {
entry:
......@@ -249,7 +252,7 @@ entry:
; CHECK-LABEL: doubleToUnsigned64
; CALLTARGETS-LABEL: doubleToUnsigned64
; CHECK: call -4
; CALLTARGETS: call cvtdtoui64
; CALLTARGETS: .long cvtdtoui64
define internal i64 @floatToUnsigned64(float %a) {
entry:
......@@ -259,7 +262,7 @@ entry:
; CHECK-LABEL: floatToUnsigned64
; CALLTARGETS-LABEL: floatToUnsigned64
; CHECK: call -4
; CALLTARGETS: call cvtftoui64
; CALLTARGETS: .long cvtftoui64
define internal i32 @doubleToSigned32(double %a) {
entry:
......@@ -293,7 +296,7 @@ entry:
; CHECK-LABEL: doubleToUnsigned32
; CALLTARGETS-LABEL: doubleToUnsigned32
; CHECK: call -4
; CALLTARGETS: call cvtdtoui32
; CALLTARGETS: .long cvtdtoui32
define internal i32 @floatToUnsigned32(float %a) {
entry:
......@@ -303,7 +306,7 @@ entry:
; CHECK-LABEL: floatToUnsigned32
; CALLTARGETS-LABEL: floatToUnsigned32
; CHECK: call -4
; CALLTARGETS: call cvtftoui32
; CALLTARGETS: .long cvtftoui32
define internal i32 @doubleToSigned16(double %a) {
......@@ -414,7 +417,7 @@ entry:
; CHECK-LABEL: signed64ToDouble
; CALLTARGETS-LABEL: signed64ToDouble
; CHECK: call -4
; CALLTARGETS: call cvtsi64tod
; CALLTARGETS: .long cvtsi64tod
; CHECK: fstp qword
define internal float @signed64ToFloat(i64 %a) {
......@@ -425,7 +428,7 @@ entry:
; CHECK-LABEL: signed64ToFloat
; CALLTARGETS-LABEL: signed64ToFloat
; CHECK: call -4
; CALLTARGETS: call cvtsi64tof
; CALLTARGETS: .long cvtsi64tof
; CHECK: fstp dword
define internal double @unsigned64ToDouble(i64 %a) {
......@@ -436,7 +439,7 @@ entry:
; CHECK-LABEL: unsigned64ToDouble
; CALLTARGETS-LABEL: unsigned64ToDouble
; CHECK: call -4
; CALLTARGETS: call cvtui64tod
; CALLTARGETS: .long cvtui64tod
; CHECK: fstp
define internal float @unsigned64ToFloat(i64 %a) {
......@@ -447,7 +450,7 @@ entry:
; CHECK-LABEL: unsigned64ToFloat
; CALLTARGETS-LABEL: unsigned64ToFloat
; CHECK: call -4
; CALLTARGETS: call cvtui64tof
; CALLTARGETS: .long cvtui64tof
; CHECK: fstp
define internal double @unsigned64ToDoubleConst() {
......@@ -460,7 +463,7 @@ entry:
; CHECK: mov dword ptr [esp + 4], 2874
; CHECK: mov dword ptr [esp], 1942892530
; CHECK: call -4
; CALLTARGETS: call cvtui64tod
; CALLTARGETS: .long cvtui64tod
; CHECK: fstp
define internal double @signed32ToDouble(i32 %a) {
......@@ -498,7 +501,7 @@ entry:
; CHECK-LABEL: unsigned32ToDouble
; CALLTARGETS-LABEL: unsigned32ToDouble
; CHECK: call -4
; CALLTARGETS: call cvtui32tod
; CALLTARGETS: .long cvtui32tod
; CHECK: fstp qword
define internal float @unsigned32ToFloat(i32 %a) {
......@@ -509,7 +512,7 @@ entry:
; CHECK-LABEL: unsigned32ToFloat
; CALLTARGETS-LABEL: unsigned32ToFloat
; CHECK: call -4
; CALLTARGETS: call cvtui32tof
; CALLTARGETS: .long cvtui32tof
; CHECK: fstp dword
define internal double @signed16ToDouble(i32 %a) {
......
tests_lit/llvm2ice_tests/ias-multi-reloc.ll
......@@ -12,7 +12,7 @@
@global_char = internal global [1 x i8] zeroinitializer, align 1
@p_global_char = internal global [4 x i8] zeroinitializer, align 4
declare void @dummy(i32)
declare void @dummy()
define internal void @store_immediate_to_global() {
entry:
......@@ -48,8 +48,7 @@ entry:
br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry
%dummy.bc = bitcast void (i32)* @dummy to void ()*
tail call void %dummy.bc()
tail call void @dummy()
br label %if.end
if.end: ; preds = %if.then, %entry
......@@ -58,4 +57,4 @@ if.end: ; preds = %if.then, %entry
; CHECK-LABEL: cmp_global_immediate
; CHECK: .long p_global_char
; CHECK: .long global_char
; CHECK: call dummy
; CHECK: .long dummy
tests_lit/llvm2ice_tests/nacl-other-intrinsics.ll
......@@ -63,7 +63,7 @@ entry:
; CHECKO2UNSANDBOXEDREM-LABEL: test_nacl_read_tp
; CHECKO2UNSANDBOXEDREM: call -4
; CALLTARGETS-LABEL: test_nacl_read_tp
; CALLTARGETS: call __nacl_read_tp
; CALLTARGETS: .long __nacl_read_tp
define i32 @test_nacl_read_tp_more_addressing() {
entry:
......@@ -92,8 +92,8 @@ entry:
; CHECKO2UNSANDBOXEDREM: call -4
; CHECKO2UNSANDBOXEDREM: call -4
; CALLTARGETS-LABEL: test_nacl_read_tp_more_addressing
; CALLTARGETS: call __nacl_read_tp
; CALLTARGETS: call __nacl_read_tp
; CALLTARGETS: .long __nacl_read_tp
; CALLTARGETS: .long __nacl_read_tp
define i32 @test_nacl_read_tp_dead(i32 %a) {
entry:
......@@ -121,7 +121,7 @@ entry:
; CHECK-LABEL: test_memcpy
; CHECK: call -4
; CALLTARGETS-LABEL: test_memcpy
; CALLTARGETS: call memcpy
; CALLTARGETS: .long memcpy
; CHECKO2REM-LABEL: test_memcpy
; CHECKO2UNSANDBOXEDREM-LABEL: test_memcpy
......@@ -138,7 +138,7 @@ entry:
; CHECK-LABEL: test_memcpy_const_len_align
; CHECK: call -4
; CALLTARGETS-LABEL: test_memcpy_const_len_align
; CALLTARGETS: call memcpy
; CALLTARGETS: .long memcpy
define void @test_memmove(i32 %iptr_dst, i32 %iptr_src, i32 %len) {
entry:
......@@ -151,7 +151,7 @@ entry:
; CHECK-LABEL: test_memmove
; CHECK: call -4
; CALLTARGETS-LABEL: test_memmove
; CALLTARGETS: call memmove
; CALLTARGETS: .long memmove
define void @test_memmove_const_len_align(i32 %iptr_dst, i32 %iptr_src) {
entry:
......@@ -164,7 +164,7 @@ entry:
; CHECK-LABEL: test_memmove_const_len_align
; CHECK: call -4
; CALLTARGETS-LABEL: test_memmove_const_len_align
; CALLTARGETS: call memmove
; CALLTARGETS: .long memmove
define void @test_memset(i32 %iptr_dst, i32 %wide_val, i32 %len) {
entry:
......@@ -178,7 +178,7 @@ entry:
; CHECK: movzx
; CHECK: call -4
; CALLTARGETS-LABEL: test_memset
; CALLTARGETS: call memset
; CALLTARGETS: .long memset
define void @test_memset_const_len_align(i32 %iptr_dst, i32 %wide_val) {
entry:
......@@ -192,7 +192,7 @@ entry:
; CHECK: movzx
; CHECK: call -4
; CALLTARGETS-LABEL: test_memset_const_len_align
; CALLTARGETS: call memset
; CALLTARGETS: .long memset
define void @test_memset_const_val(i32 %iptr_dst, i32 %len) {
entry:
......@@ -205,7 +205,7 @@ entry:
; CHECK: movzx {{.*}}, {{[^0]}}
; CHECK: call -4
; CALLTARGETS-LABEL: test_memset_const_val
; CALLTARGETS: call memset
; CALLTARGETS: .long memset
define i32 @test_setjmplongjmp(i32 %iptr_env) {
......@@ -229,8 +229,8 @@ NonZero:
; CHECKO2REM: call -4
; CHECKO2REM: call -4
; CALLTARGETS-LABEL: test_setjmplongjmp
; CALLTARGETS: call setjmp
; CALLTARGETS: call longjmp
; CALLTARGETS: .long setjmp
; CALLTARGETS: .long longjmp
define i32 @test_setjmp_unused(i32 %iptr_env, i32 %i_other) {
entry:
......@@ -243,7 +243,7 @@ entry:
; CHECKO2REM-LABEL: test_setjmp_unused
; CHECKO2REM: call -4
; CALLTARGETS-LABEL: test_setjmp_unused
; CALLTARGETS: call setjmp
; CALLTARGETS: .long setjmp
define float @test_sqrt_float(float %x, i32 %iptr) {
entry:
......@@ -451,7 +451,7 @@ entry:
; CHECK-LABEL: test_popcount_32
; CHECK: call -4
; CALLTARGETS-LABEL: test_popcount_32
; CALLTARGETS: call __popcountsi2
; CALLTARGETS: .long __popcountsi2
define i64 @test_popcount_64(i64 %x) {
entry:
......@@ -464,7 +464,7 @@ entry:
; the return value just in case.
; CHECK: mov {{.*}}, 0
; CALLTARGETS-LABEL: test_popcount_64
; CALLTARGETS: call __popcountdi2
; CALLTARGETS: .long __popcountdi2
define i32 @test_popcount_64_ret_i32(i64 %x) {
......@@ -478,7 +478,7 @@ entry:
; CHECKO2REM: call -4
; CHECKO2REM-NOT: mov {{.*}}, 0
; CALLTARGETS-LABEL: test_popcount_64_ret_i32
; CALLTARGETS: call __popcountdi2
; CALLTARGETS: .long __popcountdi2
define void @test_stacksave_noalloca() {
entry:
......
tests_lit/llvm2ice_tests/unreachable.ll
......@@ -30,7 +30,7 @@ return: ; preds = %entry
; CALLTARGETS-LABEL: divide
; CHECK: cmp
; CHECK: call -4
; CALLTARGETS: call ice_unreachable
; CALLTARGETS: .long ice_unreachable
; CHECK: cdq
; CHECK: idiv
; CHECK: ret
tests_lit/llvm2ice_tests/vector-bitcast.ll
......@@ -167,7 +167,7 @@ entry:
; CHECK-LABEL: test_bitcast_v8i1_to_i8:
; CALLTARGETS-LABEL: test_bitcast_v8i1_to_i8:
; CHECK: call -4
; CALLTARGETS: call Sz_bitcast_v8i1_to_i8
; CALLTARGETS: .long Sz_bitcast_v8i1_to_i8
; OPTM1-LABEL: test_bitcast_v8i1_to_i8:
; OPMT1: call -4
......@@ -181,7 +181,7 @@ entry:
; CHECK-LABEL: test_bitcast_v16i1_to_i16:
; CALLTARGETS-LABEL: test_bitcast_v16i1_to_i16:
; CHECK: call -4
; CALLTARGETS: call Sz_bitcast_v16i1_to_i16
; CALLTARGETS: .long Sz_bitcast_v16i1_to_i16
; OPTM1-LABEL: test_bitcast_v16i1_to_i16:
; OPMT1: call -4
......@@ -196,7 +196,7 @@ entry:
; CHECK-LABEL: test_bitcast_i8_to_v8i1:
; CALLTARGETS-LABEL: test_bitcast_i8_to_v8i1
; CHECK: call -4
; CALLTARGETS: call Sz_bitcast_i8_to_v8i1
; CALLTARGETS: .long Sz_bitcast_i8_to_v8i1
; OPTM1-LABEL: test_bitcast_i8_to_v8i1:
; OPTM1: call -4
......@@ -211,7 +211,7 @@ entry:
; CHECK-LABEL: test_bitcast_i16_to_v16i1:
; CALLTARGETS-LABEL: test_bitcast_i16_to_v16i1
; CHECK: call -4
; CALLTARGETS: call Sz_bitcast_i16_to_v16i1
; CALLTARGETS: .long Sz_bitcast_i16_to_v16i1
; OPTM1-LABEL: test_bitcast_i16_to_v16i1:
; OPTM1: call -4
......
tests_lit/llvm2ice_tests/vector-cast.ll
......@@ -145,7 +145,7 @@ entry:
; CHECK-LABEL: test_fptoui_v4f32_to_v4i32:
; CHECK: call -4
; CALLTARGETS-LABEL: test_fptoui_v4f32_to_v4i32
; CALLTARGETS: call Sz_fptoui_v4f32
; CALLTARGETS: .long Sz_fptoui_v4f32
}
; [su]itofp operations
......@@ -167,5 +167,5 @@ entry:
; CHECK-LABEL: test_uitofp_v4i32_to_v4f32:
; CHECK: call -4
; CALLTARGETS-LABEL: test_uitofp_v4i32_to_v4f32
; CALLTARGETS: call Sz_uitofp_v4i32
; CALLTARGETS: .long Sz_uitofp_v4i32
}
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