Commit 298d14e2 by Stefan Maksimovic Committed by Jim Stichnoth

Subzero, MIPS32: Atomic intrinsics fixes

This patch introduces changes to the MIPS32 intrinsic functions to comply with PNaCl smoke tests. Also made a change regarding addressing relative to frame pointer, since it differs in MIPS compared to ARM and x86. R=stichnot@chromium.org Patch from Stefan Maksimovic <makdstefan@gmail.com>. Review-Url: https://codereview.chromium.org/2619363003 .
parent 2bbda7f4
...@@ -939,7 +939,7 @@ void Cfg::sortAndCombineAllocas(CfgVector<InstAlloca *> &Allocas, ...@@ -939,7 +939,7 @@ void Cfg::sortAndCombineAllocas(CfgVector<InstAlloca *> &Allocas,
// Addressing is relative to the frame pointer. Subtract the offset after // Addressing is relative to the frame pointer. Subtract the offset after
// adding the size of the alloca, because it grows downwards from the // adding the size of the alloca, because it grows downwards from the
// frame pointer. // frame pointer.
Offsets.push_back(-(CurrentOffset + Size)); Offsets.push_back(Target->getFramePointerOffset(CurrentOffset, Size));
} else { } else {
// Addressing is relative to the stack pointer or to a user pointer. Add // Addressing is relative to the stack pointer or to a user pointer. Add
// the offset before adding the size of the object, because it grows // the offset before adding the size of the object, because it grows
......
...@@ -253,7 +253,13 @@ public: ...@@ -253,7 +253,13 @@ public:
virtual void reserveFixedAllocaArea(size_t Size, size_t Align) = 0; virtual void reserveFixedAllocaArea(size_t Size, size_t Align) = 0;
virtual int32_t getFrameFixedAllocaOffset() const = 0; virtual int32_t getFrameFixedAllocaOffset() const = 0;
virtual uint32_t maxOutArgsSizeBytes() const { return 0; } virtual uint32_t maxOutArgsSizeBytes() const { return 0; }
// Addressing relative to frame pointer differs in MIPS compared to X86/ARM
// since MIPS decrements its stack pointer prior to saving it in the frame
// pointer register.
virtual uint32_t getFramePointerOffset(uint32_t CurrentOffset,
uint32_t Size) const {
return -(CurrentOffset + Size);
}
/// Return whether a 64-bit Variable should be split into a Variable64On32. /// Return whether a 64-bit Variable should be split into a Variable64On32.
virtual bool shouldSplitToVariable64On32(Type Ty) const = 0; virtual bool shouldSplitToVariable64On32(Type Ty) const = 0;
......
...@@ -112,6 +112,12 @@ public: ...@@ -112,6 +112,12 @@ public:
uint32_t maxOutArgsSizeBytes() const override { return MaxOutArgsSizeBytes; } uint32_t maxOutArgsSizeBytes() const override { return MaxOutArgsSizeBytes; }
uint32_t getFramePointerOffset(uint32_t CurrentOffset,
uint32_t Size) const override {
(void)Size;
return CurrentOffset + MaxOutArgsSizeBytes;
}
bool shouldSplitToVariable64On32(Type Ty) const override { bool shouldSplitToVariable64On32(Type Ty) const override {
return Ty == IceType_i64; return Ty == IceType_i64;
} }
...@@ -613,6 +619,8 @@ public: ...@@ -613,6 +619,8 @@ public:
void addiu_sp(uint32_t StackOffset); void addiu_sp(uint32_t StackOffset);
void lw(Variable *Dest, OperandMIPS32Mem *Mem); void lw(Variable *Dest, OperandMIPS32Mem *Mem);
void sw(Variable *Dest, OperandMIPS32Mem *Mem); void sw(Variable *Dest, OperandMIPS32Mem *Mem);
void ll(Variable *Dest, OperandMIPS32Mem *Mem);
void sc(Variable *Dest, OperandMIPS32Mem *Mem);
void lwc1(Variable *Dest, OperandMIPS32Mem *Mem, RelocOp Reloc = RO_No); void lwc1(Variable *Dest, OperandMIPS32Mem *Mem, RelocOp Reloc = RO_No);
void ldc1(Variable *Dest, OperandMIPS32Mem *Mem, RelocOp Reloc = RO_No); void ldc1(Variable *Dest, OperandMIPS32Mem *Mem, RelocOp Reloc = RO_No);
void ret(Variable *RetAddr, Variable *RetValue); void ret(Variable *RetAddr, Variable *RetValue);
......
...@@ -156,7 +156,7 @@ next: ...@@ -156,7 +156,7 @@ next:
; MIPS32: addiu v0,sp,0 ; MIPS32: addiu v0,sp,0
; MIPS32: addiu v1,sp,16 ; MIPS32: addiu v1,sp,16
; MIPS32: move a1,a0 ; MIPS32: move a1,a0
; MIPS32: sw a1,16(s8) ; MIPS32: sw a1,32(s8)
; MIPS32: move a1,a0 ; MIPS32: move a1,a0
; MIPS32: sw a1,0(v0) ; MIPS32: sw a1,0(v0)
; MIPS32: sw a0,0(v1) ; MIPS32: sw a0,0(v1)
...@@ -221,9 +221,9 @@ next: ...@@ -221,9 +221,9 @@ next:
; MIPS32: move a1,a0 ; MIPS32: move a1,a0
; MIPS32: sw a1,32(v0) ; MIPS32: sw a1,32(v0)
; MIPS32: move v0,a0 ; MIPS32: move v0,a0
; MIPS32: sw v0,64(s8) ; MIPS32: sw v0,80(s8)
; MIPS32: move v0,a0 ; MIPS32: move v0,a0
; MIPS32: sw v0,48(s8) ; MIPS32: sw v0,96(s8)
; MIPS32: sw a0,0(v1) ; MIPS32: sw a0,0(v1)
; MIPS32: move sp,s8 ; MIPS32: move sp,s8
; MIPS32: lw s8,{{.*}}(sp) ; MIPS32: lw s8,{{.*}}(sp)
......
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