Commit 30cd7d49 by Nicolas Capens

Support ARM compilation with Subzero.

Bug b/37478805 Change-Id: Ib3af3edfcc24308b2a0f37cb0f534226aa83e446 Reviewed-on: https://swiftshader-review.googlesource.com/9448Reviewed-by: 's avatarNicolas Capens <capn@google.com> Tested-by: 's avatarNicolas Capens <capn@google.com>
parent 1659484b
...@@ -49,10 +49,18 @@ else() ...@@ -49,10 +49,18 @@ else()
message(FATAL_ERROR "Platform is not supported") message(FATAL_ERROR "Platform is not supported")
endif() endif()
if(CMAKE_SIZEOF_VOID_P EQUAL 8) if(CMAKE_SYSTEM_PROCESSOR MATCHES "arm" OR CMAKE_SYSTEM_PROCESSOR MATCHES "aarch")
set(ARCH "x86_64") if(CMAKE_SIZEOF_VOID_P EQUAL 8)
set(ARCH "aarch64")
else()
set(ARCH "arm")
endif()
else() else()
set(ARCH "x86") if(CMAKE_SIZEOF_VOID_P EQUAL 8)
set(ARCH "x86_64")
else()
set(ARCH "x86")
endif()
endif() endif()
########################################################### ###########################################################
...@@ -591,25 +599,35 @@ if(${REACTOR_BACKEND} STREQUAL "Subzero") ...@@ -591,25 +599,35 @@ if(${REACTOR_BACKEND} STREQUAL "Subzero")
${SUBZERO_DIR}/src/IceRNG.cpp ${SUBZERO_DIR}/src/IceRNG.cpp
${SUBZERO_DIR}/src/IceSwitchLowering.cpp ${SUBZERO_DIR}/src/IceSwitchLowering.cpp
${SUBZERO_DIR}/src/IceTargetLowering.cpp ${SUBZERO_DIR}/src/IceTargetLowering.cpp
${SUBZERO_DIR}/src/IceTargetLoweringX86.cpp
${SUBZERO_DIR}/src/IceThreading.cpp ${SUBZERO_DIR}/src/IceThreading.cpp
${SUBZERO_DIR}/src/IceTimerTree.cpp ${SUBZERO_DIR}/src/IceTimerTree.cpp
${SUBZERO_DIR}/src/IceTypes.cpp ${SUBZERO_DIR}/src/IceTypes.cpp
${SUBZERO_DIR}/src/IceVariableSplitting.cpp ${SUBZERO_DIR}/src/IceVariableSplitting.cpp
) )
if(CMAKE_SIZEOF_VOID_P EQUAL 8) if(ARCH STREQUAL "x86_64")
list(APPEND SUBZERO_LIST list(APPEND SUBZERO_LIST
${SUBZERO_DIR}/src/IceTargetLoweringX86.cpp
${SUBZERO_DIR}/src/IceInstX8664.cpp ${SUBZERO_DIR}/src/IceInstX8664.cpp
${SUBZERO_DIR}/src/IceTargetLoweringX8664.cpp ${SUBZERO_DIR}/src/IceTargetLoweringX8664.cpp
) )
set(SUBZERO_TARGET X8664) set(SUBZERO_TARGET X8664)
else() elseif(ARCH STREQUAL "x86")
list(APPEND SUBZERO_LIST list(APPEND SUBZERO_LIST
${SUBZERO_DIR}/src/IceTargetLoweringX86.cpp
${SUBZERO_DIR}/src/IceInstX8632.cpp ${SUBZERO_DIR}/src/IceInstX8632.cpp
${SUBZERO_DIR}/src/IceTargetLoweringX8632.cpp ${SUBZERO_DIR}/src/IceTargetLoweringX8632.cpp
) )
set(SUBZERO_TARGET X8632) set(SUBZERO_TARGET X8632)
elseif(ARCH STREQUAL "arm")
list(APPEND SUBZERO_LIST
${SUBZERO_DIR}/src/IceAssemblerARM32.cpp
${SUBZERO_DIR}/src/IceInstARM32.cpp
${SUBZERO_DIR}/src/IceTargetLoweringARM32.cpp
)
set(SUBZERO_TARGET ARM32)
else()
message(FATAL_ERROR "Architecture '${ARCH}' not supported by Subzero")
endif() endif()
file(GLOB_RECURSE SUBZERO_DEPENDENCIES_LIST file(GLOB_RECURSE SUBZERO_DEPENDENCIES_LIST
......
...@@ -230,21 +230,46 @@ namespace sw ...@@ -230,21 +230,46 @@ namespace sw
} }
} }
switch(relocation.getType()) #if defined(__i386__)
{ switch(relocation.getType())
case R_386_NONE: {
// No relocation case R_386_NONE:
break; // No relocation
case R_386_32: break;
*patchSite = (int32_t)((intptr_t)symbolValue + *patchSite); case R_386_32:
break; *patchSite = (int32_t)((intptr_t)symbolValue + *patchSite);
// case R_386_PC32: break;
// *patchSite = (int32_t)((intptr_t)symbolValue + *patchSite - (intptr_t)patchSite); // case R_386_PC32:
// break; // *patchSite = (int32_t)((intptr_t)symbolValue + *patchSite - (intptr_t)patchSite);
default: // break;
assert(false && "Unsupported relocation type"); default:
return nullptr; assert(false && "Unsupported relocation type");
} return nullptr;
}
#elif defined(__arm__)
switch(relocation.getType())
{
case R_ARM_NONE:
// No relocation
break;
case R_ARM_MOVW_ABS_NC:
{
uint32_t thumb = 0; // Calls to Thumb code not supported.
uint32_t lo = (uint32_t)symbolValue | thumb;
*patchSite = (*patchSite & 0xFFF0F000) | ((lo & 0xF000) << 4) | (lo & 0x0FFF);
}
break;
case R_ARM_MOVT_ABS:
{
uint32_t hi = (uint32_t)(symbolValue) >> 16;
*patchSite = (*patchSite & 0xFFF0F000) | ((hi & 0xF000) << 4) | (hi & 0x0FFF);
}
break;
default:
assert(false && "Unsupported relocation type");
return nullptr;
}
#endif
return symbolValue; return symbolValue;
} }
...@@ -286,24 +311,26 @@ namespace sw ...@@ -286,24 +311,26 @@ namespace sw
} }
} }
switch(relocation.getType()) #if defined(__x86_64__)
{ switch(relocation.getType())
case R_X86_64_NONE: {
// No relocation case R_X86_64_NONE:
break; // No relocation
case R_X86_64_64: break;
*(int64_t*)patchSite = (int64_t)((intptr_t)symbolValue + *(int64_t*)patchSite) + relocation.r_addend; case R_X86_64_64:
break; *(int64_t*)patchSite = (int64_t)((intptr_t)symbolValue + *(int64_t*)patchSite) + relocation.r_addend;
case R_X86_64_PC32: break;
*patchSite = (int32_t)((intptr_t)symbolValue + *patchSite - (intptr_t)patchSite) + relocation.r_addend; case R_X86_64_PC32:
break; *patchSite = (int32_t)((intptr_t)symbolValue + *patchSite - (intptr_t)patchSite) + relocation.r_addend;
case R_X86_64_32S: break;
*patchSite = (int32_t)((intptr_t)symbolValue + *patchSite) + relocation.r_addend; case R_X86_64_32S:
break; *patchSite = (int32_t)((intptr_t)symbolValue + *patchSite) + relocation.r_addend;
default: break;
assert(false && "Unsupported relocation type"); default:
return nullptr; assert(false && "Unsupported relocation type");
} return nullptr;
}
#endif
return symbolValue; return symbolValue;
} }
...@@ -319,7 +346,15 @@ namespace sw ...@@ -319,7 +346,15 @@ namespace sw
// Expect ELF bitness to match platform // Expect ELF bitness to match platform
assert(sizeof(void*) == 8 ? elfHeader->getFileClass() == ELFCLASS64 : elfHeader->getFileClass() == ELFCLASS32); assert(sizeof(void*) == 8 ? elfHeader->getFileClass() == ELFCLASS64 : elfHeader->getFileClass() == ELFCLASS32);
assert(sizeof(void*) == 8 ? elfHeader->e_machine == EM_X86_64 : elfHeader->e_machine == EM_386); #if defined(__i386__)
assert(sizeof(void*) == 4 && elfHeader->e_machine == EM_386);
#elif defined(__x86_64__)
assert(sizeof(void*) == 8 && elfHeader->e_machine == EM_X86_64);
#elif defined(__arm__)
assert(sizeof(void*) == 4 && elfHeader->e_machine == EM_ARM);
#else
#error "Unsupported platform"
#endif
SectionHeader *sectionHeader = (SectionHeader*)(elfImage + elfHeader->e_shoff); SectionHeader *sectionHeader = (SectionHeader*)(elfImage + elfHeader->e_shoff);
void *entry = nullptr; void *entry = nullptr;
...@@ -479,12 +514,18 @@ namespace sw ...@@ -479,12 +514,18 @@ namespace sw
Ice::ClFlags &Flags = Ice::ClFlags::Flags; Ice::ClFlags &Flags = Ice::ClFlags::Flags;
Ice::ClFlags::getParsedClFlags(Flags); Ice::ClFlags::getParsedClFlags(Flags);
Flags.setTargetArch(sizeof(void*) == 8 ? Ice::Target_X8664 : Ice::Target_X8632); #if defined(__arm__)
Flags.setTargetArch(Ice::Target_ARM32);
Flags.setTargetInstructionSet(Ice::ARM32InstructionSet_HWDivArm);
#else // x86
Flags.setTargetArch(sizeof(void*) == 8 ? Ice::Target_X8664 : Ice::Target_X8632);
Flags.setTargetInstructionSet(CPUID::SSE4_1 ? Ice::X86InstructionSet_SSE4_1 : Ice::X86InstructionSet_SSE2);
#endif
Flags.setOutFileType(Ice::FT_Elf); Flags.setOutFileType(Ice::FT_Elf);
Flags.setOptLevel(Ice::Opt_2); Flags.setOptLevel(Ice::Opt_2);
Flags.setApplicationBinaryInterface(Ice::ABI_Platform); Flags.setApplicationBinaryInterface(Ice::ABI_Platform);
Flags.setTargetInstructionSet(CPUID::SSE4_1 ? Ice::X86InstructionSet_SSE4_1 : Ice::X86InstructionSet_SSE2); Flags.setVerbose(false ? Ice::IceV_Most : Ice::IceV_None);
Flags.setVerbose(false ? Ice::IceV_All : Ice::IceV_None); Flags.setDisableHybridAssembly(true);
static llvm::raw_os_ostream cout(std::cout); static llvm::raw_os_ostream cout(std::cout);
static llvm::raw_os_ostream cerr(std::cerr); static llvm::raw_os_ostream cerr(std::cerr);
......
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