Fix 64-bit pointer type for non-x32 ABIs.

src/IceTargetLowering.cpp

@@ -58,6 +58,7 @@
   createTargetHeaderLowering(::Ice::GlobalContext *Ctx);                       \
   void staticInit(::Ice::GlobalContext *Ctx);                                  \
   bool shouldBePooled(const ::Ice::Constant *C);                               \
+  ::Ice::Type getPointerType();                                                \
   } // end of namespace X
 #include "SZTargets.def"
 #undef SUBZERO_TARGET
@@ -298,6 +299,19 @@ bool TargetLowering::shouldBePooled(const Constant *C) {
   }
 }
 
+::Ice::Type TargetLowering::getPointerType() {
+  const TargetArch Target = getFlags().getTargetArch();
+  switch (Target) {
+  default:
+    return ::Ice::IceType_void;
+#define SUBZERO_TARGET(X)                                                      \
+  case TARGET_LOWERING_CLASS_FOR(X):                                           \
+    return ::X::getPointerType();
+#include "SZTargets.def"
+#undef SUBZERO_TARGET
+  }
+}
+
 TargetLowering::SandboxType
 TargetLowering::determineSandboxTypeFromFlags(const ClFlags &Flags) {
   assert(!Flags.getUseSandboxing() || !Flags.getUseNonsfi());

src/IceTargetLowering.h

@@ -175,6 +175,7 @@ public:
   // Each target must define a public static method:
   //   static void staticInit(GlobalContext *Ctx);
   static bool shouldBePooled(const class Constant *C);
+  static Type getPointerType();
 
   static std::unique_ptr<TargetLowering> createLowering(TargetArch Target,
                                                         Cfg *Func);

src/IceTargetLoweringARM32.cpp

@@ -66,6 +66,10 @@ bool shouldBePooled(const ::Ice::Constant *C) {
   return ::Ice::ARM32::TargetARM32::shouldBePooled(C);
 }
 
+::Ice::Type getPointerType() {
+  return ::Ice::ARM32::TargetARM32::getPointerType();
+}
+
 } // end of namespace ARM32
 
 namespace Ice {

src/IceTargetLoweringARM32.h

@@ -68,6 +68,8 @@ public:
     return false;
   }
 
+  static ::Ice::Type getPointerType() { return ::Ice::IceType_i32; }
+
   // TODO(jvoung): return a unique_ptr.
   static std::unique_ptr<::Ice::TargetLowering> create(Cfg *Func) {
     return makeUnique<TargetARM32>(Func);

src/IceTargetLoweringMIPS32.cpp

@@ -52,6 +52,11 @@ void staticInit(::Ice::GlobalContext *Ctx) {
 bool shouldBePooled(const ::Ice::Constant *C) {
   return ::Ice::MIPS32::TargetMIPS32::shouldBePooled(C);
 }
+
+::Ice::Type getPointerType() {
+  return ::Ice::MIPS32::TargetMIPS32::getPointerType();
+}
+
 } // end of namespace MIPS32
 
 namespace Ice {

src/IceTargetLoweringMIPS32.h

@@ -43,6 +43,7 @@ public:
     }
     return false;
   }
+  static ::Ice::Type getPointerType() { return ::Ice::IceType_i32; }
   static std::unique_ptr<::Ice::TargetLowering> create(Cfg *Func) {
     return makeUnique<TargetMIPS32>(Func);
   }

src/IceTargetLoweringX8632.cpp

@@ -48,6 +48,11 @@ void staticInit(::Ice::GlobalContext *Ctx) {
 bool shouldBePooled(const class ::Ice::Constant *C) {
   return ::Ice::X8632::TargetX8632::shouldBePooled(C);
 }
+
+::Ice::Type getPointerType() {
+  return ::Ice::X8632::TargetX8632::getPointerType();
+}
+
 } // end of namespace X8632
 
 namespace Ice {

src/IceTargetLoweringX8664.cpp

@@ -41,6 +41,10 @@ bool shouldBePooled(const class ::Ice::Constant *C) {
   return ::Ice::X8664::TargetX8664::shouldBePooled(C);
 }
 
+::Ice::Type getPointerType() {
+  return ::Ice::X8664::TargetX8664::getPointerType();
+}
+
 } // end of namespace X8664
 
 namespace Ice {

src/IceTargetLoweringX86Base.h

@@ -79,6 +79,7 @@ public:
 
   static void staticInit(GlobalContext *Ctx);
   static bool shouldBePooled(const Constant *C);
+  static ::Ice::Type getPointerType();
 
   static FixupKind getPcRelFixup() { return PcRelFixup; }
   static FixupKind getAbsFixup() { return AbsFixup; }

src/IceTargetLoweringX86BaseImpl.h

@@ -430,6 +430,16 @@ bool TargetX86Base<TraitsType>::shouldBePooled(const Constant *C) {
   return C->shouldBeRandomizedOrPooled();
 }
 
+template <typename TraitsType>
+::Ice::Type TargetX86Base<TraitsType>::getPointerType() {
+  if (!Traits::Is64Bit ||
+      ::Ice::getFlags().getApplicationBinaryInterface() == ::Ice::ABI_PNaCl) {
+    return ::Ice::IceType_i32;
+  } else {
+    return ::Ice::IceType_i64;
+  }
+}
+
 template <typename TraitsType> void TargetX86Base<TraitsType>::translateO2() {
   TimerMarker T(TimerStack::TT_O2, Func);
 
@@ -7456,7 +7466,7 @@ TargetX86Base<TraitsType>::getMemoryOperandForStackSlot(Type Ty, Variable *Slot,
   // TODO(wala,stichnot): lea should not
   // be required. The address of the stack slot is known at compile time
   // (although not until after addProlog()).
-  constexpr Type PointerType = IceType_i32;
+  const Type PointerType = getPointerType();
   Variable *Loc = makeReg(PointerType);
   _lea(Loc, Slot);
   Constant *ConstantOffset = Ctx->getConstantInt32(Offset);

src/IceTypes.cpp

@@ -15,6 +15,7 @@
 #include "IceTypes.h"
 
 #include "IceDefs.h"
+#include "IceTargetLowering.h"
 
 #include "llvm/Support/ErrorHandling.h"
 
@@ -176,6 +177,8 @@ Type typeElementType(Type Ty) {
   return IceType_void;
 }
 
+Type getPointerType() { return TargetLowering::getPointerType(); }
+
 bool isVectorType(Type Ty) {
   if (Ty < IceType_NUM)
     return TypePropertiesTable[Ty].TypeIsVectorType;

src/IceTypes.h

@@ -85,7 +85,7 @@ const char *typeString(Type Ty);
 inline std::string typeStdString(Type Ty) { return typeString(Ty); }
 const char *regClassString(RegClass C);
 
-inline Type getPointerType() { return IceType_i32; }
+Type getPointerType();
 
 bool isVectorType(Type Ty);