Add ASR instruction to the ARM integrated assembler.

src/DartARM32/assembler_arm.cc

@@ -2620,9 +2620,8 @@ void Assembler::Lsr(Register rd, Register rm, const Operand& shift_imm,
 void Assembler::Lsr(Register rd, Register rm, Register rs, Condition cond) {
   mov(rd, Operand(rm, LSR, rs), cond);
 }
-#endif
-
 
+// Moved to ARM32::AssemblerARM32::asr()
 void Assembler::Asr(Register rd, Register rm, const Operand& shift_imm,
                     Condition cond) {
   ASSERT(shift_imm.type() == 1);
@@ -2633,7 +2632,7 @@ void Assembler::Asr(Register rd, Register rm, const Operand& shift_imm,
   }
   mov(rd, Operand(rm, ASR, shift), cond);
 }
-
+#endif
 
 void Assembler::Asrs(Register rd, Register rm, const Operand& shift_imm,
                      Condition cond) {
@@ -2646,11 +2645,12 @@ void Assembler::Asrs(Register rd, Register rm, const Operand& shift_imm,
   movs(rd, Operand(rm, ASR, shift), cond);
 }
 
-
+#if 0
+// Moved to ARM32::AssemblerARM32::asr()
 void Assembler::Asr(Register rd, Register rm, Register rs, Condition cond) {
   mov(rd, Operand(rm, ASR, rs), cond);
 }
-
+#endif
 
 void Assembler::Ror(Register rd, Register rm, const Operand& shift_imm,
                     Condition cond) {

src/DartARM32/assembler_arm.h

@@ -969,10 +969,12 @@ class Assembler : public ValueObject {
            Condition cond = AL);
   // Moved to ARM32::AssemblerARM32::lsr()
   void Lsr(Register rd, Register rm, Register rs, Condition cond = AL);
-#endif
+  // Moved to ARM32::AssemblerARM32::asr()
   void Asr(Register rd, Register rm, const Operand& shift_imm,
            Condition cond = AL);
+  // Moved to ARM32::AssemblerARM32::asr()
   void Asr(Register rd, Register rm, Register rs, Condition cond = AL);
+#endif
   void Asrs(Register rd, Register rm, const Operand& shift_imm,
             Condition cond = AL);
   void Ror(Register rd, Register rm, const Operand& shift_imm,

src/IceAssemblerARM32.cpp

@@ -1195,6 +1195,13 @@ void AssemblerARM32::emitShift(const CondARM32::Cond Cond,
   }
 }
 
+void AssemblerARM32::asr(const Operand *OpRd, const Operand *OpRm,
+                         const Operand *OpSrc1, bool SetFlags,
+                         CondARM32::Cond Cond) {
+  constexpr const char *AsrName = "asr";
+  emitShift(Cond, OperandARM32::ASR, OpRd, OpRm, OpSrc1, SetFlags, AsrName);
+}
+
 void AssemblerARM32::lsl(const Operand *OpRd, const Operand *OpRm,
                          const Operand *OpSrc1, bool SetFlags,
                          CondARM32::Cond Cond) {

src/IceAssemblerARM32.h

@@ -192,6 +192,9 @@ public:
   void and_(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1,
             bool SetFlags, CondARM32::Cond Cond);
 
+  void asr(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1,
+           bool SetFlags, CondARM32::Cond Cond);
+
   void b(Label *L, CondARM32::Cond Cond);
 
   void bkpt(uint16_t Imm16);

src/IceInstARM32.cpp

@@ -485,6 +485,13 @@ template <> void InstARM32Eor::emitIAS(const Cfg *Func) const {
     emitUsingTextFixup(Func);
 }
 
+template <> void InstARM32Asr::emitIAS(const Cfg *Func) const {
+  auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>();
+  Asm->asr(getDest(), getSrc(0), getSrc(1), SetFlags, getPredicate());
+  if (Asm->needsTextFixup())
+    emitUsingTextFixup(Func);
+}
+
 template <> void InstARM32Lsl::emitIAS(const Cfg *Func) const {
   auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>();
   Asm->lsl(getDest(), getSrc(0), getSrc(1), SetFlags, getPredicate());

tests_lit/assembler/arm32/asr.ll

+; Show that we know how to translate asr
+
+; NOTE: We use -O2 to get rid of memory stores.
+
+; REQUIRES: allow_dump
+
+; Compile using standalone assembler.
+; RUN: %p2i --filetype=asm -i %s --target=arm32 --args -O2 \
+; RUN:   | FileCheck %s --check-prefix=ASM
+
+; Show bytes in assembled standalone code.
+; RUN: %p2i --filetype=asm -i %s --target=arm32 --assemble --disassemble \
+; RUN:   --args -O2 | FileCheck %s --check-prefix=DIS
+
+; Compile using integrated assembler.
+; RUN: %p2i --filetype=iasm -i %s --target=arm32 --args -O2 \
+; RUN:   | FileCheck %s --check-prefix=IASM
+
+; Show bytes in assembled integrated code.
+; RUN: %p2i --filetype=iasm -i %s --target=arm32 --assemble --disassemble \
+; RUN:   --args -O2 | FileCheck %s --check-prefix=DIS
+
+define internal i32 @AshrAmt(i32 %a) {
+; ASM-LABEL:AshrAmt:
+; DIS-LABEL:00000000 <AshrAmt>:
+; IASM-LABEL:AshrAmt:
+
+entry:
+; ASM-NEXT:.LAshrAmt$entry:
+; IASM-NEXT:.LAshrAmt$entry:
+
+  %v = ashr i32 %a, 23
+
+; ASM-NEXT:     asr     r0, r0, #23
+; DIS-NEXT:   0:	e1a00bc0
+; IASM-NEXT:	.byte 0xc0
+; IASM-NEXT:	.byte 0xb
+; IASM-NEXT:	.byte 0xa0
+; IASM-NEXT:	.byte 0xe1
+
+  ret i32 %v
+}
+
+define internal i32 @AshrReg(i32 %a, i32 %b) {
+; ASM-LABEL:AshrReg:
+; DIS-LABEL:00000010 <AshrReg>:
+; IASM-LABEL:AshrReg:
+
+entry:
+; ASM-NEXT:.LAshrReg$entry:
+; IASM-NEXT:.LAshrReg$entry:
+
+  %v = ashr i32 %a, %b
+
+; ASM-NEXT:     asr     r0, r0, r1
+; DIS-NEXT:  10:	e1a00150
+; IASM-NEXT:	.byte 0x50
+; IASM-NEXT:	.byte 0x1
+; IASM-NEXT:	.byte 0xa0
+; IASM-NEXT:	.byte 0xe1
+
+  ret i32 %v
+}