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Commit 4c49b108 by Srdjan Obucina Committed by Jim Stichnoth
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Subzero, MIPS32: Filling missing bits from genTargetHelperCallFor

Implements missing calls to runtime libraries, covering mostly data casting. R=stichnot@chromium.org Review URL: https://codereview.chromium.org/2363333002 . Patch from Srdjan Obucina <Srdjan.Obucina@imgtec.com>.
parent 623f8ce3
Showing with 244 additions and 43 deletions
src/IceInstMIPS32.cpp
......@@ -992,6 +992,17 @@ template <> void InstMIPS32Movz_s::emitIAS(const Cfg *Func) const {
Asm->movz_s(getDest(), getSrc(0), getSrc(1));
}
template <> void InstMIPS32Mtc1::emit(const Cfg *Func) const {
if (!BuildDefs::dump())
return;
Ostream &Str = Func->getContext()->getStrEmit();
assert(getSrcSize() == 1);
Str << "\t" << Opcode << "\t";
getSrc(0)->emit(Func);
Str << ", ";
getDest()->emit(Func);
}
template <> void InstMIPS32Mtc1::emitIAS(const Cfg *Func) const {
auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
Asm->mtc1(getDest(), getSrc(0));
......
src/IceInstMIPS32.h
......@@ -1287,6 +1287,7 @@ template <> void InstMIPS32Movt::emitIAS(const Cfg *Func) const;
template <> void InstMIPS32Movz_d::emitIAS(const Cfg *Func) const;
template <> void InstMIPS32Movz_s::emitIAS(const Cfg *Func) const;
template <> void InstMIPS32Mtc1::emit(const Cfg *Func) const;
template <> void InstMIPS32Mtc1::emitIAS(const Cfg *Func) const;
template <> void InstMIPS32Mtlo::emit(const Cfg *Func) const;
template <> void InstMIPS32Mtlo::emitIAS(const Cfg *Func) const;
template <> void InstMIPS32Mthi::emit(const Cfg *Func) const;
......
src/IceTargetLoweringMIPS32.cpp
......@@ -309,16 +309,26 @@ void TargetMIPS32::genTargetHelperCallFor(Inst *Instr) {
return;
case InstCast::Fptosi:
case InstCast::Fptoui: {
if (DestTy != IceType_i64) {
if ((DestTy != IceType_i32) && (DestTy != IceType_i64)) {
return;
}
const bool DestIs32 = DestTy == IceType_i32;
const bool DestIsSigned = CastKind == InstCast::Fptosi;
const bool Src0IsF32 = isFloat32Asserting32Or64(SrcTy);
Operand *TargetHelper = Ctx->getRuntimeHelperFunc(
Src0IsF32 ? (DestIsSigned ? RuntimeHelper::H_fptosi_f32_i64
: RuntimeHelper::H_fptoui_f32_i64)
: (DestIsSigned ? RuntimeHelper::H_fptosi_f64_i64
: RuntimeHelper::H_fptoui_f64_i64));
RuntimeHelper RTHFunc = RuntimeHelper::H_Num;
if (DestIsSigned) {
if (DestIs32) {
return;
}
RTHFunc = Src0IsF32 ? RuntimeHelper::H_fptosi_f32_i64
: RuntimeHelper::H_fptosi_f64_i64;
} else {
RTHFunc = Src0IsF32 ? (DestIs32 ? RuntimeHelper::H_fptoui_f32_i32
: RuntimeHelper::H_fptoui_f32_i64)
: (DestIs32 ? RuntimeHelper::H_fptoui_f64_i32
: RuntimeHelper::H_fptoui_f64_i64);
}
Operand *TargetHelper = Ctx->getRuntimeHelperFunc(RTHFunc);
static constexpr SizeT MaxArgs = 1;
auto *Call = Context.insert<InstCall>(MaxArgs, Dest, TargetHelper,
NoTailCall, IsTargetHelperCall);
......@@ -328,16 +338,26 @@ void TargetMIPS32::genTargetHelperCallFor(Inst *Instr) {
}
case InstCast::Sitofp:
case InstCast::Uitofp: {
if (SrcTy != IceType_i64) {
if ((SrcTy != IceType_i32) && (SrcTy != IceType_i64)) {
return;
}
const bool SourceIs32 = SrcTy == IceType_i32;
const bool SourceIsSigned = CastKind == InstCast::Sitofp;
const bool DestIsF32 = isFloat32Asserting32Or64(Dest->getType());
Operand *TargetHelper = Ctx->getRuntimeHelperFunc(
DestIsF32 ? (SourceIsSigned ? RuntimeHelper::H_sitofp_i64_f32
: RuntimeHelper::H_uitofp_i64_f32)
: (SourceIsSigned ? RuntimeHelper::H_sitofp_i64_f64
: RuntimeHelper::H_uitofp_i64_f64));
RuntimeHelper RTHFunc = RuntimeHelper::H_Num;
if (SourceIsSigned) {
if (SourceIs32) {
return;
}
RTHFunc = DestIsF32 ? RuntimeHelper::H_sitofp_i64_f32
: RuntimeHelper::H_sitofp_i64_f64;
} else {
RTHFunc = DestIsF32 ? (SourceIs32 ? RuntimeHelper::H_uitofp_i32_f32
: RuntimeHelper::H_uitofp_i64_f32)
: (SourceIs32 ? RuntimeHelper::H_uitofp_i32_f64
: RuntimeHelper::H_uitofp_i64_f64);
}
Operand *TargetHelper = Ctx->getRuntimeHelperFunc(RTHFunc);
static constexpr SizeT MaxArgs = 1;
auto *Call = Context.insert<InstCall>(MaxArgs, Dest, TargetHelper,
NoTailCall, IsTargetHelperCall);
......@@ -2584,54 +2604,67 @@ void TargetMIPS32::lowerCast(const InstCast *Instr) {
_mov(Dest, DestR);
break;
}
case InstCast::Fptosi: {
case InstCast::Fptosi:
case InstCast::Fptoui: {
if (llvm::isa<Variable64On32>(Dest)) {
llvm::report_fatal_error("fp-to-i64 should have been prelowered.");
return;
}
if (Src0Ty == IceType_f32 && DestTy == IceType_i32) {
Variable *Src0R = legalizeToReg(Src0);
Variable *FTmp = makeReg(IceType_f32);
_trunc_w_s(FTmp, Src0R);
_mov(Dest, FTmp);
} else {
UnimplementedLoweringError(this, Instr);
}
break;
}
case InstCast::Fptoui:
if (llvm::isa<Variable64On32>(Dest)) {
llvm::report_fatal_error("fp-to-i64 should have been prelowered.");
return;
if (DestTy != IceType_i64) {
if (Src0Ty == IceType_f32 && isScalarIntegerType(DestTy)) {
Variable *Src0R = legalizeToReg(Src0);
Variable *FTmp = makeReg(IceType_f32);
_trunc_w_s(FTmp, Src0R);
_mov(Dest, FTmp);
return;
}
if (Src0Ty == IceType_f64 && isScalarIntegerType(DestTy)) {
Variable *Src0R = legalizeToReg(Src0);
Variable *FTmp = makeReg(IceType_f64);
_trunc_w_d(FTmp, Src0R);
_mov(Dest, FTmp);
return;
}
}
UnimplementedLoweringError(this, Instr);
break;
case InstCast::Sitofp: {
if (llvm::isa<Variable64On32>(Dest)) {
llvm::report_fatal_error("i64-to-fp should have been prelowered.");
return;
}
if (Src0Ty == IceType_i32 && DestTy == IceType_f32) {
Variable *Src0R = legalizeToReg(Src0);
Variable *FTmp1 = makeReg(IceType_f32);
Variable *FTmp2 = makeReg(IceType_f32);
_mov(FTmp1, Src0R);
_cvt_s_w(FTmp2, FTmp1);
_mov(Dest, FTmp2);
} else {
UnimplementedLoweringError(this, Instr);
}
break;
}
case InstCast::Sitofp:
case InstCast::Uitofp: {
if (llvm::isa<Variable64On32>(Dest)) {
llvm::report_fatal_error("i64-to-fp should have been prelowered.");
return;
}
if (Src0Ty != IceType_i64) {
if (isScalarIntegerType(Src0Ty) && DestTy == IceType_f32) {
Variable *Src0R = legalizeToReg(Src0);
Variable *FTmp1 = makeReg(IceType_f32);
Variable *FTmp2 = makeReg(IceType_f32);
_mtc1(FTmp1, Src0R);
_cvt_s_w(FTmp2, FTmp1);
_mov(Dest, FTmp2);
return;
}
if (isScalarIntegerType(Src0Ty) && DestTy == IceType_f64) {
Variable *Src0R = legalizeToReg(Src0);
Variable *FTmp1 = makeReg(IceType_f64);
Variable *FTmp2 = makeReg(IceType_f64);
_mtc1(FTmp1, Src0R);
_cvt_d_w(FTmp2, FTmp1);
_mov(Dest, FTmp2);
return;
}
}
UnimplementedLoweringError(this, Instr);
break;
}
case InstCast::Bitcast: {
Operand *Src0 = Instr->getSrc(0);
if (DestTy == Src0->getType()) {
auto *Assign = InstAssign::create(Func, Dest, Src0);
lowerAssign(Assign);
return;
}
switch (DestTy) {
case IceType_NUM:
case IceType_void:
......
tests_lit/llvm2ice_tests/fp.convert.ll
......@@ -122,6 +122,10 @@ entry:
; ARM32-LABEL: doubleToSigned32
; ARM32-DAG: vcvt.s32.f64 [[REG:s[0-9]*]], {{d[0-9]*}}
; ARM32-DAG: vmov {{r[0-9]+}}, [[REG]]
; MIPS32-LABEL: doubleToSigned32
; MIPS32: trunc.w.d
; MIPS32O2-LABEL: doubleToSigned32
; MIPS32O2: trunc.w.d
define internal i32 @doubleToSigned32Const() {
entry:
......@@ -136,6 +140,14 @@ entry:
; ARM32-DAG: vldr [[DREG:d[0-9]+]], {{\[}}[[ADDR]]{{\]}}
; ARM32-DAG: vcvt.s32.f64 [[REG:s[0-9]+]], [[DREG]]
; ARM32-DAF: vmov {{r[0-9]+}}, [[REG]]
; MIPS32-LABEL: doubleToSigned32Const
; MIPS32: lui
; MIPS32: ldc1
; MIPS32: trunc.w.d
; MIPS32O2-LABEL: doubleToSigned32Const
; MIPS32O2: lui
; MIPS32O2: ldc1
; MIPS32O2: trunc.w.d
define internal i32 @floatToSigned32(float %a) {
entry:
......@@ -163,6 +175,10 @@ entry:
; ARM32-LABEL: doubleToUnsigned32
; ARM32-DAG: vcvt.u32.f64 [[REG:s[0-9]+]], {{d[0-9]+}}
; ARM32-DAG: vmov {{r[0-9]+}}, [[REG]]
; MIPS32-LABEL: doubleToUnsigned32
; MIPS32: jal __Sz_fptoui_f64_i32
; MIPS32O2-LABEL: doubleToUnsigned32
; MIPS32O2: jal __Sz_fptoui_f64_i32
define internal i32 @floatToUnsigned32(float %a) {
entry:
......@@ -174,6 +190,10 @@ entry:
; ARM32-LABEL: floatToUnsigned32
; ARM32-DAG: vcvt.u32.f32 [[REG:s[0-9]+]], {{s[0-9]+}}
; ARM32-DAG: vmov {{r[0-9]+}}, [[REG]]
; MIPS32-LABEL: floatToUnsigned32
; MIPS32: jal __Sz_fptoui_f32_i32
; MIPS32O2-LABEL: floatToUnsigned32
; MIPS32O2: jal __Sz_fptoui_f32_i32
define internal i32 @doubleToSigned16(double %a) {
entry:
......@@ -188,6 +208,10 @@ entry:
; ARM32-DAG: vcvt.s32.f64 [[REG:s[0-9]*]], {{d[0-9]*}}
; ARM32-DAG: vmov {{r[0-9]+}}, [[REG]]
; ARM32: sxth
; MIPS32-LABEL: doubleToSigned16
; MIPS32: trunc.w.d
; MIPS32O2-LABEL: doubleToSigned16
; MIPS32O2: trunc.w.d
define internal i32 @floatToSigned16(float %a) {
entry:
......@@ -202,6 +226,10 @@ entry:
; ARM32-DAG: vcvt.s32.f32 [[REG:s[0-9]*]], {{s[0-9]*}}
; ARM32-DAG: vmov {{r[0-9]+}}, [[REG]]
; ARM32: sxth
; MIPS32-LABEL: floatToSigned16
; MIPS32: trunc.w.s
; MIPS32O2-LABEL: floatToSigned16
; MIPS32O2: trunc.w.s
define internal i32 @doubleToUnsigned16(double %a) {
entry:
......@@ -216,6 +244,10 @@ entry:
; ARM32-DAG: vcvt.u32.f64 [[REG:s[0-9]*]], {{d[0-9]*}}
; ARM32-DAG: vmov {{r[0-9]+}}, [[REG]]
; ARM32: uxth
; MIPS32-LABEL: doubleToUnsigned16
; MIPS32: trunc.w.d
; MIPS32O2-LABEL: doubleToUnsigned16
; MIPS32O2: trunc.w.d
define internal i32 @floatToUnsigned16(float %a) {
entry:
......@@ -230,6 +262,10 @@ entry:
; ARM32-DAG: vcvt.u32.f32 [[REG:s[0-9]*]], {{s[0-9]*}}
; ARM32-DAG: vmov {{r[0-9]+}}, [[REG]]
; ARM32: uxth
; MIPS32-LABEL: floatToUnsigned16
; MIPS32: trunc.w.s
; MIPS32O2-LABEL: floatToUnsigned16
; MIPS32O2: trunc.w.s
define internal i32 @doubleToSigned8(double %a) {
entry:
......@@ -244,6 +280,10 @@ entry:
; ARM32-DAG: vcvt.s32.f64 [[REG:s[0-9]*]], {{d[0-9]*}}
; ARM32-DAG: vmov {{r[0-9]+}}, [[REG]]
; ARM32: sxtb
; MIPS32-LABEL: doubleToSigned8
; MIPS32: trunc.w.d
; MIPS32O2-LABEL: doubleToSigned8
; MIPS32O2: trunc.w.d
define internal i32 @floatToSigned8(float %a) {
entry:
......@@ -258,6 +298,10 @@ entry:
; ARM32-DAG: vcvt.s32.f32 [[REG:s[0-9]*]], {{s[0-9]*}}
; ARM32-DAG: vmov {{r[0-9]+}}, [[REG]]
; ARM32: sxtb
; MIPS32-LABEL: floatToSigned8
; MIPS32: trunc.w.s
; MIPS32O2-LABEL: floatToSigned8
; MIPS32O2: trunc.w.s
define internal i32 @doubleToUnsigned8(double %a) {
entry:
......@@ -272,6 +316,10 @@ entry:
; ARM32-DAG: vcvt.u32.f64 [[REG:s[0-9]*]], {{d[0-9]*}}
; ARM32-DAG: vmov {{r[0-9]+}}, [[REG]]
; ARM32: uxtb
; MIPS32-LABEL: doubleToUnsigned8
; MIPS32: trunc.w.d
; MIPS32O2-LABEL: doubleToUnsigned8
; MIPS32O2: trunc.w.d
define internal i32 @floatToUnsigned8(float %a) {
entry:
......@@ -286,6 +334,10 @@ entry:
; ARM32-DAG: vcvt.u32.f32 [[REG:s[0-9]*]], {{s[0-9]*}}
; ARM32-DAG: vmov {{r[0-9]+}}, [[REG]]
; ARM32: uxtb
; MIPS32-LABEL: floatToUnsigned8
; MIPS32: trunc.w.s
; MIPS32O2-LABEL: floatToUnsigned8
; MIPS32O2: trunc.w.s
define internal i32 @doubleToUnsigned1(double %a) {
entry:
......@@ -302,6 +354,10 @@ entry:
; ARM32-DAG: and {{r[0-9]+}}, [[RES]], #1
; ARM32-NOT: uxth
; ARM32-NOT: uxtb
; MIPS32-LABEL: doubleToUnsigned1
; MIPS32: trunc.w.d
; MIPS32O2-LABEL: doubleToUnsigned1
; MIPS32O2: trunc.w.d
define internal i32 @floatToUnsigned1(float %a) {
entry:
......@@ -318,6 +374,10 @@ entry:
; ARM32-DAG: and {{r[0-9]+}}, [[RES]], #1
; ARM32-NOT: uxth
; ARM32-NOT: uxtb
; MIPS32-LABEL: floatToUnsigned1
; MIPS32: trunc.w.s
; MIPS32O2-LABEL: floatToUnsigned1
; MIPS32O2: trunc.w.s
define internal double @signed64ToDouble(i64 %a) {
entry:
......@@ -329,6 +389,10 @@ entry:
; CHECK: fstp QWORD
; ARM32-LABEL: signed64ToDouble
; TODO(jpp): implement this test.
; MIPS32-LABEL: signed64ToDouble
; MIPS32: jal __Sz_sitofp_i64_f64
; MIPS32O2-LABEL: signed64ToDouble
; MIPS32O2: jal __Sz_sitofp_i64_f64
define internal float @signed64ToFloat(i64 %a) {
entry:
......@@ -340,6 +404,10 @@ entry:
; CHECK: fstp DWORD
; ARM32-LABEL: signed64ToFloat
; TODO(jpp): implement this test.
; MIPS32-LABEL: signed64ToFloat
; MIPS32: jal __Sz_sitofp_i64_f32
; MIPS32O2-LABEL: signed64ToFloat
; MIPS32O2: jal __Sz_sitofp_i64_f32
define internal double @unsigned64ToDouble(i64 %a) {
entry:
......@@ -351,6 +419,10 @@ entry:
; CHECK: fstp
; ARM32-LABEL: unsigned64ToDouble
; TODO(jpp): implement this test.
; MIPS32-LABEL: unsigned64ToDouble
; MIPS32: jal __Sz_uitofp_i64_f64
; MIPS32O2-LABEL: unsigned64ToDouble
; MIPS32O2: jal __Sz_uitofp_i64_f64
define internal float @unsigned64ToFloat(i64 %a) {
entry:
......@@ -362,6 +434,10 @@ entry:
; CHECK: fstp
; ARM32-LABEL: unsigned64ToFloat
; TODO(jpp): implement this test.
; MIPS32-LABEL: unsigned64ToFloat
; MIPS32: jal __Sz_uitofp_i64_f32
; MIPS32O2-LABEL: unsigned64ToFloat
; MIPS32O2: jal __Sz_uitofp_i64_f32
define internal double @unsigned64ToDoubleConst() {
entry:
......@@ -375,6 +451,10 @@ entry:
; CHECK: fstp
; ARM32-LABEL: unsigned64ToDoubleConst
; TODO(jpp): implement this test.
; MIPS32-LABEL: unsigned64ToDoubleConst
; MIPS32: jal __Sz_uitofp_i64_f64
; MIPS32O2-LABEL: unsigned64ToDoubleConst
; MIPS32O2: jal __Sz_uitofp_i64_f64
define internal double @signed32ToDouble(i32 %a) {
entry:
......@@ -387,6 +467,10 @@ entry:
; ARM32-LABEL: signed32ToDouble
; ARM32-DAG: vmov [[SRC:s[0-9]+]], {{r[0-9]+}}
; ARM32-DAG: vcvt.f64.s32 {{d[0-9]+}}, [[SRC]]
; MIPS32-LABEL: signed32ToDouble
; MIPS32: cvt.d.w
; MIPS32O2-LABEL: signed32ToDouble
; MIPS32O2: cvt.d.w
define internal double @signed32ToDoubleConst() {
entry:
......@@ -400,6 +484,10 @@ entry:
; ARM32-DAG: mov [[CONST:r[0-9]+]], #123
; ARM32-DAG: vmov [[SRC:s[0-9]+]], [[CONST]]
; ARM32-DAG: vcvt.f64.s32 {{d[0-9]+}}, [[SRC]]
; MIPS32-LABEL: signed32ToDoubleConst
; MIPS32: cvt.d.w
; MIPS32O2-LABEL: signed32ToDoubleConst
; MIPS32O2: cvt.d.w
define internal float @signed32ToFloat(i32 %a) {
entry:
......@@ -429,6 +517,10 @@ entry:
; ARM32-LABEL: unsigned32ToDouble
; ARM32-DAG: vmov [[SRC:s[0-9]+]], {{r[0-9]+}}
; ARM32-DAG: vcvt.f64.u32 {{d[0-9]+}}, [[SRC]]
; MIPS32-LABEL: unsigned32ToDouble
; MIPS32: jal __Sz_uitofp_i32_f64
; MIPS32O2-LABEL: unsigned32ToDouble
; MIPS32O2: jal __Sz_uitofp_i32_f64
define internal float @unsigned32ToFloat(i32 %a) {
entry:
......@@ -441,6 +533,10 @@ entry:
; ARM32-LABEL: unsigned32ToFloat
; ARM32-DAG: vmov [[SRC:s[0-9]+]], {{r[0-9]+}}
; ARM32-DAG: vcvt.f32.u32 {{s[0-9]+}}, [[SRC]]
; MIPS32-LABEL: unsigned32ToFloat
; MIPS32: jal __Sz_uitofp_i32_f32
; MIPS32O2-LABEL: unsigned32ToFloat
; MIPS32O2: jal __Sz_uitofp_i32_f32
define internal double @signed16ToDouble(i32 %a) {
entry:
......@@ -455,6 +551,10 @@ entry:
; ARM32-DAG: sxth [[INT:r[0-9]+]]
; ARM32-DAG: vmov [[SRC:s[0-9]+]], [[INT]]
; ARM32-DAG: vcvt.f64.s32 {{d[0-9]+}}, [[SRC]]
; MIPS32-LABEL: signed16ToDouble
; MIPS32: cvt.d.w
; MIPS32O2-LABEL: signed16ToDouble
; MIPS32O2: cvt.d.w
define internal float @signed16ToFloat(i32 %a) {
entry:
......@@ -469,6 +569,10 @@ entry:
; ARM32-DAG: sxth [[INT:r[0-9]+]]
; ARM32-DAG: vmov [[SRC:s[0-9]+]], [[INT]]
; ARM32-DAG: vcvt.f32.s32 {{s[0-9]+}}, [[SRC]]
; MIPS32-LABEL: signed16ToFloat
; MIPS32: cvt.s.w
; MIPS32O2-LABEL: signed16ToFloat
; MIPS32O2: cvt.s.w
define internal double @unsigned16ToDouble(i32 %a) {
entry:
......@@ -483,6 +587,10 @@ entry:
; ARM32-DAG: uxth [[INT:r[0-9]+]]
; ARM32-DAG: vmov [[SRC:s[0-9]+]], [[INT]]
; ARM32-DAG: vcvt.f64.u32 {{d[0-9]+}}, [[SRC]]
; MIPS32-LABEL: unsigned16ToDouble
; MIPS32: cvt.d.w
; MIPS32O2-LABEL: unsigned16ToDouble
; MIPS32O2: cvt.d.w
define internal double @unsigned16ToDoubleConst() {
entry:
......@@ -497,6 +605,10 @@ entry:
; ARM32-DAG: uxth [[INT]]
; ARM32-DAG: vmov [[SRC:s[0-9]+]], [[INT]]
; ARM32-DAG: vcvt.f64.u32 {{d[0-9]+}}, [[SRC]]
; MIPS32-LABEL: unsigned16ToDoubleConst
; MIPS32: cvt.d.w
; MIPS32O2-LABEL: unsigned16ToDoubleConst
; MIPS32O2: cvt.d.w
define internal float @unsigned16ToFloat(i32 %a) {
entry:
......@@ -511,6 +623,10 @@ entry:
; ARM32-DAG: uxth [[INT:r[0-9]+]]
; ARM32-DAG: vmov [[SRC:s[0-9]+]], [[INT]]
; ARM32-DAG: vcvt.f32.u32 {{s[0-9]+}}, [[SRC]]
; MIPS32-LABEL: unsigned16ToFloat
; MIPS32: cvt.s.w
; MIPS32O2-LABEL: unsigned16ToFloat
; MIPS32O2: cvt.s.w
define internal double @signed8ToDouble(i32 %a) {
entry:
......@@ -525,6 +641,10 @@ entry:
; ARM32-DAG: sxtb [[INT:r[0-9]+]]
; ARM32-DAG: vmov [[SRC:s[0-9]+]], [[INT]]
; ARM32-DAG: vcvt.f64.s32 {{d[0-9]+}}, [[SRC]]
; MIPS32-LABEL: signed8ToDouble
; MIPS32: cvt.d.w
; MIPS32O2-LABEL: signed8ToDouble
; MIPS32O2: cvt.d.w
define internal float @signed8ToFloat(i32 %a) {
entry:
......@@ -539,6 +659,10 @@ entry:
; ARM32-DAG: sxtb [[INT:r[0-9]+]]
; ARM32-DAG: vmov [[SRC:s[0-9]+]], [[INT]]
; ARM32-DAG: vcvt.f32.s32 {{s[0-9]+}}, [[SRC]]
; MIPS32-LABEL: signed8ToFloat
; MIPS32: cvt.s.w
; MIPS32O2-LABEL: signed8ToFloat
; MIPS32O2: cvt.s.w
define internal double @unsigned8ToDouble(i32 %a) {
entry:
......@@ -553,6 +677,10 @@ entry:
; ARM32-DAG: uxtb [[INT:r[0-9]+]]
; ARM32-DAG: vmov [[SRC:s[0-9]+]], [[INT]]
; ARM32-DAG: vcvt.f64.u32 {{d[0-9]+}}, [[SRC]]
; MIPS32-LABEL: unsigned8ToDouble
; MIPS32: cvt.d.w
; MIPS32O2-LABEL: unsigned8ToDouble
; MIPS32O2: cvt.d.w
define internal float @unsigned8ToFloat(i32 %a) {
entry:
......@@ -567,6 +695,10 @@ entry:
; ARM32-DAG: uxtb [[INT:r[0-9]+]]
; ARM32-DAG: vmov [[SRC:s[0-9]+]], [[INT]]
; ARM32-DAG: vcvt.f32.u32 {{s[0-9]+}}, [[SRC]]
; MIPS32-LABEL: unsigned8ToFloat
; MIPS32: cvt.s.w
; MIPS32O2-LABEL: unsigned8ToFloat
; MIPS32O2: cvt.s.w
define internal double @unsigned1ToDouble(i32 %a) {
entry:
......@@ -581,6 +713,10 @@ entry:
; ARM32-DAG: and [[INT:r[0-9]+]], {{r[0-9]+}}, #1
; ARM32-DAG: vmov [[SRC:s[0-9]+]], [[INT]]
; ARM32-DAG: vcvt.f64.u32 {{d[0-9]+}}, [[SRC]]
; MIPS32-LABEL: unsigned1ToDouble
; MIPS32: cvt.d.w
; MIPS32O2-LABEL: unsigned1ToDouble
; MIPS32O2: cvt.d.w
define internal float @unsigned1ToFloat(i32 %a) {
entry:
......@@ -595,6 +731,10 @@ entry:
; ARM32-DAG: and [[INT:r[0-9]+]], {{r[0-9]+}}, #1
; ARM32-DAG: vmov [[SRC:s[0-9]+]], [[INT]]
; ARM32-DAG: vcvt.f32.u32 {{s[0-9]+}}, [[SRC]]
; MIPS32-LABEL: unsigned1ToFloat
; MIPS32: cvt.s.w
; MIPS32O2-LABEL: unsigned1ToFloat
; MIPS32O2: cvt.s.w
define internal float @int32BitcastToFloat(i32 %a) {
entry:
......@@ -605,6 +745,11 @@ entry:
; CHECK: mov
; ARM32-LABEL: int32BitcastToFloat
; ARM32: vmov s{{[0-9]+}}, r{{[0-9]+}}
; MIPS32-LABEL: int32BitcastToFloat
; MIPS32: sw
; MIPS32: lwc1
; MIPS32O2-LABEL: int32BitcastToFloat
define internal float @int32BitcastToFloatConst() {
entry:
%conv = bitcast i32 8675309 to float
......@@ -616,6 +761,9 @@ entry:
; ARM32-DAG: movw [[REG:r[0-9]+]], #24557
; ARM32-DAG: movt [[REG]], #132
; ARM32: vmov s{{[0-9]+}}, [[REG]]
; MIPS32-LABEL: int32BitcastToFloatConst
; MIPS32: lwc1
; MIPS32O2-LABEL: int32BitcastToFloatConst
define internal double @int64BitcastToDouble(i64 %a) {
entry:
......@@ -626,6 +774,11 @@ entry:
; CHECK: mov
; ARM32-LABEL: int64BitcastToDouble
; ARM32: vmov d{{[0-9]+}}, r{{[0-9]+}}, r{{[0-9]+}}
; MIPS32-LABEL: int64BitcastToDouble
; MIPS32: sw
; MIPS32: sw
; MIPS32: ldc1
; MIPS32O2-LABEL: int64BitcastToDouble
define internal double @int64BitcastToDoubleConst() {
entry:
......@@ -639,3 +792,6 @@ entry:
; ARM32-DAG: movt [[REG0]], #137
; ARM32-DAG: mov [[REG1:r[0-9]+]], #0
; ARM32-DAG: vmov d{{[0-9]+}}, [[REG0]], [[REG1]]
; MIPS32-LABEL: int64BitcastToDoubleConst
; MIPS32: ldc1
; MIPS32O2-LABEL: int64BitcastToDoubleConst
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