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Commit 50a637f5 by Antonio Maiorano
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Update llvm 10 Linux config

Ran 'python3 third_party/llvm-10.0/scripts/update.py linux' to regenerate new linux configs that use options specified in the script. * Removes targets we don't need to support, since the update.py script specifies the exact targets we want to build. When Ben first added LLVM 10 configs, he ran the default build, which built all targets. * It also removes defines for certain options that were in update.py. Again, Ben's initial run was not done with update.py, which explains the differences. * Finally, and as discussed in chat, there's a MIPS header in the "common" folder that shows diffs. This diff is between the version of this file generated from a Windows build vs a Linux build. This implies that perhaps this shouldn't be considered "common" afterall; however, since the original MIPS target was built from Linux, let's keep this version. I'll make sure to document this in the LLVM update doc I will write. Bug: b/152339534 Change-Id: I2bac0f2e6d79e84332383df8c49fda92661298fb Reviewed-on: https://swiftshader-review.googlesource.com/c/SwiftShader/+/46248 Kokoro-Result: kokoro <noreply+kokoro@google.com> Tested-by: 's avatarAntonio Maiorano <amaiorano@google.com> Reviewed-by: 's avatarNicolas Capens <nicolascapens@google.com>
parent 49a33484
Showing with 205 additions and 64 deletions
third_party/llvm-10.0/configs/common/lib/Target/Mips/MipsGenGlobalISel.inc
...@@ -12540,7 +12540,7 @@ const int64_t *MipsInstructionSelector::getMatchTable() const { ...@@ -12540,7 +12540,7 @@ const int64_t *MipsInstructionSelector::getMatchTable() const {
GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY,
GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
GIR_CopySubReg, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, /*SubRegIdx*/1, // src GIR_CopySubReg, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, /*SubRegIdx*/1, // src
GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, /*RC DSPR*/5, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, /*RC GPR32*/8,
GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, /*RC GPR64*/38, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, /*RC GPR64*/38,
GIR_BuildMI, /*InsnID*/0, /*Opcode*/Mips::SLL, GIR_BuildMI, /*InsnID*/0, /*Opcode*/Mips::SLL,
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // rd GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // rd
...@@ -13276,7 +13276,7 @@ const int64_t *MipsInstructionSelector::getMatchTable() const { ...@@ -13276,7 +13276,7 @@ const int64_t *MipsInstructionSelector::getMatchTable() const {
GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY,
GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
GIR_CopySubReg, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/1, /*SubRegIdx*/1, // rs GIR_CopySubReg, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/1, /*SubRegIdx*/1, // rs
GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, /*RC DSPR*/5, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, /*RC GPR32*/8,
GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, /*RC GPR64*/38, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, /*RC GPR64*/38,
GIR_BuildMI, /*InsnID*/0, /*Opcode*/Mips::DSLLV, GIR_BuildMI, /*InsnID*/0, /*Opcode*/Mips::DSLLV,
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // rd GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // rd
...@@ -14052,7 +14052,7 @@ const int64_t *MipsInstructionSelector::getMatchTable() const { ...@@ -14052,7 +14052,7 @@ const int64_t *MipsInstructionSelector::getMatchTable() const {
GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY,
GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
GIR_CopySubReg, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/1, /*SubRegIdx*/1, // rs GIR_CopySubReg, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/1, /*SubRegIdx*/1, // rs
GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, /*RC DSPR*/5, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, /*RC GPR32*/8,
GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, /*RC GPR64*/38, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, /*RC GPR64*/38,
GIR_BuildMI, /*InsnID*/0, /*Opcode*/Mips::DSRLV, GIR_BuildMI, /*InsnID*/0, /*Opcode*/Mips::DSRLV,
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // rd GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // rd
...@@ -14808,7 +14808,7 @@ const int64_t *MipsInstructionSelector::getMatchTable() const { ...@@ -14808,7 +14808,7 @@ const int64_t *MipsInstructionSelector::getMatchTable() const {
GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY,
GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
GIR_CopySubReg, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/1, /*SubRegIdx*/1, // rs GIR_CopySubReg, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/1, /*SubRegIdx*/1, // rs
GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, /*RC DSPR*/5, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, /*RC GPR32*/8,
GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, /*RC GPR64*/38, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, /*RC GPR64*/38,
GIR_BuildMI, /*InsnID*/0, /*Opcode*/Mips::DSRAV, GIR_BuildMI, /*InsnID*/0, /*Opcode*/Mips::DSRAV,
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // rd GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // rd
third_party/llvm-10.0/configs/linux/include/llvm/Config/AsmParsers.def
...@@ -24,20 +24,21 @@ ...@@ -24,20 +24,21 @@
# error Please define the macro LLVM_ASM_PARSER(TargetName) # error Please define the macro LLVM_ASM_PARSER(TargetName)
#endif #endif
#if defined(__aarch64__)
LLVM_ASM_PARSER(AArch64) LLVM_ASM_PARSER(AArch64)
LLVM_ASM_PARSER(AMDGPU) #endif
#if defined(__arm__)
LLVM_ASM_PARSER(ARM) LLVM_ASM_PARSER(ARM)
LLVM_ASM_PARSER(BPF) #endif
LLVM_ASM_PARSER(Hexagon) #if defined(__i386__) || defined(__x86_64__)
LLVM_ASM_PARSER(Lanai) LLVM_ASM_PARSER(X86)
#endif
#if defined(__mips__)
LLVM_ASM_PARSER(Mips) LLVM_ASM_PARSER(Mips)
LLVM_ASM_PARSER(MSP430) #endif
#if defined(__powerpc64__)
LLVM_ASM_PARSER(PowerPC) LLVM_ASM_PARSER(PowerPC)
LLVM_ASM_PARSER(RISCV) #endif
LLVM_ASM_PARSER(Sparc)
LLVM_ASM_PARSER(SystemZ)
LLVM_ASM_PARSER(WebAssembly)
LLVM_ASM_PARSER(X86)
#undef LLVM_ASM_PARSER #undef LLVM_ASM_PARSER
third_party/llvm-10.0/configs/linux/include/llvm/Config/AsmPrinters.def
...@@ -24,22 +24,21 @@ ...@@ -24,22 +24,21 @@
# error Please define the macro LLVM_ASM_PRINTER(TargetName) # error Please define the macro LLVM_ASM_PRINTER(TargetName)
#endif #endif
#if defined(__aarch64__)
LLVM_ASM_PRINTER(AArch64) LLVM_ASM_PRINTER(AArch64)
LLVM_ASM_PRINTER(AMDGPU) #endif
#if defined(__arm__)
LLVM_ASM_PRINTER(ARM) LLVM_ASM_PRINTER(ARM)
LLVM_ASM_PRINTER(BPF) #endif
LLVM_ASM_PRINTER(Hexagon) #if defined(__i386__) || defined(__x86_64__)
LLVM_ASM_PRINTER(Lanai) LLVM_ASM_PRINTER(X86)
#endif
#if defined(__mips__)
LLVM_ASM_PRINTER(Mips) LLVM_ASM_PRINTER(Mips)
LLVM_ASM_PRINTER(MSP430) #endif
LLVM_ASM_PRINTER(NVPTX) #if defined(__powerpc64__)
LLVM_ASM_PRINTER(PowerPC) LLVM_ASM_PRINTER(PowerPC)
LLVM_ASM_PRINTER(RISCV) #endif
LLVM_ASM_PRINTER(Sparc)
LLVM_ASM_PRINTER(SystemZ)
LLVM_ASM_PRINTER(WebAssembly)
LLVM_ASM_PRINTER(X86)
LLVM_ASM_PRINTER(XCore)
#undef LLVM_ASM_PRINTER #undef LLVM_ASM_PRINTER
third_party/llvm-10.0/configs/linux/include/llvm/Config/Disassemblers.def
...@@ -24,21 +24,21 @@ ...@@ -24,21 +24,21 @@
# error Please define the macro LLVM_DISASSEMBLER(TargetName) # error Please define the macro LLVM_DISASSEMBLER(TargetName)
#endif #endif
#if defined(__aarch64__)
LLVM_DISASSEMBLER(AArch64) LLVM_DISASSEMBLER(AArch64)
LLVM_DISASSEMBLER(AMDGPU) #endif
#if defined(__arm__)
LLVM_DISASSEMBLER(ARM) LLVM_DISASSEMBLER(ARM)
LLVM_DISASSEMBLER(BPF) #endif
LLVM_DISASSEMBLER(Hexagon) #if defined(__i386__) || defined(__x86_64__)
LLVM_DISASSEMBLER(Lanai) LLVM_DISASSEMBLER(X86)
#endif
#if defined(__mips__)
LLVM_DISASSEMBLER(Mips) LLVM_DISASSEMBLER(Mips)
LLVM_DISASSEMBLER(MSP430) #endif
#if defined(__powerpc64__)
LLVM_DISASSEMBLER(PowerPC) LLVM_DISASSEMBLER(PowerPC)
LLVM_DISASSEMBLER(RISCV) #endif
LLVM_DISASSEMBLER(Sparc)
LLVM_DISASSEMBLER(SystemZ)
LLVM_DISASSEMBLER(WebAssembly)
LLVM_DISASSEMBLER(X86)
LLVM_DISASSEMBLER(XCore)
#undef LLVM_DISASSEMBLER #undef LLVM_DISASSEMBLER
third_party/llvm-10.0/configs/linux/include/llvm/Config/Targets.def
...@@ -23,22 +23,21 @@ ...@@ -23,22 +23,21 @@
# error Please define the macro LLVM_TARGET(TargetName) # error Please define the macro LLVM_TARGET(TargetName)
#endif #endif
#if defined(__aarch64__)
LLVM_TARGET(AArch64) LLVM_TARGET(AArch64)
LLVM_TARGET(AMDGPU) #endif
#if defined(__arm__)
LLVM_TARGET(ARM) LLVM_TARGET(ARM)
LLVM_TARGET(BPF) #endif
LLVM_TARGET(Hexagon) #if defined(__i386__) || defined(__x86_64__)
LLVM_TARGET(Lanai) LLVM_TARGET(X86)
#endif
#if defined(__mips__)
LLVM_TARGET(Mips) LLVM_TARGET(Mips)
LLVM_TARGET(MSP430) #endif
LLVM_TARGET(NVPTX) #if defined(__powerpc64__)
LLVM_TARGET(PowerPC) LLVM_TARGET(PowerPC)
LLVM_TARGET(RISCV) #endif
LLVM_TARGET(Sparc)
LLVM_TARGET(SystemZ)
LLVM_TARGET(WebAssembly)
LLVM_TARGET(X86)
LLVM_TARGET(XCore)
#undef LLVM_TARGET #undef LLVM_TARGET
third_party/llvm-10.0/configs/linux/include/llvm/Config/abi-breaking.h
...@@ -13,7 +13,7 @@ ...@@ -13,7 +13,7 @@
#define LLVM_ABI_BREAKING_CHECKS_H #define LLVM_ABI_BREAKING_CHECKS_H
/* Define to enable checks that alter the LLVM C++ ABI */ /* Define to enable checks that alter the LLVM C++ ABI */
#define LLVM_ENABLE_ABI_BREAKING_CHECKS 1 #define LLVM_ENABLE_ABI_BREAKING_CHECKS 0
/* Define to enable reverse iteration of unordered llvm containers */ /* Define to enable reverse iteration of unordered llvm containers */
#define LLVM_ENABLE_REVERSE_ITERATION 0 #define LLVM_ENABLE_REVERSE_ITERATION 0
......
third_party/llvm-10.0/configs/linux/include/llvm/Config/config.h
...@@ -8,18 +8,18 @@ ...@@ -8,18 +8,18 @@
#define BUG_REPORT_URL "https://bugs.llvm.org/" #define BUG_REPORT_URL "https://bugs.llvm.org/"
/* Define to 1 to enable backtraces, and to 0 otherwise. */ /* Define to 1 to enable backtraces, and to 0 otherwise. */
#define ENABLE_BACKTRACES 1 /* #undef ENABLE_BACKTRACES */
/* Define to 1 to enable crash overrides, and to 0 otherwise. */ /* Define to 1 to enable crash overrides, and to 0 otherwise. */
#define ENABLE_CRASH_OVERRIDES 1 /* #undef ENABLE_CRASH_OVERRIDES */
/* Define to 1 to enable crash memory dumps, and to 0 otherwise. */ /* Define to 1 to enable crash memory dumps, and to 0 otherwise. */
#define LLVM_ENABLE_CRASH_DUMPS 0 #define LLVM_ENABLE_CRASH_DUMPS 0
/* Define to 1 if you have the `backtrace' function. */ /* Define to 1 if you have the `backtrace' function. */
#define HAVE_BACKTRACE TRUE /* #undef HAVE_BACKTRACE */
#define BACKTRACE_HEADER <execinfo.h> /* #undef BACKTRACE_HEADER */
/* Define to 1 if you have the <CrashReporterClient.h> header file. */ /* Define to 1 if you have the <CrashReporterClient.h> header file. */
/* #undef HAVE_CRASHREPORTERCLIENT_H */ /* #undef HAVE_CRASHREPORTERCLIENT_H */
...@@ -104,13 +104,13 @@ ...@@ -104,13 +104,13 @@
#define HAVE_LIBPTHREAD 1 #define HAVE_LIBPTHREAD 1
/* Define to 1 if you have the `pthread_getname_np' function. */ /* Define to 1 if you have the `pthread_getname_np' function. */
#define HAVE_PTHREAD_GETNAME_NP 1 /* #undef HAVE_PTHREAD_GETNAME_NP */
/* Define to 1 if you have the `pthread_setname_np' function. */ /* Define to 1 if you have the `pthread_setname_np' function. */
#define HAVE_PTHREAD_SETNAME_NP 1 /* #undef HAVE_PTHREAD_SETNAME_NP */
/* Define to 1 if you have the `z' library (-lz). */ /* Define to 1 if you have the `z' library (-lz). */
#define HAVE_LIBZ 1 /* #undef HAVE_LIBZ */
/* Define to 1 if you have the <link.h> header file. */ /* Define to 1 if you have the <link.h> header file. */
#define HAVE_LINK_H 1 #define HAVE_LINK_H 1
...@@ -137,7 +137,7 @@ ...@@ -137,7 +137,7 @@
#define HAVE_POSIX_FALLOCATE 1 #define HAVE_POSIX_FALLOCATE 1
/* Define to 1 if you have the `posix_spawn' function. */ /* Define to 1 if you have the `posix_spawn' function. */
#define HAVE_POSIX_SPAWN 1 /* #undef HAVE_POSIX_SPAWN */
/* Define to 1 if you have the `pread' function. */ /* Define to 1 if you have the `pread' function. */
#define HAVE_PREAD 1 #define HAVE_PREAD 1
...@@ -218,7 +218,7 @@ ...@@ -218,7 +218,7 @@
/* #undef HAVE_LIBXAR */ /* #undef HAVE_LIBXAR */
/* Define to 1 if you have the <termios.h> header file. */ /* Define to 1 if you have the <termios.h> header file. */
#define HAVE_TERMIOS_H 1 /* #undef HAVE_TERMIOS_H */
/* Define to 1 if you have the <unistd.h> header file. */ /* Define to 1 if you have the <unistd.h> header file. */
#define HAVE_UNISTD_H 1 #define HAVE_UNISTD_H 1
...@@ -227,7 +227,7 @@ ...@@ -227,7 +227,7 @@
/* #undef HAVE_VALGRIND_VALGRIND_H */ /* #undef HAVE_VALGRIND_VALGRIND_H */
/* Define to 1 if you have the <zlib.h> header file. */ /* Define to 1 if you have the <zlib.h> header file. */
#define HAVE_ZLIB_H 1 /* #undef HAVE_ZLIB_H */
/* Have host's _alloca */ /* Have host's _alloca */
/* #undef HAVE__ALLOCA */ /* #undef HAVE__ALLOCA */
...@@ -236,7 +236,7 @@ ...@@ -236,7 +236,7 @@
/* #undef HAVE__CHSIZE_S */ /* #undef HAVE__CHSIZE_S */
/* Define to 1 if you have the `_Unwind_Backtrace' function. */ /* Define to 1 if you have the `_Unwind_Backtrace' function. */
#define HAVE__UNWIND_BACKTRACE 1 /* #undef HAVE__UNWIND_BACKTRACE */
/* Have host's __alloca */ /* Have host's __alloca */
/* #undef HAVE___ALLOCA */ /* #undef HAVE___ALLOCA */
...@@ -294,10 +294,26 @@ ...@@ -294,10 +294,26 @@
/* Target triple LLVM will generate code for by default */ /* Target triple LLVM will generate code for by default */
/* Doesn't use `cmakedefine` because it is allowed to be empty. */ /* Doesn't use `cmakedefine` because it is allowed to be empty. */
#if defined(__x86_64__)
#define LLVM_DEFAULT_TARGET_TRIPLE "x86_64-unknown-linux-gnu" #define LLVM_DEFAULT_TARGET_TRIPLE "x86_64-unknown-linux-gnu"
#elif defined(__i386__)
#define LLVM_DEFAULT_TARGET_TRIPLE "i686-pc-linux-gnu"
#elif defined(__arm__)
#define LLVM_DEFAULT_TARGET_TRIPLE "armv7-linux-gnueabihf"
#elif defined(__aarch64__)
#define LLVM_DEFAULT_TARGET_TRIPLE "aarch64-linux-gnu"
#elif defined(__mips__)
#define LLVM_DEFAULT_TARGET_TRIPLE "mipsel-linux-gnu"
#elif defined(__mips64)
#define LLVM_DEFAULT_TARGET_TRIPLE "mips64el-linux-gnuabi64"
#elif defined(__powerpc64__)
#define LLVM_DEFAULT_TARGET_TRIPLE "powerpc64le-unknown-linux-gnu"
#else
#error "unknown architecture"
#endif
/* Define if zlib compression is available */ /* Define if zlib compression is available */
#define LLVM_ENABLE_ZLIB 1 #define LLVM_ENABLE_ZLIB 0
/* Define if overriding target triple is enabled */ /* Define if overriding target triple is enabled */
/* #undef LLVM_TARGET_TRIPLE_ENV */ /* #undef LLVM_TARGET_TRIPLE_ENV */
...@@ -309,7 +325,7 @@ ...@@ -309,7 +325,7 @@
#define LLVM_VERSION_PRINTER_SHOW_HOST_TARGET_INFO 1 #define LLVM_VERSION_PRINTER_SHOW_HOST_TARGET_INFO 1
/* Define if libxml2 is supported on this platform. */ /* Define if libxml2 is supported on this platform. */
#define LLVM_LIBXML2_ENABLED 1 /* #undef LLVM_LIBXML2_ENABLED */
/* Define to the extension used for shared libraries, say, ".so". */ /* Define to the extension used for shared libraries, say, ".so". */
#define LTDL_SHLIB_EXT ".so" #define LTDL_SHLIB_EXT ".so"
...@@ -345,7 +361,7 @@ ...@@ -345,7 +361,7 @@
#define LLVM_GISEL_COV_ENABLED 0 #define LLVM_GISEL_COV_ENABLED 0
/* Define if we have z3 and want to build it */ /* Define if we have z3 and want to build it */
/* #undef LLVM_WITH_Z3 */ #define LLVM_WITH_Z3 1
/* Define to the default GlobalISel coverage file prefix */ /* Define to the default GlobalISel coverage file prefix */
/* #undef LLVM_GISEL_COV_PREFIX */ /* #undef LLVM_GISEL_COV_PREFIX */
......
third_party/llvm-10.0/configs/linux/include/llvm/Config/llvm-config.h
...@@ -14,11 +14,37 @@ ...@@ -14,11 +14,37 @@
#ifndef LLVM_CONFIG_H #ifndef LLVM_CONFIG_H
#define LLVM_CONFIG_H #define LLVM_CONFIG_H
#if !defined(__i386__) && defined(_M_IX86)
#define __i386__ 1
#endif
#if !defined(__x86_64__) && (defined(_M_AMD64) || defined (_M_X64))
#define __x86_64__ 1
#endif
#define LLVM_CONFIG_H
/* Define if LLVM_ENABLE_DUMP is enabled */ /* Define if LLVM_ENABLE_DUMP is enabled */
/* #undef LLVM_ENABLE_DUMP */ /* #undef LLVM_ENABLE_DUMP */
/* Target triple LLVM will generate code for by default */ /* Target triple LLVM will generate code for by default */
#if defined(__x86_64__)
#define LLVM_DEFAULT_TARGET_TRIPLE "x86_64-unknown-linux-gnu" #define LLVM_DEFAULT_TARGET_TRIPLE "x86_64-unknown-linux-gnu"
#elif defined(__i386__)
#define LLVM_DEFAULT_TARGET_TRIPLE "i686-pc-linux-gnu"
#elif defined(__arm__)
#define LLVM_DEFAULT_TARGET_TRIPLE "armv7-linux-gnueabihf"
#elif defined(__aarch64__)
#define LLVM_DEFAULT_TARGET_TRIPLE "aarch64-linux-gnu"
#elif defined(__mips__)
#define LLVM_DEFAULT_TARGET_TRIPLE "mipsel-linux-gnu"
#elif defined(__mips64)
#define LLVM_DEFAULT_TARGET_TRIPLE "mips64el-linux-gnuabi64"
#elif defined(__powerpc64__)
#define LLVM_DEFAULT_TARGET_TRIPLE "powerpc64le-unknown-linux-gnu"
#else
#error "unknown architecture"
#endif
/* Define if threads enabled */ /* Define if threads enabled */
#define LLVM_ENABLE_THREADS 1 #define LLVM_ENABLE_THREADS 1
...@@ -27,28 +53,128 @@ ...@@ -27,28 +53,128 @@
#define LLVM_HAS_ATOMICS 1 #define LLVM_HAS_ATOMICS 1
/* Host triple LLVM will be executed on */ /* Host triple LLVM will be executed on */
#if defined(__x86_64__)
#define LLVM_HOST_TRIPLE "x86_64-unknown-linux-gnu" #define LLVM_HOST_TRIPLE "x86_64-unknown-linux-gnu"
#elif defined(__i386__)
#define LLVM_HOST_TRIPLE "i686-pc-linux-gnu"
#elif defined(__arm__)
#define LLVM_HOST_TRIPLE "armv7-linux-gnueabihf"
#elif defined(__aarch64__)
#define LLVM_HOST_TRIPLE "aarch64-linux-gnu"
#elif defined(__mips__)
#define LLVM_HOST_TRIPLE "mipsel-linux-gnu"
#elif defined(__mips64)
#define LLVM_HOST_TRIPLE "mips64el-linux-gnuabi64"
#elif defined(__powerpc64__)
#define LLVM_HOST_TRIPLE "powerpc64le-unknown-linux-gnu"
#else
#error "unknown architecture"
#endif
/* LLVM architecture name for the native architecture, if available */ /* LLVM architecture name for the native architecture, if available */
#if defined(__aarch64__)
#define LLVM_NATIVE_ARCH AArch64
#elif defined(__arm__)
#define LLVM_NATIVE_ARCH ARM
#elif defined(__i386__) || defined(__x86_64__)
#define LLVM_NATIVE_ARCH X86 #define LLVM_NATIVE_ARCH X86
#elif defined(__mips__)
#define LLVM_NATIVE_ARCH Mips
#elif defined(__powerpc64__)
#define LLVM_NATIVE_ARCH PowerPC
#else
#error "unknown architecture"
#endif
/* LLVM name for the native AsmParser init function, if available */ /* LLVM name for the native AsmParser init function, if available */
#if defined(__aarch64__)
#define LLVM_NATIVE_ASMPARSER LLVMInitializeAArch64AsmParser
#elif defined(__arm__)
#define LLVM_NATIVE_ASMPARSER LLVMInitializeARMAsmParser
#elif defined(__i386__) || defined(__x86_64__)
#define LLVM_NATIVE_ASMPARSER LLVMInitializeX86AsmParser #define LLVM_NATIVE_ASMPARSER LLVMInitializeX86AsmParser
#elif defined(__mips__)
#define LLVM_NATIVE_ASMPARSER LLVMInitializeMipsAsmParser
#elif defined(__powerpc64__)
#define LLVM_NATIVE_ASMPARSER LLVMInitializePowerPCAsmParser
#else
#error "unknown architecture"
#endif
/* LLVM name for the native AsmPrinter init function, if available */ /* LLVM name for the native AsmPrinter init function, if available */
#if defined(__aarch64__)
#define LLVM_NATIVE_ASMPRINTER LLVMInitializeAArch64AsmPrinter
#elif defined(__arm__)
#define LLVM_NATIVE_ASMPRINTER LLVMInitializeARMAsmPrinter
#elif defined(__i386__) || defined(__x86_64__)
#define LLVM_NATIVE_ASMPRINTER LLVMInitializeX86AsmPrinter #define LLVM_NATIVE_ASMPRINTER LLVMInitializeX86AsmPrinter
#elif defined(__mips__)
#define LLVM_NATIVE_ASMPRINTER LLVMInitializeMipsAsmPrinter
#elif defined(__powerpc64__)
#define LLVM_NATIVE_ASMPRINTER LLVMInitializePowerPCAsmPrinter
#else
#error "unknown architecture"
#endif
/* LLVM name for the native Disassembler init function, if available */ /* LLVM name for the native Disassembler init function, if available */
#if defined(__aarch64__)
#define LLVM_NATIVE_DISASSEMBLER LLVMInitializeAArch64Disassembler
#elif defined(__arm__)
#define LLVM_NATIVE_DISASSEMBLER LLVMInitializeARMDisassembler
#elif defined(__i386__) || defined(__x86_64__)
#define LLVM_NATIVE_DISASSEMBLER LLVMInitializeX86Disassembler #define LLVM_NATIVE_DISASSEMBLER LLVMInitializeX86Disassembler
#elif defined(__mips__)
#define LLVM_NATIVE_DISASSEMBLER LLVMInitializeMipsDisassembler
#elif defined(__powerpc64__)
#define LLVM_NATIVE_DISASSEMBLER LLVMInitializePowerPCDisassembler
#else
#error "unknown architecture"
#endif
/* LLVM name for the native Target init function, if available */ /* LLVM name for the native Target init function, if available */
#if defined(__aarch64__)
#define LLVM_NATIVE_TARGET LLVMInitializeAArch64Target
#elif defined(__arm__)
#define LLVM_NATIVE_TARGET LLVMInitializeARMTarget
#elif defined(__i386__) || defined(__x86_64__)
#define LLVM_NATIVE_TARGET LLVMInitializeX86Target #define LLVM_NATIVE_TARGET LLVMInitializeX86Target
#elif defined(__mips__)
#define LLVM_NATIVE_TARGET LLVMInitializeMipsTarget
#elif defined(__powerpc64__)
#define LLVM_NATIVE_TARGET LLVMInitializePowerPCTarget
#else
#error "unknown architecture"
#endif
/* LLVM name for the native TargetInfo init function, if available */ /* LLVM name for the native TargetInfo init function, if available */
#if defined(__aarch64__)
#define LLVM_NATIVE_TARGETINFO LLVMInitializeAArch64TargetInfo
#elif defined(__arm__)
#define LLVM_NATIVE_TARGETINFO LLVMInitializeARMTargetInfo
#elif defined(__i386__) || defined(__x86_64__)
#define LLVM_NATIVE_TARGETINFO LLVMInitializeX86TargetInfo #define LLVM_NATIVE_TARGETINFO LLVMInitializeX86TargetInfo
#elif defined(__mips__)
#define LLVM_NATIVE_TARGETINFO LLVMInitializeMipsTargetInfo
#elif defined(__powerpc64__)
#define LLVM_NATIVE_TARGETINFO LLVMInitializePowerPCTargetInfo
#else
#error "unknown architecture"
#endif
/* LLVM name for the native target MC init function, if available */ /* LLVM name for the native target MC init function, if available */
#if defined(__aarch64__)
#define LLVM_NATIVE_TARGETMC LLVMInitializeAArch64TargetMC
#elif defined(__arm__)
#define LLVM_NATIVE_TARGETMC LLVMInitializeARMTargetMC
#elif defined(__i386__) || defined(__x86_64__)
#define LLVM_NATIVE_TARGETMC LLVMInitializeX86TargetMC #define LLVM_NATIVE_TARGETMC LLVMInitializeX86TargetMC
#elif defined(__mips__)
#define LLVM_NATIVE_TARGETMC LLVMInitializeMipsTargetMC
#elif defined(__powerpc64__)
#define LLVM_NATIVE_TARGETMC LLVMInitializePowerPCTargetMC
#else
#error "unknown architecture"
#endif
/* Define if this is Unixish platform */ /* Define if this is Unixish platform */
#define LLVM_ON_UNIX 1 #define LLVM_ON_UNIX 1
......
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