Subzero: Use "auto" per (unwritten) auto coding style.

src/IceCfg.cpp

@@ -63,7 +63,7 @@ void Cfg::setError(const IceString &Message) {
 
 CfgNode *Cfg::makeNode() {
   SizeT LabelIndex = Nodes.size();
-  CfgNode *Node = CfgNode::create(this, LabelIndex);
+  auto *Node = CfgNode::create(this, LabelIndex);
   Nodes.push_back(Node);
   return Node;
 }
@@ -104,7 +104,7 @@ constexpr char BlockStatsGlobalPrefix[] = ".L$profiler$block_info$";
 
 VariableDeclaration *nodeNameDeclaration(GlobalContext *Ctx,
                                          const IceString &NodeAsmName) {
-  VariableDeclaration *Var = VariableDeclaration::create(Ctx);
+  auto *Var = VariableDeclaration::create(Ctx);
   Var->setName(BlockNameGlobalPrefix + NodeAsmName);
   Var->setIsConstant(true);
   Var->addInitializer(VariableDeclaration::DataInitializer::create(
@@ -117,7 +117,7 @@ VariableDeclaration *nodeNameDeclaration(GlobalContext *Ctx,
 VariableDeclaration *
 blockProfilingInfoDeclaration(GlobalContext *Ctx, const IceString &NodeAsmName,
                               VariableDeclaration *NodeNameDeclaration) {
-  VariableDeclaration *Var = VariableDeclaration::create(Ctx);
+  auto *Var = VariableDeclaration::create(Ctx);
   Var->setName(BlockStatsGlobalPrefix + NodeAsmName);
   const SizeT Int64ByteSize = typeWidthInBytes(IceType_i64);
   Var->addInitializer(
@@ -526,7 +526,7 @@ void Cfg::sortAndCombineAllocas(CfgVector<Inst *> &Allocas,
       auto *Alloca = llvm::cast<InstAlloca>(Allocas[i]);
       // Emit a fake definition of the rematerializable variable.
       Variable *Dest = Alloca->getDest();
-      InstFakeDef *Def = InstFakeDef::create(this, Dest);
+      auto *Def = InstFakeDef::create(this, Dest);
       if (BaseVariableType == BVT_StackPointer)
         Dest->setRematerializable(getTarget()->getStackReg(), Offsets[i]);
       else

src/IceCfg.h

@@ -132,7 +132,7 @@ public:
   // makeSpillVariable, and makeStackVariable.
   template <typename T = Variable> T *makeVariable(Type Ty) {
     SizeT Index = Variables.size();
-    T *Var = T::create(this, Ty, Index);
+    auto *Var = T::create(this, Ty, Index);
     Variables.push_back(Var);
     return Var;
   }

src/IceCfgNode.cpp

@@ -41,7 +41,7 @@ IceString CfgNode::getName() const {
 // Validates that all Phis are added before all regular instructions.
 void CfgNode::appendInst(Inst *Inst) {
   ++InstCountEstimate;
-  if (InstPhi *Phi = llvm::dyn_cast<InstPhi>(Inst)) {
+  if (auto *Phi = llvm::dyn_cast<InstPhi>(Inst)) {
     if (!Insts.empty()) {
       Func->setError("Phi instruction added to the middle of a block");
       return;
@@ -204,7 +204,7 @@ void CfgNode::placePhiStores() {
   // the previous instruction is a compare instruction, then we move the
   // insertion point before the compare instruction so as not to interfere with
   // compare/branch fusing.
-  if (InstBr *Branch = llvm::dyn_cast<InstBr>(InsertionPoint)) {
+  if (auto *Branch = llvm::dyn_cast<InstBr>(InsertionPoint)) {
     if (!Branch->isUnconditional()) {
       if (InsertionPoint != Insts.begin()) {
         --InsertionPoint;
@@ -227,7 +227,7 @@ void CfgNode::placePhiStores() {
       assert(Operand);
       Variable *Dest = I.getDest();
       assert(Dest);
-      InstAssign *NewInst = InstAssign::create(Func, Dest, Operand);
+      auto *NewInst = InstAssign::create(Func, Dest, Operand);
       if (CmpInstDest == Operand)
         Insts.insert(SafeInsertionPoint, NewInst);
       else
@@ -1001,7 +1001,7 @@ void updateStats(Cfg *Func, const Inst *I) {
         Func->getContext()->statsUpdateFills();
     }
     for (SizeT S = 0; S < I->getSrcSize(); ++S) {
-      if (Variable *Src = llvm::dyn_cast<Variable>(I->getSrc(S))) {
+      if (auto *Src = llvm::dyn_cast<Variable>(I->getSrc(S))) {
         if (!Src->hasReg())
           Func->getContext()->statsUpdateSpills();
       }
@@ -1404,7 +1404,7 @@ void CfgNode::profileExecutionCount(VariableDeclaration *Var) {
   Constant *OrderAcquireRelease =
       Context->getConstantInt32(Intrinsics::MemoryOrderAcquireRelease);
 
-  InstIntrinsicCall *Inst = InstIntrinsicCall::create(
+  auto *Inst = InstIntrinsicCall::create(
       Func, 5, Func->makeVariable(IceType_i64), RMWI64Name, Info->Info);
   Inst->addArg(AtomicRMWOp);
   Inst->addArg(Counter);

src/IceConverter.cpp

@@ -706,7 +706,7 @@ LLVM2ICEGlobalsConverter::convertGlobalsToIce(Module *Mod) {
     const GlobalVariable *GV = I;
 
     Ice::GlobalDeclaration *Var = getConverter().getGlobalDeclaration(GV);
-    Ice::VariableDeclaration *VarDecl = cast<Ice::VariableDeclaration>(Var);
+    auto *VarDecl = cast<Ice::VariableDeclaration>(Var);
     VariableDeclarations->push_back(VarDecl);
 
     if (!GV->hasInternalLinkage() && GV->hasInitializer()) {
@@ -864,7 +864,7 @@ void Converter::installGlobalDeclarations(Module *Mod) {
       Signature.appendArgType(
           Converter.convertToIceType(FuncType->getParamType(I)));
     }
-    FunctionDeclaration *IceFunc = FunctionDeclaration::create(
+    auto *IceFunc = FunctionDeclaration::create(
         Ctx, Signature, Func.getCallingConv(), Func.getLinkage(), Func.empty());
     IceFunc->setName(Func.getName());
     if (!IceFunc->verifyLinkageCorrect(Ctx)) {
@@ -883,7 +883,7 @@ void Converter::installGlobalDeclarations(Module *Mod) {
                                      E = Mod->global_end();
        I != E; ++I) {
     const GlobalVariable *GV = I;
-    VariableDeclaration *Var = VariableDeclaration::create(Ctx);
+    auto *Var = VariableDeclaration::create(Ctx);
     Var->setName(GV->getName());
     Var->setAlignment(GV->getAlignment());
     Var->setIsConstant(GV->isConstant());

src/IceGlobalContext.cpp

@@ -130,7 +130,7 @@ public:
     auto Iter = Pool.find(Key);
     if (Iter != Pool.end())
       return Iter->second;
-    ValueType *Result = ValueType::create(Ctx, Ty, Key);
+    auto *Result = ValueType::create(Ctx, Ty, Key);
     Pool[Key] = Result;
     return Result;
   }

src/IceInst.cpp

@@ -94,7 +94,7 @@ void Inst::deleteIfDead() {
 bool Inst::isLastUse(const Operand *TestSrc) const {
   if (LiveRangesEnded == 0)
     return false; // early-exit optimization
-  if (const Variable *TestVar = llvm::dyn_cast<const Variable>(TestSrc)) {
+  if (auto *TestVar = llvm::dyn_cast<const Variable>(TestSrc)) {
     LREndedBits Mask = LiveRangesEnded;
     FOREACH_VAR_IN_INST(Var, *this) {
       if (Var == TestVar) {
@@ -366,7 +366,7 @@ void InstPhi::livenessPhiOperand(LivenessBV &Live, CfgNode *Target,
     return;
   for (SizeT I = 0; I < getSrcSize(); ++I) {
     if (Labels[I] == Target) {
-      if (Variable *Var = llvm::dyn_cast<Variable>(getSrc(I))) {
+      if (auto *Var = llvm::dyn_cast<Variable>(getSrc(I))) {
         SizeT SrcIndex = Liveness->getLiveIndex(Var->getIndex());
         if (!Live[SrcIndex]) {
           setLastUse(I);

src/IceInstARM32.cpp

@@ -396,7 +396,7 @@ OperandARM32FlexReg::OperandARM32FlexReg(Cfg *Func, Type Ty, Variable *Reg,
     : OperandARM32Flex(kFlexReg, Ty), Reg(Reg), ShiftOp(ShiftOp),
       ShiftAmt(ShiftAmt) {
   NumVars = 1;
-  Variable *ShiftVar = llvm::dyn_cast_or_null<Variable>(ShiftAmt);
+  auto *ShiftVar = llvm::dyn_cast_or_null<Variable>(ShiftAmt);
   if (ShiftVar)
     ++NumVars;
   Vars = Func->allocateArrayOf<Variable *>(NumVars);
@@ -831,8 +831,8 @@ void InstARM32Mov::emitSingleDestMultiSource(const Cfg *Func) const {
     return;
   Ostream &Str = Func->getContext()->getStrEmit();
   Variable *Dest = getDest();
-  Variable *SrcLo = llvm::cast<Variable>(getSrc(0));
-  Variable *SrcHi = llvm::cast<Variable>(getSrc(1));
+  auto *SrcLo = llvm::cast<Variable>(getSrc(0));
+  auto *SrcHi = llvm::cast<Variable>(getSrc(1));
 
   assert(SrcHi->hasReg());
   assert(SrcLo->hasReg());
@@ -1207,7 +1207,7 @@ template <> void InstARM32Movw::emit(const Cfg *Func) const {
   Str << "\t" << Opcode << getPredicate() << "\t";
   getDest()->emit(Func);
   Str << ", ";
-  Constant *Src0 = llvm::cast<Constant>(getSrc(0));
+  auto *Src0 = llvm::cast<Constant>(getSrc(0));
   if (auto *CR = llvm::dyn_cast<ConstantRelocatable>(Src0)) {
     Str << "#:lower16:";
     CR->emitWithoutPrefix(Func->getTarget());
@@ -1230,7 +1230,7 @@ template <> void InstARM32Movt::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 2);
   Variable *Dest = getDest();
-  Constant *Src1 = llvm::cast<Constant>(getSrc(1));
+  auto *Src1 = llvm::cast<Constant>(getSrc(1));
   Str << "\t" << Opcode << getPredicate() << "\t";
   Dest->emit(Func);
   Str << ", ";
@@ -1406,7 +1406,7 @@ void InstARM32Push::emit(const Cfg *Func) const {
 
   Ostream &Str = Func->getContext()->getStrEmit();
 
-  Variable *Reg = llvm::cast<Variable>(getSrc(0));
+  auto *Reg = llvm::cast<Variable>(getSrc(0));
   if (isScalarIntegerType(Reg->getType())) {
     // GPR push.
     Str << "\t"
@@ -1427,7 +1427,7 @@ void InstARM32Push::emit(const Cfg *Func) const {
          "\t{";
   Reg->emit(Func);
   for (SizeT i = 1; i < SrcSize; ++i) {
-    Variable *NextReg = llvm::cast<Variable>(getSrc(i));
+    auto *NextReg = llvm::cast<Variable>(getSrc(i));
     if (isAssignedConsecutiveRegisters(Reg, NextReg)) {
       Str << ", ";
     } else {
@@ -1491,7 +1491,7 @@ void InstARM32Ret::emit(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
   assert(getSrcSize() > 0);
-  Variable *LR = llvm::cast<Variable>(getSrc(0));
+  auto *LR = llvm::cast<Variable>(getSrc(0));
   assert(LR->hasReg());
   assert(LR->getRegNum() == RegARM32::Reg_lr);
   Ostream &Str = Func->getContext()->getStrEmit();

src/IceInstMIPS32.cpp

@@ -134,7 +134,7 @@ void InstMIPS32Ret::emit(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
   assert(getSrcSize() > 0);
-  Variable *RA = llvm::cast<Variable>(getSrc(0));
+  auto *RA = llvm::cast<Variable>(getSrc(0));
   assert(RA->hasReg());
   assert(RA->getRegNum() == RegMIPS32::Reg_RA);
   Ostream &Str = Func->getContext()->getStrEmit();
@@ -226,8 +226,8 @@ void InstMIPS32Mov::emitSingleDestMultiSource(const Cfg *Func) const {
     return;
   Ostream &Str = Func->getContext()->getStrEmit();
   Variable *Dest = getDest();
-  Variable *SrcLo = llvm::cast<Variable>(getSrc(0));
-  Variable *SrcHi = llvm::cast<Variable>(getSrc(1));
+  auto *SrcLo = llvm::cast<Variable>(getSrc(0));
+  auto *SrcHi = llvm::cast<Variable>(getSrc(1));
 
   assert(SrcHi->hasReg());
   assert(SrcLo->hasReg());

src/IceOperand.cpp

@@ -329,7 +329,7 @@ void VariablesMetadata::addNode(CfgNode *Node) {
       Metadata[DestNum].markDef(Kind, &I, Node);
     }
     for (SizeT SrcNum = 0; SrcNum < I.getSrcSize(); ++SrcNum) {
-      if (const Variable *Var = llvm::dyn_cast<Variable>(I.getSrc(SrcNum))) {
+      if (auto *Var = llvm::dyn_cast<Variable>(I.getSrc(SrcNum))) {
         SizeT VarNum = Var->getIndex();
         assert(VarNum < Metadata.size());
         constexpr bool IsImplicit = false;

src/IcePhiLoweringImpl.h

@@ -37,10 +37,10 @@ void prelowerPhis32Bit(TargetT *Target, CfgNode *Node, Cfg *Func) {
       continue;
     Variable *Dest = Phi->getDest();
     if (Dest->getType() == IceType_i64) {
-      Variable *DestLo = llvm::cast<Variable>(Target->loOperand(Dest));
-      Variable *DestHi = llvm::cast<Variable>(Target->hiOperand(Dest));
-      InstPhi *PhiLo = InstPhi::create(Func, Phi->getSrcSize(), DestLo);
-      InstPhi *PhiHi = InstPhi::create(Func, Phi->getSrcSize(), DestHi);
+      auto *DestLo = llvm::cast<Variable>(Target->loOperand(Dest));
+      auto *DestHi = llvm::cast<Variable>(Target->hiOperand(Dest));
+      auto *PhiLo = InstPhi::create(Func, Phi->getSrcSize(), DestLo);
+      auto *PhiHi = InstPhi::create(Func, Phi->getSrcSize(), DestHi);
       for (SizeT I = 0; I < Phi->getSrcSize(); ++I) {
         Operand *Src = Phi->getSrc(I);
         CfgNode *Label = Phi->getLabel(I);

src/IceTargetLowering.cpp

@@ -224,7 +224,7 @@ void TargetLowering::lower() {
       lowerInsertElement(llvm::cast<InstInsertElement>(Inst));
       break;
     case Inst::IntrinsicCall: {
-      InstIntrinsicCall *Call = llvm::cast<InstIntrinsicCall>(Inst);
+      auto *Call = llvm::cast<InstIntrinsicCall>(Inst);
       if (Call->getIntrinsicInfo().ReturnsTwice)
         setCallsReturnsTwice(true);
       lowerIntrinsicCall(Call);

src/IceTargetLoweringARM32.cpp

@@ -762,7 +762,7 @@ uint32_t TargetARM32::getStackAlignment() const {
 }
 
 bool TargetARM32::doBranchOpt(Inst *I, const CfgNode *NextNode) {
-  if (InstARM32Br *Br = llvm::dyn_cast<InstARM32Br>(I)) {
+  if (auto *Br = llvm::dyn_cast<InstARM32Br>(I)) {
     return Br->optimizeBranch(NextNode);
   }
   return false;
@@ -1943,7 +1943,7 @@ void TargetARM32::div0Check(Type Ty, Operand *SrcLo, Operand *SrcHi) {
     Context.insert(InstFakeUse::create(Func, T));
   }
   }
-  InstARM32Label *Label = InstARM32Label::create(Func, this);
+  auto *Label = InstARM32Label::create(Func, this);
   _br(Label, CondARM32::NE);
   _trap();
   Context.insert(Label);
@@ -2213,8 +2213,8 @@ void TargetARM32::lowerInt64Arithmetic(InstArithmetic::OpKind Op,
   assert(SrcsLo.swappedOperands() == SrcsHi.swappedOperands());
   assert(SrcsLo.hasConstOperand() == SrcsHi.hasConstOperand());
 
-  Variable *DestLo = llvm::cast<Variable>(loOperand(Dest));
-  Variable *DestHi = llvm::cast<Variable>(hiOperand(Dest));
+  auto *DestLo = llvm::cast<Variable>(loOperand(Dest));
+  auto *DestHi = llvm::cast<Variable>(hiOperand(Dest));
   Variable *T_Lo = makeReg(DestLo->getType());
   Variable *T_Hi = makeReg(DestHi->getType());
 
@@ -3436,8 +3436,8 @@ void TargetARM32::lowerCast(const InstCast *Inst) {
     } else if (Dest->getType() == IceType_i64) {
       // t1=sxtb src; t2= mov t1 asr #31; dst.lo=t1; dst.hi=t2
       Constant *ShiftAmt = Ctx->getConstantInt32(31);
-      Variable *DestLo = llvm::cast<Variable>(loOperand(Dest));
-      Variable *DestHi = llvm::cast<Variable>(hiOperand(Dest));
+      auto *DestLo = llvm::cast<Variable>(loOperand(Dest));
+      auto *DestHi = llvm::cast<Variable>(hiOperand(Dest));
       Variable *T_Lo = makeReg(DestLo->getType());
       if (Src0->getType() == IceType_i32) {
         Operand *Src0RF = legalize(Src0, Legal_Reg | Legal_Flex);
@@ -3485,8 +3485,8 @@ void TargetARM32::lowerCast(const InstCast *Inst) {
       // t1=uxtb src; dst.lo=t1; dst.hi=0
       Operand *_0 =
           legalize(Ctx->getConstantZero(IceType_i32), Legal_Reg | Legal_Flex);
-      Variable *DestLo = llvm::cast<Variable>(loOperand(Dest));
-      Variable *DestHi = llvm::cast<Variable>(hiOperand(Dest));
+      auto *DestLo = llvm::cast<Variable>(loOperand(Dest));
+      auto *DestHi = llvm::cast<Variable>(hiOperand(Dest));
       Variable *T_Lo = makeReg(DestLo->getType());
 
       switch (Src0->getType()) {
@@ -3654,7 +3654,7 @@ void TargetARM32::lowerCast(const InstCast *Inst) {
   case InstCast::Bitcast: {
     Operand *Src0 = Inst->getSrc(0);
     if (Dest->getType() == Src0->getType()) {
-      InstAssign *Assign = InstAssign::create(Func, Dest, Src0);
+      auto *Assign = InstAssign::create(Func, Dest, Src0);
       lowerAssign(Assign);
       return;
     }
@@ -4028,8 +4028,8 @@ TargetARM32::lowerInt8AndInt16IcmpCond(InstIcmp::ICond Condition, Operand *Src0,
     _lsl(Src0R, legalizeToReg(Src0), ShAmtImm);
 
     Variable *Src1R = legalizeToReg(Src1);
-    OperandARM32FlexReg *Src1F = OperandARM32FlexReg::create(
-        Func, IceType_i32, Src1R, OperandARM32::LSL, ShAmtImm);
+    auto *Src1F = OperandARM32FlexReg::create(Func, IceType_i32, Src1R,
+                                              OperandARM32::LSL, ShAmtImm);
     _cmp(Src0R, Src1F);
     return CondWhenTrue(getIcmp32Mapping(Condition));
   }
@@ -4176,7 +4176,7 @@ void TargetARM32::lowerAtomicRMW(Variable *Dest, uint32_t Operation,
   Variable *TmpHiReg;
   Variable *TmpLoReg;
   Operand *_0 = Ctx->getConstantZero(IceType_i32);
-  InstARM32Label *Retry = InstARM32Label::create(Func, this);
+  auto *Retry = InstARM32Label::create(Func, this);
 
   if (DestTy == IceType_i64) {
     Variable64On32 *PtrContentsReg64 = makeI64RegPair();
@@ -4316,7 +4316,7 @@ void TargetARM32::postambleCtpop64(const InstCall *Instr) {
   // signature matches some 64-bit platform's native instructions and expect to
   // fill a 64-bit reg. Thus, clear the upper bits of the dest just in case the
   // user doesn't do that in the IR or doesn't toss the bits via truncate.
-  Variable *DestHi = llvm::cast<Variable>(hiOperand(Instr->getDest()));
+  auto *DestHi = llvm::cast<Variable>(hiOperand(Instr->getDest()));
   Variable *T = makeReg(IceType_i32);
   Operand *_0 =
       legalize(Ctx->getConstantZero(IceType_i32), Legal_Reg | Legal_Flex);
@@ -4418,7 +4418,7 @@ void TargetARM32::lowerIntrinsicCall(const InstIntrinsicCall *Instr) {
       Variable *Success = makeReg(IceType_i32);
       OperandARM32Mem *Mem;
       Operand *_0 = Ctx->getConstantZero(IceType_i32);
-      InstARM32Label *Retry = InstARM32Label::create(Func, this);
+      auto *Retry = InstARM32Label::create(Func, this);
       Variable64On32 *NewReg = makeI64RegPair();
       ValueVar->initHiLo(Func);
       ValueVar->mustNotHaveReg();
@@ -4509,7 +4509,7 @@ void TargetARM32::lowerIntrinsicCall(const InstIntrinsicCall *Instr) {
     Variable *New, *NewReg;
     Variable *Success = makeReg(IceType_i32);
     Operand *_0 = Ctx->getConstantZero(IceType_i32);
-    InstARM32Label *Retry = InstARM32Label::create(Func, this);
+    auto *Retry = InstARM32Label::create(Func, this);
 
     if (DestTy == IceType_i64) {
       Variable64On32 *TmpReg64 = makeI64RegPair();
@@ -4620,8 +4620,8 @@ void TargetARM32::lowerIntrinsicCall(const InstIntrinsicCall *Instr) {
       Variable *Val_Hi = legalizeToReg(hiOperand(Val));
       Variable *T_Lo = makeReg(IceType_i32);
       Variable *T_Hi = makeReg(IceType_i32);
-      Variable *DestLo = llvm::cast<Variable>(loOperand(Dest));
-      Variable *DestHi = llvm::cast<Variable>(hiOperand(Dest));
+      auto *DestLo = llvm::cast<Variable>(loOperand(Dest));
+      auto *DestHi = llvm::cast<Variable>(hiOperand(Dest));
       _rev(T_Lo, Val_Lo);
       _rev(T_Hi, Val_Hi);
       _mov(DestLo, T_Hi);
@@ -4754,8 +4754,8 @@ void TargetARM32::lowerCLZ(Variable *Dest, Variable *ValLoR, Variable *ValHiR) {
   Variable *T = makeReg(IceType_i32);
   _clz(T, ValLoR);
   if (Ty == IceType_i64) {
-    Variable *DestLo = llvm::cast<Variable>(loOperand(Dest));
-    Variable *DestHi = llvm::cast<Variable>(hiOperand(Dest));
+    auto *DestLo = llvm::cast<Variable>(loOperand(Dest));
+    auto *DestHi = llvm::cast<Variable>(hiOperand(Dest));
     Operand *Zero =
         legalize(Ctx->getConstantZero(IceType_i32), Legal_Reg | Legal_Flex);
     Operand *ThirtyTwo =
@@ -4787,7 +4787,7 @@ void TargetARM32::lowerLoad(const InstLoad *Load) {
 
   // TODO(jvoung): handled folding opportunities. Sign and zero extension can
   // be folded into a load.
-  InstAssign *Assign = InstAssign::create(Func, DestLoad, Src0);
+  auto *Assign = InstAssign::create(Func, DestLoad, Src0);
   lowerAssign(Assign);
 }
 
@@ -5624,7 +5624,7 @@ Operand *TargetARM32::legalizeUndef(Operand *From, int32_t RegNum) {
 }
 
 OperandARM32Mem *TargetARM32::formMemoryOperand(Operand *Operand, Type Ty) {
-  OperandARM32Mem *Mem = llvm::dyn_cast<OperandARM32Mem>(Operand);
+  auto *Mem = llvm::dyn_cast<OperandARM32Mem>(Operand);
   // It may be the case that address mode optimization already creates an
   // OperandARM32Mem, so in that case it wouldn't need another level of
   // transformation.
@@ -5634,7 +5634,7 @@ OperandARM32Mem *TargetARM32::formMemoryOperand(Operand *Operand, Type Ty) {
   // If we didn't do address mode optimization, then we only have a
   // base/offset to work with. ARM always requires a base register, so
   // just use that to hold the operand.
-  Variable *Base = llvm::cast<Variable>(
+  auto *Base = llvm::cast<Variable>(
       legalize(Operand, Legal_Reg | Legal_Rematerializable));
   return OperandARM32Mem::create(
       Func, Ty, Base,

src/IceTargetLoweringMIPS32.cpp

@@ -531,8 +531,8 @@ void TargetMIPS32::lowerArithmetic(const InstArithmetic *Inst) {
   Operand *Src1 = legalizeUndef(Inst->getSrc(1));
   if (Dest->getType() == IceType_i64) {
     // TODO(reed kotler): fakedef needed for now until all cases are implemented
-    Variable *DestLo = llvm::cast<Variable>(loOperand(Dest));
-    Variable *DestHi = llvm::cast<Variable>(hiOperand(Dest));
+    auto *DestLo = llvm::cast<Variable>(loOperand(Dest));
+    auto *DestHi = llvm::cast<Variable>(hiOperand(Dest));
     Context.insert(InstFakeDef::create(Func, DestLo));
     Context.insert(InstFakeDef::create(Func, DestHi));
     UnimplementedError(Func->getContext()->getFlags());
@@ -616,8 +616,8 @@ void TargetMIPS32::lowerAssign(const InstAssign *Inst) {
     Src0 = legalizeUndef(Src0);
     Operand *Src0Lo = legalize(loOperand(Src0), Legal_Reg);
     Operand *Src0Hi = legalize(hiOperand(Src0), Legal_Reg);
-    Variable *DestLo = llvm::cast<Variable>(loOperand(Dest));
-    Variable *DestHi = llvm::cast<Variable>(hiOperand(Dest));
+    auto *DestLo = llvm::cast<Variable>(loOperand(Dest));
+    auto *DestHi = llvm::cast<Variable>(hiOperand(Dest));
     // Variable *T_Lo = nullptr, *T_Hi = nullptr;
     Variable *T_Lo = makeReg(IceType_i32);
     Variable *T_Hi = makeReg(IceType_i32);

src/IceTargetLoweringX8632.cpp

@@ -675,7 +675,7 @@ void TargetX8632::addEpilog(CfgNode *Node) {
   _pop(T_ecx);
   lowerIndirectJump(T_ecx);
   if (RI->getSrcSize()) {
-    Variable *RetValue = llvm::cast<Variable>(RI->getSrc(0));
+    auto *RetValue = llvm::cast<Variable>(RI->getSrc(0));
     Context.insert(InstFakeUse::create(Func, RetValue));
   }
   RI->setDeleted();
@@ -797,7 +797,7 @@ void TargetDataX8632::emitConstantPool(GlobalContext *Ctx) {
   for (Constant *C : Pool) {
     if (!C->getShouldBePooled())
       continue;
-    typename T::IceType *Const = llvm::cast<typename T::IceType>(C);
+    auto *Const = llvm::cast<typename T::IceType>(C);
     typename T::IceType::PrimType Value = Const->getValue();
     // Use memcpy() to copy bits from Value into RawValue in a way that avoids
     // breaking strict-aliasing rules.

src/IceTargetLoweringX8664.cpp

@@ -783,7 +783,7 @@ void TargetDataX8664::emitConstantPool(GlobalContext *Ctx) {
   for (Constant *C : Pool) {
     if (!C->getShouldBePooled())
       continue;
-    typename T::IceType *Const = llvm::cast<typename T::IceType>(C);
+    auto *Const = llvm::cast<typename T::IceType>(C);
     typename T::IceType::PrimType Value = Const->getValue();
     // Use memcpy() to copy bits from Value into RawValue in a way that avoids
     // breaking strict-aliasing rules.

src/PNaClTranslator.cpp

@@ -984,7 +984,7 @@ void TypesParser::ProcessRecord() {
       Error("Function type can't define varargs");
     ExtendedType *Ty = Context->getTypeByIDForDefining(NextTypeId++);
     Ty->setAsFunctionType();
-    FuncSigExtendedType *FuncTy = cast<FuncSigExtendedType>(Ty);
+    auto *FuncTy = cast<FuncSigExtendedType>(Ty);
     FuncTy->setReturnType(Context->getSimpleTypeByID(Values[1]));
     for (size_t i = 2, e = Values.size(); i != e; ++i) {
       // Check that type void not used as argument type. Note: PNaCl
@@ -1530,7 +1530,7 @@ private:
     if (LocalIndex < LocalOperands.size()) {
       Ice::Operand *Op = LocalOperands[LocalIndex];
       if (Op != nullptr) {
-        if (Ice::Variable *Var = dyn_cast<Ice::Variable>(Op)) {
+        if (auto *Var = dyn_cast<Ice::Variable>(Op)) {
           if (Var->getType() == Ty) {
             ++NextLocalInstIndex;
             return Var;
@@ -3070,7 +3070,7 @@ void FunctionValuesymtabParser::setValueName(NaClBcIndexSize_t Index,
   if (isIRGenerationDisabled())
     return;
   Ice::Operand *Op = getFunctionParser()->getOperand(Index);
-  if (Ice::Variable *V = dyn_cast<Ice::Variable>(Op)) {
+  if (auto *V = dyn_cast<Ice::Variable>(Op)) {
     if (Ice::BuildDefs::dump()) {
       std::string Nm(Name.data(), Name.size());
       V->setName(getFunctionParser()->getFunc(), Nm);
@@ -3266,7 +3266,7 @@ void ModuleParser::ProcessRecord() {
       return;
     }
     bool IsProto = Values[2] == 1;
-    Ice::FunctionDeclaration *Func = Ice::FunctionDeclaration::create(
+    auto *Func = Ice::FunctionDeclaration::create(
         Context->getTranslator().getContext(), Signature, CallingConv, Linkage,
         IsProto);
     Context->setNextFunctionID(Func);