Commit 561e9d62 by Adam Kallai Committed by Alexis Hétu

ExecutionEngine: add preliminary support for COFF ARM64

It was originally committed into LLVM: https://reviews.llvm.org/D69434 This CL aims to continue the work on Swiftshader for Windows on ARM64. Bug: chromium:893460 Change-Id: Ib0de220c1d332f2a16d2275a5f3aef4d1a53ee33 Reviewed-on: https://swiftshader-review.googlesource.com/c/SwiftShader/+/38453Reviewed-by: 's avatarAlexis Hétu <sugoi@google.com> Tested-by: 's avatarAlexis Hétu <sugoi@google.com> Kokoro-Presubmit: kokoro <noreply+kokoro@google.com>
parent afc52b0b
...@@ -12,6 +12,7 @@ ...@@ -12,6 +12,7 @@
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
#include "RuntimeDyldCOFF.h" #include "RuntimeDyldCOFF.h"
#include "Targets/RuntimeDyldCOFFAArch64.h"
#include "Targets/RuntimeDyldCOFFI386.h" #include "Targets/RuntimeDyldCOFFI386.h"
#include "Targets/RuntimeDyldCOFFThumb.h" #include "Targets/RuntimeDyldCOFFThumb.h"
#include "Targets/RuntimeDyldCOFFX86_64.h" #include "Targets/RuntimeDyldCOFFX86_64.h"
...@@ -56,6 +57,8 @@ llvm::RuntimeDyldCOFF::create(Triple::ArchType Arch, ...@@ -56,6 +57,8 @@ llvm::RuntimeDyldCOFF::create(Triple::ArchType Arch,
return make_unique<RuntimeDyldCOFFThumb>(MemMgr, Resolver); return make_unique<RuntimeDyldCOFFThumb>(MemMgr, Resolver);
case Triple::x86_64: case Triple::x86_64:
return make_unique<RuntimeDyldCOFFX86_64>(MemMgr, Resolver); return make_unique<RuntimeDyldCOFFX86_64>(MemMgr, Resolver);
case Triple::aarch64:
return make_unique<RuntimeDyldCOFFAArch64>(MemMgr, Resolver);
} }
} }
......
...@@ -223,7 +223,10 @@ static CodeModel::Model getEffectiveCodeModel(const Triple &TT, ...@@ -223,7 +223,10 @@ static CodeModel::Model getEffectiveCodeModel(const Triple &TT,
// The default MCJIT memory managers make no guarantees about where they can // The default MCJIT memory managers make no guarantees about where they can
// find an executable page; JITed code needs to be able to refer to globals // find an executable page; JITed code needs to be able to refer to globals
// no matter how far away they are. // no matter how far away they are.
if (JIT) // We should set the CodeModel::Small for Windows ARM64 in JIT mode,
// since with large code model LLVM generating 4 MOV instructions, and
// Windows doesn't support relocating these long branch (4 MOVs).
if (JIT && !TT.isOSWindows())
return CodeModel::Large; return CodeModel::Large;
return CodeModel::Small; return CodeModel::Small;
} }
......
// RUN: llvm-mc -triple aarch64-windows -filetype obj -o %t.obj %s
// RUN: llvm-rtdyld -triple aarch64-windows -dummy-extern dummy=0x79563413 -dummy-extern dummyA=0x78566879 -target-addr-start=40960000000000 -verify -check %s %t.obj
.text
.def _bnamed
.scl 2
.type 32
.endef
.globl _bnamed
.align 2
_bnamed:
ret
.def _foo
.scl 2
.type 32
.endef
.globl _foo
.align 2
_foo:
movz w0, #0
ret
.globl _test_adr_relocation
.align 2
# IMAGE_REL_ARM64_REL21
# rtdyld-check: decode_operand(adr1, 1) = (_const[20:0] - adr1[20:0])
_test_adr_relocation:
adr1:
adr x0, _const
ret
.globl _test_branch26_reloc
.align 2
# IMAGE_REL_ARM64_BRANCH26, test long branch
# rtdyld-check: decode_operand(brel, 0)[25:0] = (stub_addr(COFF_AArch64.s.tmp.obj/.text, dummy) - brel)[27:2]
_test_branch26_reloc:
brel:
b dummy
ret
.globl _test_branch19_reloc
.align 2
# IMAGE_REL_ARM64_BRANCH19
# rtdyld-check: decode_operand(bcond, 1)[18:0] = (_foo - bcond)[20:2]
_test_branch19_reloc:
mov x0, #3
cmp x0, #2
bcond:
bne _foo
ret
.globl _test_branch14_reloc
.align 2
# IMAGE_REL_ARM64_BRANCH14
# rtdyld-check: decode_operand(tbz_branch, 2)[13:0] = (_bnamed - tbz_branch)[15:2]
_test_branch14_reloc:
mov x1, #0
tbz_branch:
tbz x1, #0, _bnamed
ret
.globl _test_adrp_ldr_reloc
.align 2
# IMAGE_REL_ARM64_PAGEBASE_REL21
# rtdyld-check: decode_operand(adrp1, 1) = (_const[32:12] - adrp1[32:12])
_test_adrp_ldr_reloc:
adrp1:
adrp x0, _const
# IMAGE_REL_ARM64_PAGEOFFSET_12L
# rtdyld-check: decode_operand(ldr1, 2) = _const[11:3]
ldr1:
ldr x0, [x0, #:lo12:_const]
ret
.globl _test_add_reloc
.align 2
# IMAGE_REL_ARM64_PAGEOFFSET_12A
# rtdyld-check: decode_operand(add1, 2) = (tgt+4)[11:0]
_test_add_reloc:
add1:
add x0, x0, tgt@PAGEOFF+4
ret
.section .data
.globl _test_addr64_reloc
.align 2
# IMAGE_REL_ARM64_ADDR64
# rtdyld-check: *{8}addr64 = tgt+4
_test_addr64_reloc:
addr64:
.quad tgt+4
# IMAGE_REL_ARM64_ADDR32
# rtdyld-check: *{4}_test_addr32_reloc = 0x78566879
_test_addr32_reloc:
.long dummyA
.globl _relocations
.align 2
# IMAGE_REL_ARM64_ADDR32NB, RVA of the target
# rtdyld-check: *{4}_relocations = _foo - 40960000000000
_relocations:
.long _foo@IMGREL
# IMAGE_REL_ARM64_ADDR32NB
# rtdyld-check: *{4}imgrel2 = _string - 40960000000000+5
imgrel2:
.long _string@IMGREL+5
# IMAGE_REL_ARM64_SECTION
# rtdyld-check: *{2}secindex = 1
secindex:
.secidx _test_addr32_reloc
# IMAGE_REL_ARM64_SECREL
# rtdyld-check: *{4}secrel = string - section_addr(COFF_AArch64.s.tmp.obj, .data)
secrel:
.secrel32 string
.globl _const
.align 3
_const:
.quad 4614256650576692846
tgt:
.word 1
.word 2
.word 3
.word 4
.word 5
.globl string
.align 2
string:
.asciz "Hello World\n"
.section .rdata,"dr"
.globl _string
.align 2
_string:
.asciz "Hello World\n"
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