Subzero. Enable Atomics in ARM.

Makefile.standalone

@@ -383,7 +383,6 @@ check-xtest: $(OBJDIR)/pnacl-sz make_symlink runtime
 	  -e x8664,native,sse4.1,test_vector_ops \
 	  -e x8664,native,sse2,test_global \
 	  -i arm32,native,neon \
-	  -e arm32,native,neon,test_sync_atomic \
 	  -e arm32,native,neon,test_vector_ops \
 	  -e arm32,native,neon,test_select
 	PNACL_BIN_PATH=$(PNACL_BIN_PATH) \

crosstest/test_sync_atomic_main.cpp

@@ -92,7 +92,8 @@ void testAtomicRMW(volatile Type *AtomicLoc, size_t &TotalTests, size_t &Passes,
           } else {
             ++Failures;
             std::cout << "test_" << Funcs[f].Name << (CHAR_BIT * sizeof(Type))
-                      << "(" << static_cast<uint64>(Value1) << ", "
+                      << "(" << fetch_first << ", "
+                      << static_cast<uint64>(Value1) << ", "
                       << static_cast<uint64>(Value2)
                       << "): sz1=" << static_cast<uint64>(ResultSz1)
                       << " llc1=" << static_cast<uint64>(ResultLlc1)
@@ -139,7 +140,7 @@ void testValCompareAndSwap(volatile Type *AtomicLoc, size_t &TotalTests,
             ++Failures;
             std::cout << "test_" << Funcs[f].Name << (CHAR_BIT * sizeof(Type))
                       << "(" << static_cast<uint64>(Value1) << ", "
-                      << static_cast<uint64>(Value2)
+                      << static_cast<uint64>(Value2) << ", flip=" << flip
                       << "): sz1=" << static_cast<uint64>(ResultSz1)
                       << " llc1=" << static_cast<uint64>(ResultLlc1)
                       << " sz2=" << static_cast<uint64>(ResultSz2)
@@ -159,7 +160,15 @@ template <typename Type> struct ThreadData {
 };
 
 template <typename Type> void *threadWrapper(void *Data) {
-  const size_t NumReps = 8000;
+#ifdef ARM32
+  // Given that most of times these crosstests for ARM are run under qemu, we
+  // set a lower NumReps to allow crosstests to complete within a reasonable
+  // amount of time.
+  static const size_t NumReps = 1000;
+#else  // ARM32
+  static const size_t NumReps = 8000;
+#endif // ARM32
+
   ThreadData<Type> *TData = reinterpret_cast<ThreadData<Type> *>(Data);
   for (size_t i = 0; i < NumReps; ++i) {
     (void)TData->FuncPtr(TData->Fetch, TData->Ptr, TData->Adjustment);

src/IceTargetLoweringARM32.h

@@ -131,6 +131,8 @@ protected:
   void lowerExtractElement(const InstExtractElement *Inst) override;
   void lowerFcmp(const InstFcmp *Inst) override;
   void lowerIcmp(const InstIcmp *Inst) override;
+  void lowerAtomicRMW(Variable *Dest, uint32_t Operation, Operand *Ptr,
+                      Operand *Val);
   void lowerIntrinsicCall(const InstIntrinsicCall *Inst) override;
   void lowerInsertElement(const InstInsertElement *Inst) override;
   void lowerLoad(const InstLoad *Inst) override;
@@ -160,6 +162,7 @@ protected:
   Variable *legalizeToReg(Operand *From, int32_t RegNum = Variable::NoRegister);
   OperandARM32Mem *formMemoryOperand(Operand *Ptr, Type Ty);
 
+  Variable64On32 *makeI64RegPair();
   Variable *makeReg(Type Ty, int32_t RegNum = Variable::NoRegister);
   static Type stackSlotType();
   Variable *copyToReg(Operand *Src, int32_t RegNum = Variable::NoRegister);
@@ -299,6 +302,7 @@ protected:
       Context.insert(InstFakeDef::create(Func, Instr->getDestHi()));
     }
   }
+
   void _mov_redefined(Variable *Dest, Operand *Src0,
                       CondARM32::Cond Pred = CondARM32::AL) {
     auto *Instr = InstARM32Mov::create(Func, Dest, Src0, Pred);
@@ -385,11 +389,17 @@ protected:
   }
   void _strex(Variable *Dest, Variable *Value, OperandARM32Mem *Addr,
               CondARM32::Cond Pred = CondARM32::AL) {
+    // strex requires Dest to be a register other than Value or Addr. This
+    // restriction is cleanly represented by adding an "early" definition of
+    // Dest (or a latter use of all the sources.)
+    Context.insert(InstFakeDef::create(Func, Dest));
     if (auto *Value64 = llvm::dyn_cast<Variable64On32>(Value)) {
       Context.insert(InstFakeUse::create(Func, Value64->getLo()));
       Context.insert(InstFakeUse::create(Func, Value64->getHi()));
     }
-    Context.insert(InstARM32Strex::create(Func, Dest, Value, Addr, Pred));
+    auto *Instr = InstARM32Strex::create(Func, Dest, Value, Addr, Pred);
+    Context.insert(Instr);
+    Instr->setDestRedefined();
   }
   void _sub(Variable *Dest, Variable *Src0, Operand *Src1,
             CondARM32::Cond Pred = CondARM32::AL) {