Commit 579b1b3a by Nicolas Capens Committed by Nicolas Capens

Generalize vector shuffling to accept any operand.

The arguments get legalized to Reg or Mem, so we can allow constants as well (including undef values). This change makes all instruction's source arguments Ice::Operands. BUG=swiftshader:24 Change-Id: I1659cdfdb1b8a12c4acc7c473211d8a67bfd5868 Reviewed-on: https://chromium-review.googlesource.com/418504Reviewed-by: 's avatarJim Stichnoth <stichnot@chromium.org>
parent a29da906
......@@ -583,8 +583,8 @@ InstFakeUse::InstFakeUse(Cfg *Func, Variable *Src, uint32_t Weight)
InstFakeKill::InstFakeKill(Cfg *Func, const Inst *Linked)
: InstHighLevel(Func, Inst::FakeKill, 0, nullptr), Linked(Linked) {}
InstShuffleVector::InstShuffleVector(Cfg *Func, Variable *Dest, Variable *Src0,
Variable *Src1)
InstShuffleVector::InstShuffleVector(Cfg *Func, Variable *Dest, Operand *Src0,
Operand *Src1)
: InstHighLevel(Func, Inst::ShuffleVector, 2, Dest),
NumIndexes(typeNumElements(Dest->getType())) {
addSource(Src0);
......
......@@ -979,8 +979,8 @@ class InstShuffleVector : public InstHighLevel {
InstShuffleVector &operator=(const InstShuffleVector &) = delete;
public:
static InstShuffleVector *create(Cfg *Func, Variable *Dest, Variable *Src0,
Variable *Src1) {
static InstShuffleVector *create(Cfg *Func, Variable *Dest, Operand *Src0,
Operand *Src1) {
return new (Func->allocate<InstShuffleVector>())
InstShuffleVector(Func, Dest, Src0, Src1);
}
......@@ -1035,7 +1035,7 @@ public:
}
private:
InstShuffleVector(Cfg *Func, Variable *Dest, Variable *Src0, Variable *Src1);
InstShuffleVector(Cfg *Func, Variable *Dest, Operand *Src0, Operand *Src1);
void destroy(Cfg *Func) override {
Func->deallocateArrayOf<ConstantInteger32 *>(Indexes);
......
......@@ -5842,8 +5842,8 @@ void TargetARM32::lowerShuffleVector(const InstShuffleVector *Instr) {
// Unoptimized shuffle. Perform a series of inserts and extracts.
Context.insert<InstFakeDef>(T);
auto *Src0 = llvm::cast<Variable>(Instr->getSrc(0));
auto *Src1 = llvm::cast<Variable>(Instr->getSrc(1));
auto *Src0 = Instr->getSrc(0);
auto *Src1 = Instr->getSrc(1);
const SizeT NumElements = typeNumElements(DestTy);
const Type ElementType = typeElementType(DestTy);
for (SizeT I = 0; I < Instr->getNumIndexes(); ++I) {
......
......@@ -1159,18 +1159,18 @@ private:
/// Helpers for lowering ShuffleVector
/// @{
Variable *lowerShuffleVector_AllFromSameSrc(Variable *Src, SizeT Index0,
Variable *lowerShuffleVector_AllFromSameSrc(Operand *Src, SizeT Index0,
SizeT Index1, SizeT Index2,
SizeT Index3);
static constexpr SizeT IGNORE_INDEX = 0x80000000u;
Variable *lowerShuffleVector_TwoFromSameSrc(Variable *Src0, SizeT Index0,
SizeT Index1, Variable *Src1,
Variable *lowerShuffleVector_TwoFromSameSrc(Operand *Src0, SizeT Index0,
SizeT Index1, Operand *Src1,
SizeT Index2, SizeT Index3);
static constexpr SizeT UNIFIED_INDEX_0 = 0;
static constexpr SizeT UNIFIED_INDEX_1 = 2;
Variable *lowerShuffleVector_UnifyFromDifferentSrcs(Variable *Src0,
Variable *lowerShuffleVector_UnifyFromDifferentSrcs(Operand *Src0,
SizeT Index0,
Variable *Src1,
Operand *Src1,
SizeT Index1);
static constexpr SizeT CLEAR_ALL_BITS = 0x80;
SizeT PshufbMaskCount = 0;
......
......@@ -5993,7 +5993,7 @@ inline uint32_t makePshufdMask(SizeT Index0, SizeT Index1, SizeT Index2,
template <typename TraitsType>
Variable *TargetX86Base<TraitsType>::lowerShuffleVector_AllFromSameSrc(
Variable *Src, SizeT Index0, SizeT Index1, SizeT Index2, SizeT Index3) {
Operand *Src, SizeT Index0, SizeT Index1, SizeT Index2, SizeT Index3) {
constexpr SizeT SrcBit = 1 << 2;
assert((Index0 & SrcBit) == (Index1 & SrcBit));
assert((Index0 & SrcBit) == (Index2 & SrcBit));
......@@ -6011,7 +6011,7 @@ Variable *TargetX86Base<TraitsType>::lowerShuffleVector_AllFromSameSrc(
template <typename TraitsType>
Variable *TargetX86Base<TraitsType>::lowerShuffleVector_TwoFromSameSrc(
Variable *Src0, SizeT Index0, SizeT Index1, Variable *Src1, SizeT Index2,
Operand *Src0, SizeT Index0, SizeT Index1, Operand *Src1, SizeT Index2,
SizeT Index3) {
constexpr SizeT SrcBit = 1 << 2;
assert((Index0 & SrcBit) == (Index1 & SrcBit) || (Index1 == IGNORE_INDEX));
......@@ -6032,7 +6032,7 @@ Variable *TargetX86Base<TraitsType>::lowerShuffleVector_TwoFromSameSrc(
template <typename TraitsType>
Variable *TargetX86Base<TraitsType>::lowerShuffleVector_UnifyFromDifferentSrcs(
Variable *Src0, SizeT Index0, Variable *Src1, SizeT Index1) {
Operand *Src0, SizeT Index0, Operand *Src1, SizeT Index1) {
return lowerShuffleVector_TwoFromSameSrc(Src0, Index0, IGNORE_INDEX, Src1,
Index1, IGNORE_INDEX);
}
......@@ -6145,8 +6145,8 @@ void TargetX86Base<TraitsType>::lowerShuffleVector(
const InstShuffleVector *Instr) {
auto *Dest = Instr->getDest();
const Type DestTy = Dest->getType();
auto *Src0 = llvm::cast<Variable>(Instr->getSrc(0));
auto *Src1 = llvm::cast<Variable>(Instr->getSrc(1));
auto *Src0 = Instr->getSrc(0);
auto *Src1 = Instr->getSrc(1);
const SizeT NumElements = typeNumElements(DestTy);
auto *T = makeReg(DestTy);
......
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