Commit 5b5d562c by Alexis Hetu Committed by Alexis Hétu

Fixed uniform-default-values.html

Added the isSamplerRegister() function to bring back the previous validation whose removal was causing uniform-default-values.html to fail, but I added a comment to explain why this validation was necessary in the first place. BUG=18029434 Change-Id: I9dbbfdd31c45adffd5e14433b2ace3a1f79a1ff0 Reviewed-on: https://swiftshader-review.googlesource.com/1471Tested-by: 's avatarAlexis Hétu <sugoi@google.com> Reviewed-by: 's avatarNicolas Capens <nicolascapens@google.com>
parent 3533125c
...@@ -1265,9 +1265,19 @@ namespace sh ...@@ -1265,9 +1265,19 @@ namespace sh
return true; return true;
} }
bool OutputASM::isSamplerRegister(TIntermTyped *operand)
{
// A sampler register's qualifiers can be:
// - EvqUniform: The sampler uniform is used as is in the code (default case).
// - EvqTemporary: The sampler is indexed. It's still a sampler register.
// - EvqIn (and other similar types): The sampler has been passed as a function argument. At this point,
// the sampler has been copied and is no longer a sampler register.
return IsSampler(operand->getBasicType()) && (operand->getQualifier() == EvqUniform || operand->getQualifier() == EvqTemporary);
}
Instruction *OutputASM::emit(sw::Shader::Opcode op, TIntermTyped *dst, TIntermNode *src0, TIntermNode *src1, TIntermNode *src2, int index) Instruction *OutputASM::emit(sw::Shader::Opcode op, TIntermTyped *dst, TIntermNode *src0, TIntermNode *src1, TIntermNode *src2, int index)
{ {
if(dst && IsSampler(dst->getBasicType())) if(dst && isSamplerRegister(dst))
{ {
op = sw::Shader::OPCODE_NULL; // Can't assign to a sampler, but this is hit when indexing sampler arrays op = sw::Shader::OPCODE_NULL; // Can't assign to a sampler, but this is hit when indexing sampler arrays
} }
...@@ -1464,7 +1474,7 @@ namespace sh ...@@ -1464,7 +1474,7 @@ namespace sh
{ {
parameter.index = registerIndex(arg) + index; parameter.index = registerIndex(arg) + index;
if(IsSampler(arg->getBasicType())) if(isSamplerRegister(arg))
{ {
TIntermBinary *binary = argument->getAsBinaryNode(); TIntermBinary *binary = argument->getAsBinaryNode();
...@@ -1741,7 +1751,7 @@ namespace sh ...@@ -1741,7 +1751,7 @@ namespace sh
sw::Shader::ParameterType OutputASM::registerType(TIntermTyped *operand) sw::Shader::ParameterType OutputASM::registerType(TIntermTyped *operand)
{ {
if(IsSampler(operand->getBasicType())) if(isSamplerRegister(operand))
{ {
return sw::Shader::PARAMETER_SAMPLER; return sw::Shader::PARAMETER_SAMPLER;
} }
...@@ -1787,7 +1797,7 @@ namespace sh ...@@ -1787,7 +1797,7 @@ namespace sh
int OutputASM::registerIndex(TIntermTyped *operand) int OutputASM::registerIndex(TIntermTyped *operand)
{ {
if(IsSampler(operand->getBasicType())) if(isSamplerRegister(operand))
{ {
return samplerRegister(operand); return samplerRegister(operand);
} }
......
...@@ -143,6 +143,7 @@ namespace sh ...@@ -143,6 +143,7 @@ namespace sh
static int dim(TIntermNode *v); static int dim(TIntermNode *v);
static int dim2(TIntermNode *m); static int dim2(TIntermNode *m);
static unsigned int loopCount(TIntermLoop *node); static unsigned int loopCount(TIntermLoop *node);
static bool isSamplerRegister(TIntermTyped *operand);
es2::Shader *const shaderObject; es2::Shader *const shaderObject;
sw::Shader *shader; sw::Shader *shader;
......
...@@ -1265,9 +1265,19 @@ namespace sh ...@@ -1265,9 +1265,19 @@ namespace sh
return true; return true;
} }
bool OutputASM::isSamplerRegister(TIntermTyped *operand)
{
// A sampler register's qualifiers can be:
// - EvqUniform: The sampler uniform is used as is in the code (default case).
// - EvqTemporary: The sampler is indexed. It's still a sampler register.
// - EvqIn (and other similar types): The sampler has been passed as a function argument. At this point,
// the sampler has been copied and is no longer a sampler register.
return IsSampler(operand->getBasicType()) && (operand->getQualifier() == EvqUniform || operand->getQualifier() == EvqTemporary);
}
Instruction *OutputASM::emit(sw::Shader::Opcode op, TIntermTyped *dst, TIntermNode *src0, TIntermNode *src1, TIntermNode *src2, int index) Instruction *OutputASM::emit(sw::Shader::Opcode op, TIntermTyped *dst, TIntermNode *src0, TIntermNode *src1, TIntermNode *src2, int index)
{ {
if(dst && IsSampler(dst)) if(dst && isSamplerRegister(dst))
{ {
op = sw::Shader::OPCODE_NULL; // Can't assign to a sampler, but this is hit when indexing sampler arrays op = sw::Shader::OPCODE_NULL; // Can't assign to a sampler, but this is hit when indexing sampler arrays
} }
...@@ -1464,7 +1474,7 @@ namespace sh ...@@ -1464,7 +1474,7 @@ namespace sh
{ {
parameter.index = registerIndex(arg) + index; parameter.index = registerIndex(arg) + index;
if(IsSampler(arg)) if(isSamplerRegister(arg))
{ {
TIntermBinary *binary = argument->getAsBinaryNode(); TIntermBinary *binary = argument->getAsBinaryNode();
...@@ -1741,7 +1751,7 @@ namespace sh ...@@ -1741,7 +1751,7 @@ namespace sh
sw::Shader::ParameterType OutputASM::registerType(TIntermTyped *operand) sw::Shader::ParameterType OutputASM::registerType(TIntermTyped *operand)
{ {
if(IsSampler(operand)) if(isSamplerRegister(operand))
{ {
return sw::Shader::PARAMETER_SAMPLER; return sw::Shader::PARAMETER_SAMPLER;
} }
...@@ -1787,7 +1797,7 @@ namespace sh ...@@ -1787,7 +1797,7 @@ namespace sh
int OutputASM::registerIndex(TIntermTyped *operand) int OutputASM::registerIndex(TIntermTyped *operand)
{ {
if(IsSampler(operand)) if(isSamplerRegister(operand))
{ {
return samplerRegister(operand); return samplerRegister(operand);
} }
......
...@@ -143,6 +143,7 @@ namespace sh ...@@ -143,6 +143,7 @@ namespace sh
static int dim(TIntermNode *v); static int dim(TIntermNode *v);
static int dim2(TIntermNode *m); static int dim2(TIntermNode *m);
static unsigned int loopCount(TIntermLoop *node); static unsigned int loopCount(TIntermLoop *node);
static bool isSamplerRegister(TIntermTyped *operand);
rad::Shader *const shaderObject; rad::Shader *const shaderObject;
sw::Shader *shader; sw::Shader *shader;
......
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