Commit 6ddabc17 by Karl Schimpf

Add the trap instruction to the integrated ARM assembler.

Note: Once this CL has landed, Subzero's "make -f Makeefile.standalone check-spec" works in the integrated assembler without using hybrid assembly. BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334 R=jpp@chromium.org Review URL: https://codereview.chromium.org/1649053002 .
parent 266c5a25
...@@ -1948,6 +1948,12 @@ void InstARM32Trap::emit(const Cfg *Func) const { ...@@ -1948,6 +1948,12 @@ void InstARM32Trap::emit(const Cfg *Func) const {
} }
} }
void InstARM32Trap::emitIAS(const Cfg *Func) const {
auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>();
Asm->trap();
assert(!Asm->needsTextFixup());
}
void InstARM32Trap::dump(const Cfg *Func) const { void InstARM32Trap::dump(const Cfg *Func) const {
if (!BuildDefs::dump()) if (!BuildDefs::dump())
return; return;
......
...@@ -1248,6 +1248,7 @@ public: ...@@ -1248,6 +1248,7 @@ public:
return new (Func->allocate<InstARM32Trap>()) InstARM32Trap(Func); return new (Func->allocate<InstARM32Trap>()) InstARM32Trap(Func);
} }
void emit(const Cfg *Func) const override; void emit(const Cfg *Func) const override;
void emitIAS(const Cfg *Func) const override;
void dump(const Cfg *Func) const override; void dump(const Cfg *Func) const override;
static bool classof(const Inst *Inst) { return isClassof(Inst, Trap); } static bool classof(const Inst *Inst) { return isClassof(Inst, Trap); }
......
...@@ -82,7 +82,10 @@ entry: ...@@ -82,7 +82,10 @@ entry:
; ASM-NEXT: .long 0xe7fedef0 ; ASM-NEXT: .long 0xe7fedef0
; DIS-NEXT: 1c: e7fedef0 ; DIS-NEXT: 1c: e7fedef0
; IASM-NEXT: .long 0xe7fedef0 ; IASM-NEXT: .byte 0xf0
; IASM-NEXT: .byte 0xde
; IASM-NEXT: .byte 0xfe
; IASM-NEXT: .byte 0xe7
; ASM-NEXT: .LtestMls$local$__0: ; ASM-NEXT: .LtestMls$local$__0:
; IASM-NEXT: .LtestMls$local$__0: ; IASM-NEXT: .LtestMls$local$__0:
......
...@@ -55,7 +55,11 @@ define internal i32 @SdivTwoRegs(i32 %a, i32 %b) { ...@@ -55,7 +55,11 @@ define internal i32 @SdivTwoRegs(i32 %a, i32 %b) {
; IASM-NEXT: .byte 0x0 ; IASM-NEXT: .byte 0x0
; IASM-NEXT: .byte 0x1a ; IASM-NEXT: .byte 0x1a
; IASM-NEXT: .long 0xe7fedef0 ; IASM-NEXT: .byte 0xf0
; IASM-NEXT: .byte 0xde
; IASM-NEXT: .byte 0xfe
; IASM-NEXT: .byte 0xe7
; IASM-NEXT:.LSdivTwoRegs$local$__0: ; IASM-NEXT:.LSdivTwoRegs$local$__0:
; IASM-NEXT: .byte 0x10 ; IASM-NEXT: .byte 0x10
; IASM-NEXT: .byte 0xf1 ; IASM-NEXT: .byte 0xf1
......
; Show that we can translate IR instruction "trap".
; Note: We use integer division to test this, since a trap is inserted
; if one divides by zero.
; REQUIRES: allow_dump
; Compile using standalone assembler.
; RUN: %p2i --filetype=asm -i %s --target=arm32 --args -Om1 \
; RUN: | FileCheck %s --check-prefix=ASM
; Show bytes in assembled standalone code.
; RUN: %p2i --filetype=asm -i %s --target=arm32 --assemble --disassemble \
; RUN: --args -Om1 \
; RUN: | FileCheck %s --check-prefix=DIS
; Compile using integrated assembler.
; RUN: %p2i --filetype=iasm -i %s --target=arm32 --args -Om1 \
; RUN: | FileCheck %s --check-prefix=IASM
; Show bytes in assembled integrated code.
; RUN: %p2i --filetype=iasm -i %s --target=arm32 --assemble --disassemble \
; RUN: --args -Om1 \
; RUN: | FileCheck %s --check-prefix=DIS
define internal i32 @testTrap(i32 %v1, i32 %v2) {
; ASM-LABEL: testTrap:
; DIS-LABEL: 00000000 <testTrap>:
; IASM-LABEL: testTrap:
%res = udiv i32 %v1, %v2
; ASM: bne
; DIS: 18: 1a000000
; IASM-NOT: bne
; ASM-NEXT: .long 0xe7fedef0
; DIS-NEXT: 1c: e7fedef0
; IASM-NOT: .long
ret i32 %res
}
...@@ -55,7 +55,11 @@ define internal i32 @UdivTwoRegs(i32 %a, i32 %b) { ...@@ -55,7 +55,11 @@ define internal i32 @UdivTwoRegs(i32 %a, i32 %b) {
; IASM-NEXT: .byte 0x0 ; IASM-NEXT: .byte 0x0
; IASM-NEXT: .byte 0x1a ; IASM-NEXT: .byte 0x1a
; IASM-NEXT: .long 0xe7fedef0 ; IASM-NEXT: .byte 0xf0
; IASM-NEXT: .byte 0xde
; IASM-NEXT: .byte 0xfe
; IASM-NEXT: .byte 0xe7
; IASM-NEXT:.LUdivTwoRegs$local$__0: ; IASM-NEXT:.LUdivTwoRegs$local$__0:
; IASM-NEXT: .byte 0x10 ; IASM-NEXT: .byte 0x10
; IASM-NEXT: .byte 0xf1 ; IASM-NEXT: .byte 0xf1
......
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