Add support for OpSRem

Test: dEQP-VK.spirv_assembly.*srem* Bug: b/126873455 Change-Id: I9f5f519f7dac72ef7c7b45e88451fcb9dae0b3f8 Reviewed-on: https://swiftshader-review.googlesource.com/c/SwiftShader/+/27270Tested-by: Chris Forbes <chrisforbes@google.com> Presubmit-Ready: Chris Forbes <chrisforbes@google.com> Kokoro-Presubmit: kokoro <noreply+kokoro@google.com> Reviewed-by: Ben Clayton <bclayton@google.com> Reviewed-by: Nicolas Capens <nicolascapens@google.com>

Add support for OpSRem
71673c81 · Chris Forbes · d8504702 · 71673c81
Commit 71673c81 authored Mar 14, 2019 by Chris Forbes
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SpirvShader.cpp src/Pipeline/SpirvShader.cpp +11 -0

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--- a/src/Pipeline/SpirvShader.cpp
+++ b/src/Pipeline/SpirvShader.cpp
@@ -338,6 +338,7 @@ namespace sw
 			case spv::OpFOrdGreaterThanEqual:
 			case spv::OpFUnordGreaterThanEqual:
 			case spv::OpSMod:
+			case spv::OpSRem:
 			case spv::OpUMod:
 			case spv::OpIEqual:
 			case spv::OpINotEqual:
@@ -1139,6 +1140,7 @@ namespace sw
 		case spv::OpFOrdGreaterThanEqual:
 		case spv::OpFUnordGreaterThanEqual:
 		case spv::OpSMod:
+		case spv::OpSRem:
 		case spv::OpUMod:
 		case spv::OpIEqual:
 		case spv::OpINotEqual:
@@ -1638,6 +1640,15 @@ namespace sw
 				dst.emplace(i, lhs.UInt(i) / (rhs.UInt(i) | zeroMask));
 				break;
 			}
+			case spv::OpSRem:
+			{
+				SIMD::Int a = lhs.Int(i);
+				SIMD::Int b = rhs.Int(i);
+				b = b | CmpEQ(b, SIMD::Int(0)); // prevent divide-by-zero
+				a = a | (CmpEQ(a, SIMD::Int(0x80000000)) & CmpEQ(b, SIMD::Int(-1))); // prevent integer overflow
+				dst.emplace(i, a % b);
+				break;
+			}
 			case spv::OpSMod:
 			{
 				SIMD::Int a = lhs.Int(i);