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Commit 846da566 by Nicolas Capens Committed by Nicolas Capens
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Fix -Wundefined-var-template warnings for ARM32 and MIPS32

This change applies the same solution as applied to the X86 backends; defining the instruction opcodes as static constexpr members in the header. This was tested locally by building all the backend source files. Bug: b/192890685 Bug: chromium:604888 Change-Id: I6a70cb7cef1ad7bc56f0ea076b7ed5f4d07de5a3 Reviewed-on: https://swiftshader-review.googlesource.com/c/SwiftShader/+/55508Tested-by: 's avatarNicolas Capens <nicolascapens@google.com> Reviewed-by: 's avatarAlexis Hétu <sugoi@google.com> Kokoro-Result: kokoro <noreply+kokoro@google.com>
parent 3fc930f1
Showing with 200 additions and 192 deletions
third_party/subzero/src/IceInstARM32.cpp
...@@ -1814,81 +1814,6 @@ InstARM32Vabs::InstARM32Vabs(Cfg *Func, Variable *Dest, Variable *Src, ...@@ -1814,81 +1814,6 @@ InstARM32Vabs::InstARM32Vabs(Cfg *Func, Variable *Dest, Variable *Src,
// ======================== Dump routines ======================== // // ======================== Dump routines ======================== //
// Two-addr ops
template <> const char *InstARM32Movt::Opcode = "movt";
// Unary ops
template <> const char *InstARM32Movw::Opcode = "movw";
template <> const char *InstARM32Clz::Opcode = "clz";
template <> const char *InstARM32Mvn::Opcode = "mvn";
template <> const char *InstARM32Rbit::Opcode = "rbit";
template <> const char *InstARM32Rev::Opcode = "rev";
template <> const char *InstARM32Sxt::Opcode = "sxt"; // still requires b/h
template <> const char *InstARM32Uxt::Opcode = "uxt"; // still requires b/h
// FP
template <> const char *InstARM32Vsqrt::Opcode = "vsqrt";
// Mov-like ops
template <> const char *InstARM32Ldr::Opcode = "ldr";
template <> const char *InstARM32Ldrex::Opcode = "ldrex";
template <> const char *InstARM32Vldr1d::Opcode = "vldr1d";
template <> const char *InstARM32Vldr1q::Opcode = "vldr1q";
// Three-addr ops
template <> const char *InstARM32Adc::Opcode = "adc";
template <> const char *InstARM32Add::Opcode = "add";
template <> const char *InstARM32And::Opcode = "and";
template <> const char *InstARM32Asr::Opcode = "asr";
template <> const char *InstARM32Bic::Opcode = "bic";
template <> const char *InstARM32Eor::Opcode = "eor";
template <> const char *InstARM32Lsl::Opcode = "lsl";
template <> const char *InstARM32Lsr::Opcode = "lsr";
template <> const char *InstARM32Mul::Opcode = "mul";
template <> const char *InstARM32Orr::Opcode = "orr";
template <> const char *InstARM32Rsb::Opcode = "rsb";
template <> const char *InstARM32Rsc::Opcode = "rsc";
template <> const char *InstARM32Sbc::Opcode = "sbc";
template <> const char *InstARM32Sdiv::Opcode = "sdiv";
template <> const char *InstARM32Sub::Opcode = "sub";
template <> const char *InstARM32Udiv::Opcode = "udiv";
// FP
template <> const char *InstARM32Vadd::Opcode = "vadd";
template <> const char *InstARM32Vand::Opcode = "vand";
template <> const char *InstARM32Vbsl::Opcode = "vbsl";
template <> const char *InstARM32Vceq::Opcode = "vceq";
template <> const char *InstARM32ThreeAddrFP<InstARM32::Vcge>::Opcode = "vcge";
template <> const char *InstARM32ThreeAddrFP<InstARM32::Vcgt>::Opcode = "vcgt";
template <> const char *InstARM32Vdiv::Opcode = "vdiv";
template <> const char *InstARM32Veor::Opcode = "veor";
template <> const char *InstARM32Vmla::Opcode = "vmla";
template <> const char *InstARM32Vmls::Opcode = "vmls";
template <> const char *InstARM32Vmul::Opcode = "vmul";
template <> const char *InstARM32Vmvn::Opcode = "vmvn";
template <> const char *InstARM32Vmovl::Opcode = "vmovl";
template <> const char *InstARM32Vmovh::Opcode = "vmovh";
template <> const char *InstARM32Vmovhl::Opcode = "vmovhl";
template <> const char *InstARM32Vmovlh::Opcode = "vmovlh";
template <> const char *InstARM32Vorr::Opcode = "vorr";
template <> const char *InstARM32UnaryopFP<InstARM32::Vneg>::Opcode = "vneg";
template <> const char *InstARM32ThreeAddrFP<InstARM32::Vshl>::Opcode = "vshl";
template <> const char *InstARM32ThreeAddrFP<InstARM32::Vshr>::Opcode = "vshr";
template <> const char *InstARM32Vsub::Opcode = "vsub";
template <>
const char *InstARM32ThreeAddrFP<InstARM32::Vqadd>::Opcode = "vqadd";
template <>
const char *InstARM32ThreeAddrFP<InstARM32::Vqsub>::Opcode = "vqsub";
template <>
const char *InstARM32ThreeAddrFP<InstARM32::Vqmovn2>::Opcode = "vqmovn2";
template <>
const char *InstARM32ThreeAddrFP<InstARM32::Vmulh>::Opcode = "vmulh";
template <>
const char *InstARM32ThreeAddrFP<InstARM32::Vmlap>::Opcode = "vmlap";
template <> const char *InstARM32ThreeAddrFP<InstARM32::Vzip>::Opcode = "vzip";
// Four-addr ops
template <> const char *InstARM32Mla::Opcode = "mla";
template <> const char *InstARM32Mls::Opcode = "mls";
// Cmp-like ops
template <> const char *InstARM32Cmn::Opcode = "cmn";
template <> const char *InstARM32Cmp::Opcode = "cmp";
template <> const char *InstARM32Tst::Opcode = "tst";
void InstARM32::dump(const Cfg *Func) const { void InstARM32::dump(const Cfg *Func) const {
if (!BuildDefs::dump()) if (!BuildDefs::dump())
return; return;
......
third_party/subzero/src/IceInstARM32.h
...@@ -584,7 +584,7 @@ private: ...@@ -584,7 +584,7 @@ private:
addSource(Src); addSource(Src);
} }
static const char *Opcode; static const char *const Opcode;
}; };
/// Instructions of the form x := op(y), for vector/FP. /// Instructions of the form x := op(y), for vector/FP.
...@@ -626,7 +626,7 @@ protected: ...@@ -626,7 +626,7 @@ protected:
} }
FPSign Sign = FS_None; FPSign Sign = FS_None;
static const char *Opcode; static const char *const Opcode;
}; };
template <InstARM32::InstKindARM32 K> template <InstARM32::InstKindARM32 K>
...@@ -691,7 +691,7 @@ private: ...@@ -691,7 +691,7 @@ private:
addSource(Src); addSource(Src);
} }
static const char *Opcode; static const char *const Opcode;
}; };
/// Base class for load instructions. /// Base class for load instructions.
...@@ -728,7 +728,7 @@ private: ...@@ -728,7 +728,7 @@ private:
addSource(Source); addSource(Source);
} }
static const char *Opcode; static const char *const Opcode;
}; };
/// Instructions of the form x := y op z. May have the side-effect of setting /// Instructions of the form x := y op z. May have the side-effect of setting
...@@ -776,7 +776,7 @@ private: ...@@ -776,7 +776,7 @@ private:
addSource(Src1); addSource(Src1);
} }
static const char *Opcode; static const char *const Opcode;
bool SetFlags; bool SetFlags;
}; };
...@@ -825,7 +825,7 @@ protected: ...@@ -825,7 +825,7 @@ protected:
addSource(Src1); addSource(Src1);
} }
static const char *Opcode; static const char *const Opcode;
private: private:
static constexpr bool isVectorCompare() { static constexpr bool isVectorCompare() {
...@@ -907,7 +907,7 @@ private: ...@@ -907,7 +907,7 @@ private:
addSource(Src2); addSource(Src2);
} }
static const char *Opcode; static const char *const Opcode;
}; };
/// Instructions of the form x := x op1 (y op2 z). E.g., multiply accumulate. /// Instructions of the form x := x op1 (y op2 z). E.g., multiply accumulate.
...@@ -956,7 +956,7 @@ private: ...@@ -956,7 +956,7 @@ private:
} }
FPSign Sign = FS_None; FPSign Sign = FS_None;
static const char *Opcode; static const char *const Opcode;
}; };
/// Instructions of the form x cmpop y (setting flags). /// Instructions of the form x cmpop y (setting flags).
...@@ -997,7 +997,7 @@ private: ...@@ -997,7 +997,7 @@ private:
addSource(Src1); addSource(Src1);
} }
static const char *Opcode; static const char *const Opcode;
}; };
using InstARM32Adc = InstARM32ThreeAddrGPR<InstARM32::Adc>; using InstARM32Adc = InstARM32ThreeAddrGPR<InstARM32::Adc>;
...@@ -1706,6 +1706,90 @@ template <> void InstARM32Movt::emit(const Cfg *Func) const; ...@@ -1706,6 +1706,90 @@ template <> void InstARM32Movt::emit(const Cfg *Func) const;
template <> void InstARM32Vldr1d::emit(const Cfg *Func) const; template <> void InstARM32Vldr1d::emit(const Cfg *Func) const;
template <> void InstARM32Vldr1q::emit(const Cfg *Func) const; template <> void InstARM32Vldr1q::emit(const Cfg *Func) const;
// Two-addr ops
template <> constexpr const char *InstARM32Movt::Opcode = "movt";
// Unary ops
template <> constexpr const char *InstARM32Movw::Opcode = "movw";
template <> constexpr const char *InstARM32Clz::Opcode = "clz";
template <> constexpr const char *InstARM32Mvn::Opcode = "mvn";
template <> constexpr const char *InstARM32Rbit::Opcode = "rbit";
template <> constexpr const char *InstARM32Rev::Opcode = "rev";
template <>
constexpr const char *InstARM32Sxt::Opcode = "sxt"; // still requires b/h
template <>
constexpr const char *InstARM32Uxt::Opcode = "uxt"; // still requires b/h
// FP
template <> constexpr const char *InstARM32Vsqrt::Opcode = "vsqrt";
// Mov-like ops
template <> constexpr const char *InstARM32Ldr::Opcode = "ldr";
template <> constexpr const char *InstARM32Ldrex::Opcode = "ldrex";
template <> constexpr const char *InstARM32Vldr1d::Opcode = "vldr1d";
template <> constexpr const char *InstARM32Vldr1q::Opcode = "vldr1q";
// Three-addr ops
template <> constexpr const char *InstARM32Adc::Opcode = "adc";
template <> constexpr const char *InstARM32Add::Opcode = "add";
template <> constexpr const char *InstARM32And::Opcode = "and";
template <> constexpr const char *InstARM32Asr::Opcode = "asr";
template <> constexpr const char *InstARM32Bic::Opcode = "bic";
template <> constexpr const char *InstARM32Eor::Opcode = "eor";
template <> constexpr const char *InstARM32Lsl::Opcode = "lsl";
template <> constexpr const char *InstARM32Lsr::Opcode = "lsr";
template <> constexpr const char *InstARM32Mul::Opcode = "mul";
template <> constexpr const char *InstARM32Orr::Opcode = "orr";
template <> constexpr const char *InstARM32Rsb::Opcode = "rsb";
template <> constexpr const char *InstARM32Rsc::Opcode = "rsc";
template <> constexpr const char *InstARM32Sbc::Opcode = "sbc";
template <> constexpr const char *InstARM32Sdiv::Opcode = "sdiv";
template <> constexpr const char *InstARM32Sub::Opcode = "sub";
template <> constexpr const char *InstARM32Udiv::Opcode = "udiv";
// FP
template <> constexpr const char *InstARM32Vadd::Opcode = "vadd";
template <> constexpr const char *InstARM32Vand::Opcode = "vand";
template <> constexpr const char *InstARM32Vbsl::Opcode = "vbsl";
template <> constexpr const char *InstARM32Vceq::Opcode = "vceq";
template <>
constexpr const char *InstARM32ThreeAddrFP<InstARM32::Vcge>::Opcode = "vcge";
template <>
constexpr const char *InstARM32ThreeAddrFP<InstARM32::Vcgt>::Opcode = "vcgt";
template <> constexpr const char *InstARM32Vdiv::Opcode = "vdiv";
template <> constexpr const char *InstARM32Veor::Opcode = "veor";
template <> constexpr const char *InstARM32Vmla::Opcode = "vmla";
template <> constexpr const char *InstARM32Vmls::Opcode = "vmls";
template <> constexpr const char *InstARM32Vmul::Opcode = "vmul";
template <> constexpr const char *InstARM32Vmvn::Opcode = "vmvn";
template <> constexpr const char *InstARM32Vmovl::Opcode = "vmovl";
template <> constexpr const char *InstARM32Vmovh::Opcode = "vmovh";
template <> constexpr const char *InstARM32Vmovhl::Opcode = "vmovhl";
template <> constexpr const char *InstARM32Vmovlh::Opcode = "vmovlh";
template <> constexpr const char *InstARM32Vorr::Opcode = "vorr";
template <>
constexpr const char *InstARM32UnaryopFP<InstARM32::Vneg>::Opcode = "vneg";
template <>
constexpr const char *InstARM32ThreeAddrFP<InstARM32::Vshl>::Opcode = "vshl";
template <>
constexpr const char *InstARM32ThreeAddrFP<InstARM32::Vshr>::Opcode = "vshr";
template <> constexpr const char *InstARM32Vsub::Opcode = "vsub";
template <>
constexpr const char *InstARM32ThreeAddrFP<InstARM32::Vqadd>::Opcode = "vqadd";
template <>
constexpr const char *InstARM32ThreeAddrFP<InstARM32::Vqsub>::Opcode = "vqsub";
template <>
constexpr const char *InstARM32ThreeAddrFP<InstARM32::Vqmovn2>::Opcode =
"vqmovn2";
template <>
constexpr const char *InstARM32ThreeAddrFP<InstARM32::Vmulh>::Opcode = "vmulh";
template <>
constexpr const char *InstARM32ThreeAddrFP<InstARM32::Vmlap>::Opcode = "vmlap";
template <>
constexpr const char *InstARM32ThreeAddrFP<InstARM32::Vzip>::Opcode = "vzip";
// Four-addr ops
template <> constexpr const char *InstARM32Mla::Opcode = "mla";
template <> constexpr const char *InstARM32Mls::Opcode = "mls";
// Cmp-like ops
template <> constexpr const char *InstARM32Cmn::Opcode = "cmn";
template <> constexpr const char *InstARM32Cmp::Opcode = "cmp";
template <> constexpr const char *InstARM32Tst::Opcode = "tst";
} // end of namespace ARM32 } // end of namespace ARM32
} // end of namespace Ice } // end of namespace Ice
......
third_party/subzero/src/IceInstMIPS32.cpp
...@@ -58,100 +58,6 @@ const char *InstMIPS32::getWidthString(Type Ty) { ...@@ -58,100 +58,6 @@ const char *InstMIPS32::getWidthString(Type Ty) {
return "TBD"; return "TBD";
} }
template <> const char *InstMIPS32Abs_d::Opcode = "abs.d";
template <> const char *InstMIPS32Abs_s::Opcode = "abs.s";
template <> const char *InstMIPS32Addi::Opcode = "addi";
template <> const char *InstMIPS32Add::Opcode = "add";
template <> const char *InstMIPS32Add_d::Opcode = "add.d";
template <> const char *InstMIPS32Add_s::Opcode = "add.s";
template <> const char *InstMIPS32Addiu::Opcode = "addiu";
template <> const char *InstMIPS32Addu::Opcode = "addu";
template <> const char *InstMIPS32And::Opcode = "and";
template <> const char *InstMIPS32Andi::Opcode = "andi";
template <> const char *InstMIPS32C_eq_d::Opcode = "c.eq.d";
template <> const char *InstMIPS32C_eq_s::Opcode = "c.eq.s";
template <> const char *InstMIPS32C_ole_d::Opcode = "c.ole.d";
template <> const char *InstMIPS32C_ole_s::Opcode = "c.ole.s";
template <> const char *InstMIPS32C_olt_d::Opcode = "c.olt.d";
template <> const char *InstMIPS32C_olt_s::Opcode = "c.olt.s";
template <> const char *InstMIPS32C_ueq_d::Opcode = "c.ueq.d";
template <> const char *InstMIPS32C_ueq_s::Opcode = "c.ueq.s";
template <> const char *InstMIPS32C_ule_d::Opcode = "c.ule.d";
template <> const char *InstMIPS32C_ule_s::Opcode = "c.ule.s";
template <> const char *InstMIPS32C_ult_d::Opcode = "c.ult.d";
template <> const char *InstMIPS32C_ult_s::Opcode = "c.ult.s";
template <> const char *InstMIPS32C_un_d::Opcode = "c.un.d";
template <> const char *InstMIPS32C_un_s::Opcode = "c.un.s";
template <> const char *InstMIPS32Clz::Opcode = "clz";
template <> const char *InstMIPS32Cvt_d_l::Opcode = "cvt.d.l";
template <> const char *InstMIPS32Cvt_d_s::Opcode = "cvt.d.s";
template <> const char *InstMIPS32Cvt_d_w::Opcode = "cvt.d.w";
template <> const char *InstMIPS32Cvt_s_d::Opcode = "cvt.s.d";
template <> const char *InstMIPS32Cvt_s_l::Opcode = "cvt.s.l";
template <> const char *InstMIPS32Cvt_s_w::Opcode = "cvt.s.w";
template <> const char *InstMIPS32Div::Opcode = "div";
template <> const char *InstMIPS32Div_d::Opcode = "div.d";
template <> const char *InstMIPS32Div_s::Opcode = "div.s";
template <> const char *InstMIPS32Divu::Opcode = "divu";
template <> const char *InstMIPS32La::Opcode = "la";
template <> const char *InstMIPS32Ldc1::Opcode = "ldc1";
template <> const char *InstMIPS32Ll::Opcode = "ll";
template <> const char *InstMIPS32Lui::Opcode = "lui";
template <> const char *InstMIPS32Lw::Opcode = "lw";
template <> const char *InstMIPS32Lwc1::Opcode = "lwc1";
template <> const char *InstMIPS32Mfc1::Opcode = "mfc1";
template <> const char *InstMIPS32Mfhi::Opcode = "mfhi";
template <> const char *InstMIPS32Mflo::Opcode = "mflo";
template <> const char *InstMIPS32Mov_d::Opcode = "mov.d";
template <> const char *InstMIPS32Mov_s::Opcode = "mov.s";
template <> const char *InstMIPS32Movf::Opcode = "movf";
template <> const char *InstMIPS32Movn::Opcode = "movn";
template <> const char *InstMIPS32Movn_d::Opcode = "movn.d";
template <> const char *InstMIPS32Movn_s::Opcode = "movn.s";
template <> const char *InstMIPS32Movt::Opcode = "movt";
template <> const char *InstMIPS32Movz::Opcode = "movz";
template <> const char *InstMIPS32Movz_d::Opcode = "movz.d";
template <> const char *InstMIPS32Movz_s::Opcode = "movz.s";
template <> const char *InstMIPS32Mtc1::Opcode = "mtc1";
template <> const char *InstMIPS32Mthi::Opcode = "mthi";
template <> const char *InstMIPS32Mtlo::Opcode = "mtlo";
template <> const char *InstMIPS32Mul::Opcode = "mul";
template <> const char *InstMIPS32Mul_d::Opcode = "mul.d";
template <> const char *InstMIPS32Mul_s::Opcode = "mul.s";
template <> const char *InstMIPS32Mult::Opcode = "mult";
template <> const char *InstMIPS32Multu::Opcode = "multu";
template <> const char *InstMIPS32Nor::Opcode = "nor";
template <> const char *InstMIPS32Or::Opcode = "or";
template <> const char *InstMIPS32Ori::Opcode = "ori";
template <> const char *InstMIPS32Sc::Opcode = "sc";
template <> const char *InstMIPS32Sdc1::Opcode = "sdc1";
template <> const char *InstMIPS32Sll::Opcode = "sll";
template <> const char *InstMIPS32Sllv::Opcode = "sllv";
template <> const char *InstMIPS32Slt::Opcode = "slt";
template <> const char *InstMIPS32Slti::Opcode = "slti";
template <> const char *InstMIPS32Sltiu::Opcode = "sltiu";
template <> const char *InstMIPS32Sltu::Opcode = "sltu";
template <> const char *InstMIPS32Sqrt_d::Opcode = "sqrt.d";
template <> const char *InstMIPS32Sqrt_s::Opcode = "sqrt.s";
template <> const char *InstMIPS32Sra::Opcode = "sra";
template <> const char *InstMIPS32Srav::Opcode = "srav";
template <> const char *InstMIPS32Srl::Opcode = "srl";
template <> const char *InstMIPS32Srlv::Opcode = "srlv";
template <> const char *InstMIPS32Sub::Opcode = "sub";
template <> const char *InstMIPS32Sub_d::Opcode = "sub.d";
template <> const char *InstMIPS32Sub_s::Opcode = "sub.s";
template <> const char *InstMIPS32Subu::Opcode = "subu";
template <> const char *InstMIPS32Sw::Opcode = "sw";
template <> const char *InstMIPS32Swc1::Opcode = "swc1";
const char *InstMIPS32Sync::Opcode = "sync";
template <> const char *InstMIPS32Teq::Opcode = "teq";
template <> const char *InstMIPS32Trunc_l_d::Opcode = "trunc.l.d";
template <> const char *InstMIPS32Trunc_l_s::Opcode = "trunc.l.s";
template <> const char *InstMIPS32Trunc_w_d::Opcode = "trunc.w.d";
template <> const char *InstMIPS32Trunc_w_s::Opcode = "trunc.w.s";
template <> const char *InstMIPS32Xor::Opcode = "xor";
template <> const char *InstMIPS32Xori::Opcode = "xori";
template <> void InstMIPS32Lui::emit(const Cfg *Func) const { template <> void InstMIPS32Lui::emit(const Cfg *Func) const {
if (!BuildDefs::dump()) if (!BuildDefs::dump())
return; return;
......
third_party/subzero/src/IceInstMIPS32.h
...@@ -393,7 +393,7 @@ protected: ...@@ -393,7 +393,7 @@ protected:
} }
private: private:
static const char *Opcode; static const char *const Opcode;
const RelocOp Reloc; const RelocOp Reloc;
}; };
...@@ -438,7 +438,7 @@ private: ...@@ -438,7 +438,7 @@ private:
addSource(Src0); addSource(Src0);
} }
static const char *Opcode; static const char *const Opcode;
}; };
/// Instructions of the form opcode reg, reg. /// Instructions of the form opcode reg, reg.
...@@ -482,7 +482,7 @@ private: ...@@ -482,7 +482,7 @@ private:
addSource(Src0); addSource(Src0);
} }
static const char *Opcode; static const char *const Opcode;
}; };
/// Instructions of the form x := y op z. May have the side-effect of setting /// Instructions of the form x := y op z. May have the side-effect of setting
...@@ -531,7 +531,7 @@ private: ...@@ -531,7 +531,7 @@ private:
addSource(Src1); addSource(Src1);
} }
static const char *Opcode; static const char *const Opcode;
}; };
/// Instructions of the form x := y op z. May have the side-effect of setting /// Instructions of the form x := y op z. May have the side-effect of setting
...@@ -580,7 +580,7 @@ private: ...@@ -580,7 +580,7 @@ private:
addSource(Src1); addSource(Src1);
} }
static const char *Opcode; static const char *const Opcode;
}; };
// InstMIPS32Load represents instructions which loads data from memory // InstMIPS32Load represents instructions which loads data from memory
...@@ -668,7 +668,7 @@ private: ...@@ -668,7 +668,7 @@ private:
: InstMIPS32(Func, K, 2, Value), Reloc(Reloc) { : InstMIPS32(Func, K, 2, Value), Reloc(Reloc) {
addSource(Mem); addSource(Mem);
} }
static const char *Opcode; static const char *const Opcode;
const RelocOp Reloc; const RelocOp Reloc;
}; };
...@@ -759,7 +759,7 @@ private: ...@@ -759,7 +759,7 @@ private:
addSource(Value); addSource(Value);
addSource(Mem); addSource(Mem);
} }
static const char *Opcode; static const char *const Opcode;
const RelocOp Reloc; const RelocOp Reloc;
}; };
...@@ -940,7 +940,7 @@ private: ...@@ -940,7 +940,7 @@ private:
addSource(Src1); addSource(Src1);
}; };
static const char *Opcode; static const char *const Opcode;
}; };
class InstMIPS32Sync : public InstMIPS32 { class InstMIPS32Sync : public InstMIPS32 {
...@@ -974,7 +974,7 @@ public: ...@@ -974,7 +974,7 @@ public:
private: private:
InstMIPS32Sync(Cfg *Func) : InstMIPS32(Func, InstMIPS32::Sync, 0, nullptr) {} InstMIPS32Sync(Cfg *Func) : InstMIPS32(Func, InstMIPS32::Sync, 0, nullptr) {}
static const char *Opcode; static const char *const Opcode;
}; };
// Trap // Trap
...@@ -1028,7 +1028,7 @@ private: ...@@ -1028,7 +1028,7 @@ private:
addSource(Src1); addSource(Src1);
} }
static const char *Opcode; static const char *const Opcode;
const uint32_t TrapCode; const uint32_t TrapCode;
}; };
...@@ -1133,7 +1133,7 @@ private: ...@@ -1133,7 +1133,7 @@ private:
addSource(Src1); addSource(Src1);
} }
static const char *Opcode; static const char *const Opcode;
const RelocOp Reloc; const RelocOp Reloc;
const uint32_t Imm; const uint32_t Imm;
}; };
...@@ -1191,7 +1191,7 @@ private: ...@@ -1191,7 +1191,7 @@ private:
addSource(FCC); addSource(FCC);
} }
static const char *Opcode; static const char *const Opcode;
}; };
using InstMIPS32Abs_d = InstMIPS32TwoAddrFPR<InstMIPS32::Abs_d>; using InstMIPS32Abs_d = InstMIPS32TwoAddrFPR<InstMIPS32::Abs_d>;
...@@ -1461,6 +1461,100 @@ template <> void InstMIPS32Trunc_w_s::emitIAS(const Cfg *Func) const; ...@@ -1461,6 +1461,100 @@ template <> void InstMIPS32Trunc_w_s::emitIAS(const Cfg *Func) const;
template <> void InstMIPS32Xor::emitIAS(const Cfg *Func) const; template <> void InstMIPS32Xor::emitIAS(const Cfg *Func) const;
template <> void InstMIPS32Xori::emitIAS(const Cfg *Func) const; template <> void InstMIPS32Xori::emitIAS(const Cfg *Func) const;
template <> constexpr const char *InstMIPS32Abs_d::Opcode = "abs.d";
template <> constexpr const char *InstMIPS32Abs_s::Opcode = "abs.s";
template <> constexpr const char *InstMIPS32Addi::Opcode = "addi";
template <> constexpr const char *InstMIPS32Add::Opcode = "add";
template <> constexpr const char *InstMIPS32Add_d::Opcode = "add.d";
template <> constexpr const char *InstMIPS32Add_s::Opcode = "add.s";
template <> constexpr const char *InstMIPS32Addiu::Opcode = "addiu";
template <> constexpr const char *InstMIPS32Addu::Opcode = "addu";
template <> constexpr const char *InstMIPS32And::Opcode = "and";
template <> constexpr const char *InstMIPS32Andi::Opcode = "andi";
template <> constexpr const char *InstMIPS32C_eq_d::Opcode = "c.eq.d";
template <> constexpr const char *InstMIPS32C_eq_s::Opcode = "c.eq.s";
template <> constexpr const char *InstMIPS32C_ole_d::Opcode = "c.ole.d";
template <> constexpr const char *InstMIPS32C_ole_s::Opcode = "c.ole.s";
template <> constexpr const char *InstMIPS32C_olt_d::Opcode = "c.olt.d";
template <> constexpr const char *InstMIPS32C_olt_s::Opcode = "c.olt.s";
template <> constexpr const char *InstMIPS32C_ueq_d::Opcode = "c.ueq.d";
template <> constexpr const char *InstMIPS32C_ueq_s::Opcode = "c.ueq.s";
template <> constexpr const char *InstMIPS32C_ule_d::Opcode = "c.ule.d";
template <> constexpr const char *InstMIPS32C_ule_s::Opcode = "c.ule.s";
template <> constexpr const char *InstMIPS32C_ult_d::Opcode = "c.ult.d";
template <> constexpr const char *InstMIPS32C_ult_s::Opcode = "c.ult.s";
template <> constexpr const char *InstMIPS32C_un_d::Opcode = "c.un.d";
template <> constexpr const char *InstMIPS32C_un_s::Opcode = "c.un.s";
template <> constexpr const char *InstMIPS32Clz::Opcode = "clz";
template <> constexpr const char *InstMIPS32Cvt_d_l::Opcode = "cvt.d.l";
template <> constexpr const char *InstMIPS32Cvt_d_s::Opcode = "cvt.d.s";
template <> constexpr const char *InstMIPS32Cvt_d_w::Opcode = "cvt.d.w";
template <> constexpr const char *InstMIPS32Cvt_s_d::Opcode = "cvt.s.d";
template <> constexpr const char *InstMIPS32Cvt_s_l::Opcode = "cvt.s.l";
template <> constexpr const char *InstMIPS32Cvt_s_w::Opcode = "cvt.s.w";
template <> constexpr const char *InstMIPS32Div::Opcode = "div";
template <> constexpr const char *InstMIPS32Div_d::Opcode = "div.d";
template <> constexpr const char *InstMIPS32Div_s::Opcode = "div.s";
template <> constexpr const char *InstMIPS32Divu::Opcode = "divu";
template <> constexpr const char *InstMIPS32La::Opcode = "la";
template <> constexpr const char *InstMIPS32Ldc1::Opcode = "ldc1";
template <> constexpr const char *InstMIPS32Ll::Opcode = "ll";
template <> constexpr const char *InstMIPS32Lui::Opcode = "lui";
template <> constexpr const char *InstMIPS32Lw::Opcode = "lw";
template <> constexpr const char *InstMIPS32Lwc1::Opcode = "lwc1";
template <> constexpr const char *InstMIPS32Mfc1::Opcode = "mfc1";
template <> constexpr const char *InstMIPS32Mfhi::Opcode = "mfhi";
template <> constexpr const char *InstMIPS32Mflo::Opcode = "mflo";
template <> constexpr const char *InstMIPS32Mov_d::Opcode = "mov.d";
template <> constexpr const char *InstMIPS32Mov_s::Opcode = "mov.s";
template <> constexpr const char *InstMIPS32Movf::Opcode = "movf";
template <> constexpr const char *InstMIPS32Movn::Opcode = "movn";
template <> constexpr const char *InstMIPS32Movn_d::Opcode = "movn.d";
template <> constexpr const char *InstMIPS32Movn_s::Opcode = "movn.s";
template <> constexpr const char *InstMIPS32Movt::Opcode = "movt";
template <> constexpr const char *InstMIPS32Movz::Opcode = "movz";
template <> constexpr const char *InstMIPS32Movz_d::Opcode = "movz.d";
template <> constexpr const char *InstMIPS32Movz_s::Opcode = "movz.s";
template <> constexpr const char *InstMIPS32Mtc1::Opcode = "mtc1";
template <> constexpr const char *InstMIPS32Mthi::Opcode = "mthi";
template <> constexpr const char *InstMIPS32Mtlo::Opcode = "mtlo";
template <> constexpr const char *InstMIPS32Mul::Opcode = "mul";
template <> constexpr const char *InstMIPS32Mul_d::Opcode = "mul.d";
template <> constexpr const char *InstMIPS32Mul_s::Opcode = "mul.s";
template <> constexpr const char *InstMIPS32Mult::Opcode = "mult";
template <> constexpr const char *InstMIPS32Multu::Opcode = "multu";
template <> constexpr const char *InstMIPS32Nor::Opcode = "nor";
template <> constexpr const char *InstMIPS32Or::Opcode = "or";
template <> constexpr const char *InstMIPS32Ori::Opcode = "ori";
template <> constexpr const char *InstMIPS32Sc::Opcode = "sc";
template <> constexpr const char *InstMIPS32Sdc1::Opcode = "sdc1";
template <> constexpr const char *InstMIPS32Sll::Opcode = "sll";
template <> constexpr const char *InstMIPS32Sllv::Opcode = "sllv";
template <> constexpr const char *InstMIPS32Slt::Opcode = "slt";
template <> constexpr const char *InstMIPS32Slti::Opcode = "slti";
template <> constexpr const char *InstMIPS32Sltiu::Opcode = "sltiu";
template <> constexpr const char *InstMIPS32Sltu::Opcode = "sltu";
template <> constexpr const char *InstMIPS32Sqrt_d::Opcode = "sqrt.d";
template <> constexpr const char *InstMIPS32Sqrt_s::Opcode = "sqrt.s";
template <> constexpr const char *InstMIPS32Sra::Opcode = "sra";
template <> constexpr const char *InstMIPS32Srav::Opcode = "srav";
template <> constexpr const char *InstMIPS32Srl::Opcode = "srl";
template <> constexpr const char *InstMIPS32Srlv::Opcode = "srlv";
template <> constexpr const char *InstMIPS32Sub::Opcode = "sub";
template <> constexpr const char *InstMIPS32Sub_d::Opcode = "sub.d";
template <> constexpr const char *InstMIPS32Sub_s::Opcode = "sub.s";
template <> constexpr const char *InstMIPS32Subu::Opcode = "subu";
template <> constexpr const char *InstMIPS32Sw::Opcode = "sw";
template <> constexpr const char *InstMIPS32Swc1::Opcode = "swc1";
constexpr const char *InstMIPS32Sync::Opcode = "sync";
template <> constexpr const char *InstMIPS32Teq::Opcode = "teq";
template <> constexpr const char *InstMIPS32Trunc_l_d::Opcode = "trunc.l.d";
template <> constexpr const char *InstMIPS32Trunc_l_s::Opcode = "trunc.l.s";
template <> constexpr const char *InstMIPS32Trunc_w_d::Opcode = "trunc.w.d";
template <> constexpr const char *InstMIPS32Trunc_w_s::Opcode = "trunc.w.s";
template <> constexpr const char *InstMIPS32Xor::Opcode = "xor";
template <> constexpr const char *InstMIPS32Xori::Opcode = "xori";
} // end of namespace MIPS32 } // end of namespace MIPS32
} // end of namespace Ice } // end of namespace Ice
......
third_party/subzero/src/IceTargetLoweringARM32.h
...@@ -103,7 +103,7 @@ public: ...@@ -103,7 +103,7 @@ public:
default: default:
assert(RC < RC_Target); assert(RC < RC_Target);
return TypeToRegisterSet[RC]; return TypeToRegisterSet[RC];
case RegARM32::RCARM32_QtoS: case (RegClass)RegARM32::RCARM32_QtoS:
return TypeToRegisterSet[RC]; return TypeToRegisterSet[RC];
} }
} }
......
third_party/subzero/src/IceTargetLoweringMIPS32.cpp
...@@ -223,7 +223,6 @@ uint32_t TargetMIPS32::getStackAlignment() const { ...@@ -223,7 +223,6 @@ uint32_t TargetMIPS32::getStackAlignment() const {
uint32_t TargetMIPS32::getCallStackArgumentsSizeBytes(const InstCall *Call) { uint32_t TargetMIPS32::getCallStackArgumentsSizeBytes(const InstCall *Call) {
TargetMIPS32::CallingConv CC; TargetMIPS32::CallingConv CC;
RegNumT DummyReg;
size_t OutArgsSizeBytes = 0; size_t OutArgsSizeBytes = 0;
Variable *Dest = Call->getDest(); Variable *Dest = Call->getDest();
bool PartialOnStack = false; bool PartialOnStack = false;
......
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