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Commit 8d16c1d3 by Srdjan Obucina Committed by Jim Stichnoth
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Subzero, MIPS32: Encoding of FP comparison instructions

Patch implements encoding for instructions used for floating point number comparison. R=stichnot@chromium.org Review URL: https://codereview.chromium.org/2350833002 . Patch from Srdjan Obucina <Srdjan.Obucina@imgtec.com>.
parent cf9c12f8
Showing with 271 additions and 5 deletions
src/IceAssemblerMIPS32.cpp
......@@ -254,6 +254,20 @@ void AssemblerMIPS32::emitRdRsRt(IValueT Opcode, const Operand *OpRd,
emitInst(Opcode);
}
void AssemblerMIPS32::emitCOP1Fcmp(IValueT Opcode, FPInstDataFormat Format,
const Operand *OpFs, const Operand *OpFt,
IValueT CC, const char *InsnName) {
const IValueT Fs = encodeFPRegister(OpFs, "Fs", InsnName);
const IValueT Ft = encodeFPRegister(OpFt, "Ft", InsnName);
Opcode |= CC << 8;
Opcode |= Fs << 11;
Opcode |= Ft << 16;
Opcode |= Format << 21;
emitInst(Opcode);
}
void AssemblerMIPS32::emitCOP1FmtFsFd(IValueT Opcode, FPInstDataFormat Format,
const Operand *OpFd, const Operand *OpFs,
const char *InsnName) {
......@@ -371,6 +385,90 @@ void AssemblerMIPS32::b(Label *TargetLabel) {
TargetLabel->linkTo(*this, Position);
}
void AssemblerMIPS32::c_eq_d(const Operand *OpFs, const Operand *OpFt) {
static constexpr IValueT Opcode = 0x44000032;
emitCOP1Fcmp(Opcode, DoublePrecision, OpFs, OpFt, OperandMIPS32FCC::FCC0,
"c.eq.d");
}
void AssemblerMIPS32::c_eq_s(const Operand *OpFs, const Operand *OpFt) {
static constexpr IValueT Opcode = 0x44000032;
emitCOP1Fcmp(Opcode, SinglePrecision, OpFs, OpFt, OperandMIPS32FCC::FCC0,
"c.eq.s");
}
void AssemblerMIPS32::c_ole_d(const Operand *OpFs, const Operand *OpFt) {
static constexpr IValueT Opcode = 0x44000036;
emitCOP1Fcmp(Opcode, DoublePrecision, OpFs, OpFt, OperandMIPS32FCC::FCC0,
"c.ole.d");
}
void AssemblerMIPS32::c_ole_s(const Operand *OpFs, const Operand *OpFt) {
static constexpr IValueT Opcode = 0x44000036;
emitCOP1Fcmp(Opcode, SinglePrecision, OpFs, OpFt, OperandMIPS32FCC::FCC0,
"c.ole.s");
}
void AssemblerMIPS32::c_olt_d(const Operand *OpFs, const Operand *OpFt) {
static constexpr IValueT Opcode = 0x44000034;
emitCOP1Fcmp(Opcode, DoublePrecision, OpFs, OpFt, OperandMIPS32FCC::FCC0,
"c.olt.d");
}
void AssemblerMIPS32::c_olt_s(const Operand *OpFs, const Operand *OpFt) {
static constexpr IValueT Opcode = 0x44000034;
emitCOP1Fcmp(Opcode, SinglePrecision, OpFs, OpFt, OperandMIPS32FCC::FCC0,
"c.olt.s");
}
void AssemblerMIPS32::c_ueq_d(const Operand *OpFs, const Operand *OpFt) {
static constexpr IValueT Opcode = 0x44000033;
emitCOP1Fcmp(Opcode, DoublePrecision, OpFs, OpFt, OperandMIPS32FCC::FCC0,
"c.ueq.d");
}
void AssemblerMIPS32::c_ueq_s(const Operand *OpFs, const Operand *OpFt) {
static constexpr IValueT Opcode = 0x44000033;
emitCOP1Fcmp(Opcode, SinglePrecision, OpFs, OpFt, OperandMIPS32FCC::FCC0,
"c.ueq.s");
}
void AssemblerMIPS32::c_ule_d(const Operand *OpFs, const Operand *OpFt) {
static constexpr IValueT Opcode = 0x44000037;
emitCOP1Fcmp(Opcode, DoublePrecision, OpFs, OpFt, OperandMIPS32FCC::FCC0,
"c.ule.d");
}
void AssemblerMIPS32::c_ule_s(const Operand *OpFs, const Operand *OpFt) {
static constexpr IValueT Opcode = 0x44000037;
emitCOP1Fcmp(Opcode, SinglePrecision, OpFs, OpFt, OperandMIPS32FCC::FCC0,
"c.ule.s");
}
void AssemblerMIPS32::c_ult_d(const Operand *OpFs, const Operand *OpFt) {
static constexpr IValueT Opcode = 0x44000035;
emitCOP1Fcmp(Opcode, DoublePrecision, OpFs, OpFt, OperandMIPS32FCC::FCC0,
"c.ult.d");
}
void AssemblerMIPS32::c_ult_s(const Operand *OpFs, const Operand *OpFt) {
static constexpr IValueT Opcode = 0x44000035;
emitCOP1Fcmp(Opcode, SinglePrecision, OpFs, OpFt, OperandMIPS32FCC::FCC0,
"c.ult.s");
}
void AssemblerMIPS32::c_un_d(const Operand *OpFs, const Operand *OpFt) {
static constexpr IValueT Opcode = 0x44000031;
emitCOP1Fcmp(Opcode, DoublePrecision, OpFs, OpFt, OperandMIPS32FCC::FCC0,
"c.un.d");
}
void AssemblerMIPS32::c_un_s(const Operand *OpFs, const Operand *OpFt) {
static constexpr IValueT Opcode = 0x44000031;
emitCOP1Fcmp(Opcode, SinglePrecision, OpFs, OpFt, OperandMIPS32FCC::FCC0,
"c.un.s");
}
void AssemblerMIPS32::cvt_d_l(const Operand *OpFd, const Operand *OpFs) {
static constexpr IValueT Opcode = 0x44000021;
emitCOP1FmtFsFd(Opcode, Long, OpFd, OpFs, "cvt.d.l");
......@@ -497,6 +595,23 @@ void AssemblerMIPS32::move(const Operand *OpRd, const Operand *OpRs) {
}
}
void AssemblerMIPS32::movf(const Operand *OpRd, const Operand *OpRs,
const Operand *OpCc) {
IValueT Opcode = 0x00000001;
const IValueT Rd = encodeGPRegister(OpRd, "Rd", "movf");
const IValueT Rs = encodeGPRegister(OpRs, "Rs", "movf");
OperandMIPS32FCC::FCC Cc = OperandMIPS32FCC::FCC0;
if (const auto *OpFCC = llvm::dyn_cast<OperandMIPS32FCC>(OpCc)) {
Cc = OpFCC->getFCC();
}
const IValueT InstEncodingFalse = 0;
Opcode |= Rd << 11;
Opcode |= InstEncodingFalse << 16;
Opcode |= Cc << 18;
Opcode |= Rs << 21;
emitInst(Opcode);
}
void AssemblerMIPS32::movn_d(const Operand *OpFd, const Operand *OpFs,
const Operand *OpFt) {
static constexpr IValueT Opcode = 0x44000013;
......@@ -509,6 +624,23 @@ void AssemblerMIPS32::movn_s(const Operand *OpFd, const Operand *OpFs,
emitCOP1FmtFtFsFd(Opcode, SinglePrecision, OpFd, OpFs, OpFt, "movn.s");
}
void AssemblerMIPS32::movt(const Operand *OpRd, const Operand *OpRs,
const Operand *OpCc) {
IValueT Opcode = 0x00000001;
const IValueT Rd = encodeGPRegister(OpRd, "Rd", "movf");
const IValueT Rs = encodeGPRegister(OpRs, "Rs", "movf");
OperandMIPS32FCC::FCC Cc = OperandMIPS32FCC::FCC0;
if (const auto *OpFCC = llvm::dyn_cast<OperandMIPS32FCC>(OpCc)) {
Cc = OpFCC->getFCC();
}
const IValueT InstEncodingTrue = 1;
Opcode |= Rd << 11;
Opcode |= InstEncodingTrue << 16;
Opcode |= Cc << 18;
Opcode |= Rs << 21;
emitInst(Opcode);
}
void AssemblerMIPS32::movz_d(const Operand *OpFd, const Operand *OpFs,
const Operand *OpFt) {
static constexpr IValueT Opcode = 0x44000012;
......
src/IceAssemblerMIPS32.h
......@@ -72,6 +72,10 @@ public:
void emitRdRsRt(IValueT Opcode, const Operand *OpRd, const Operand *OpRs,
const Operand *OpRt, const char *InsnName);
void emitCOP1Fcmp(IValueT Opcode, FPInstDataFormat Format,
const Operand *OpFs, const Operand *OpFt, IValueT CC,
const char *InsnName);
void emitCOP1FmtFsFd(IValueT Opcode, FPInstDataFormat Format,
const Operand *OpFd, const Operand *OpFs,
const char *InsnName);
......@@ -108,6 +112,34 @@ public:
void b(Label *TargetLabel);
void c_eq_d(const Operand *OpFd, const Operand *OpFs);
void c_eq_s(const Operand *OpFd, const Operand *OpFs);
void c_ole_d(const Operand *OpFd, const Operand *OpFs);
void c_ole_s(const Operand *OpFd, const Operand *OpFs);
void c_olt_d(const Operand *OpFd, const Operand *OpFs);
void c_olt_s(const Operand *OpFd, const Operand *OpFs);
void c_ueq_d(const Operand *OpFd, const Operand *OpFs);
void c_ueq_s(const Operand *OpFd, const Operand *OpFs);
void c_ule_d(const Operand *OpFd, const Operand *OpFs);
void c_ule_s(const Operand *OpFd, const Operand *OpFs);
void c_ult_d(const Operand *OpFd, const Operand *OpFs);
void c_ult_s(const Operand *OpFd, const Operand *OpFs);
void c_un_d(const Operand *OpFd, const Operand *OpFs);
void c_un_s(const Operand *OpFd, const Operand *OpFs);
void cvt_d_l(const Operand *OpFd, const Operand *OpFs);
void cvt_d_s(const Operand *OpFd, const Operand *OpFs);
......@@ -134,10 +166,14 @@ public:
void move(const Operand *OpRd, const Operand *OpRs);
void movf(const Operand *OpRd, const Operand *OpRs, const Operand *OpCc);
void movn_d(const Operand *OpFd, const Operand *OpFs, const Operand *OpFt);
void movn_s(const Operand *OpFd, const Operand *OpFs, const Operand *OpFt);
void movt(const Operand *OpRd, const Operand *OpRs, const Operand *OpCc);
void movz_d(const Operand *OpFd, const Operand *OpFs, const Operand *OpFt);
void movz_s(const Operand *OpFd, const Operand *OpFs, const Operand *OpFt);
......
src/IceInstMIPS32.cpp
......@@ -783,6 +783,76 @@ template <> void InstMIPS32Andi::emitIAS(const Cfg *Func) const {
Asm->andi(getDest(), getSrc(0), Imm);
}
template <> void InstMIPS32C_eq_d::emitIAS(const Cfg *Func) const {
auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
Asm->c_eq_d(getSrc(0), getSrc(1));
}
template <> void InstMIPS32C_eq_s::emitIAS(const Cfg *Func) const {
auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
Asm->c_eq_s(getSrc(0), getSrc(1));
}
template <> void InstMIPS32C_ole_d::emitIAS(const Cfg *Func) const {
auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
Asm->c_ole_d(getSrc(0), getSrc(1));
}
template <> void InstMIPS32C_ole_s::emitIAS(const Cfg *Func) const {
auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
Asm->c_ole_s(getSrc(0), getSrc(1));
}
template <> void InstMIPS32C_olt_d::emitIAS(const Cfg *Func) const {
auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
Asm->c_olt_d(getSrc(0), getSrc(1));
}
template <> void InstMIPS32C_olt_s::emitIAS(const Cfg *Func) const {
auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
Asm->c_olt_s(getSrc(0), getSrc(1));
}
template <> void InstMIPS32C_ueq_d::emitIAS(const Cfg *Func) const {
auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
Asm->c_ueq_d(getSrc(0), getSrc(1));
}
template <> void InstMIPS32C_ueq_s::emitIAS(const Cfg *Func) const {
auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
Asm->c_ueq_s(getSrc(0), getSrc(1));
}
template <> void InstMIPS32C_ule_d::emitIAS(const Cfg *Func) const {
auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
Asm->c_ule_d(getSrc(0), getSrc(1));
}
template <> void InstMIPS32C_ule_s::emitIAS(const Cfg *Func) const {
auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
Asm->c_ule_s(getSrc(0), getSrc(1));
}
template <> void InstMIPS32C_ult_d::emitIAS(const Cfg *Func) const {
auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
Asm->c_ult_d(getSrc(0), getSrc(1));
}
template <> void InstMIPS32C_ult_s::emitIAS(const Cfg *Func) const {
auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
Asm->c_ult_s(getSrc(0), getSrc(1));
}
template <> void InstMIPS32C_un_d::emitIAS(const Cfg *Func) const {
auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
Asm->c_un_d(getSrc(0), getSrc(1));
}
template <> void InstMIPS32C_un_s::emitIAS(const Cfg *Func) const {
auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
Asm->c_un_s(getSrc(0), getSrc(1));
}
template <> void InstMIPS32Cvt_d_l::emitIAS(const Cfg *Func) const {
auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
Asm->cvt_d_l(getDest(), getSrc(0));
......@@ -858,6 +928,11 @@ template <> void InstMIPS32Mov_s::emitIAS(const Cfg *Func) const {
Asm->mov_s(getDest(), getSrc(0));
}
template <> void InstMIPS32Movf::emitIAS(const Cfg *Func) const {
auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
Asm->movf(getDest(), getSrc(0), getSrc(1));
}
template <> void InstMIPS32Movn_d::emitIAS(const Cfg *Func) const {
auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
Asm->movn_d(getDest(), getSrc(0), getSrc(1));
......@@ -868,6 +943,11 @@ template <> void InstMIPS32Movn_s::emitIAS(const Cfg *Func) const {
Asm->movn_s(getDest(), getSrc(0), getSrc(1));
}
template <> void InstMIPS32Movt::emitIAS(const Cfg *Func) const {
auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
Asm->movt(getDest(), getSrc(0), getSrc(1));
}
template <> void InstMIPS32Movz_d::emitIAS(const Cfg *Func) const {
auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
Asm->movz_d(getDest(), getSrc(0), getSrc(1));
......
src/IceInstMIPS32.h
......@@ -76,16 +76,18 @@ class OperandMIPS32FCC : public OperandMIPS32 {
OperandMIPS32FCC &operator=(const OperandMIPS32FCC &) = delete;
public:
enum FCC { FCC0 = 0, FCC1, FCC2, FCC3, FCC4, FCC5, FCC6, FCC7 };
using FCC = enum { FCC0 = 0, FCC1, FCC2, FCC3, FCC4, FCC5, FCC6, FCC7 };
static OperandMIPS32FCC *create(Cfg *Func, OperandMIPS32FCC::FCC FCC) {
return new (Func->allocate<OperandMIPS32FCC>()) OperandMIPS32FCC(FCC);
}
OperandMIPS32FCC::FCC getFCC() const { return FpCondCode; }
void emit(const Cfg *Func) const override {
if (!BuildDefs::dump())
return;
Ostream &Str = Func->getContext()->getStrEmit();
Str << "$fcc" << static_cast<uint16_t>(FCC);
Str << "$fcc" << static_cast<uint16_t>(FpCondCode);
}
static bool classof(const Operand *Operand) {
......@@ -98,10 +100,10 @@ public:
}
private:
OperandMIPS32FCC(OperandMIPS32FCC::FCC FCC)
: OperandMIPS32(kFCC, IceType_i32), FCC(FCC){};
OperandMIPS32FCC(OperandMIPS32FCC::FCC CC)
: OperandMIPS32(kFCC, IceType_i32), FpCondCode(CC){};
const OperandMIPS32FCC::FCC FCC;
const OperandMIPS32FCC::FCC FpCondCode;
};
class OperandMIPS32Mem : public OperandMIPS32 {
......@@ -1237,6 +1239,20 @@ template <> void InstMIPS32Addiu::emitIAS(const Cfg *Func) const;
template <> void InstMIPS32Addu::emitIAS(const Cfg *Func) const;
template <> void InstMIPS32And::emitIAS(const Cfg *Func) const;
template <> void InstMIPS32Andi::emitIAS(const Cfg *Func) const;
template <> void InstMIPS32C_eq_d::emitIAS(const Cfg *Func) const;
template <> void InstMIPS32C_eq_s::emitIAS(const Cfg *Func) const;
template <> void InstMIPS32C_ole_d::emitIAS(const Cfg *Func) const;
template <> void InstMIPS32C_ole_s::emitIAS(const Cfg *Func) const;
template <> void InstMIPS32C_olt_d::emitIAS(const Cfg *Func) const;
template <> void InstMIPS32C_olt_s::emitIAS(const Cfg *Func) const;
template <> void InstMIPS32C_ueq_d::emitIAS(const Cfg *Func) const;
template <> void InstMIPS32C_ueq_s::emitIAS(const Cfg *Func) const;
template <> void InstMIPS32C_ule_d::emitIAS(const Cfg *Func) const;
template <> void InstMIPS32C_ule_s::emitIAS(const Cfg *Func) const;
template <> void InstMIPS32C_ult_d::emitIAS(const Cfg *Func) const;
template <> void InstMIPS32C_ult_s::emitIAS(const Cfg *Func) const;
template <> void InstMIPS32C_un_d::emitIAS(const Cfg *Func) const;
template <> void InstMIPS32C_un_s::emitIAS(const Cfg *Func) const;
template <> void InstMIPS32Cvt_d_l::emitIAS(const Cfg *Func) const;
template <> void InstMIPS32Cvt_d_s::emitIAS(const Cfg *Func) const;
template <> void InstMIPS32Cvt_d_w::emitIAS(const Cfg *Func) const;
......@@ -1252,8 +1268,10 @@ template <> void InstMIPS32Mflo::emit(const Cfg *Func) const;
template <> void InstMIPS32Mfhi::emit(const Cfg *Func) const;
template <> void InstMIPS32Mov_d::emitIAS(const Cfg *Func) const;
template <> void InstMIPS32Mov_s::emitIAS(const Cfg *Func) const;
template <> void InstMIPS32Movf::emitIAS(const Cfg *Func) const;
template <> void InstMIPS32Movn_d::emitIAS(const Cfg *Func) const;
template <> void InstMIPS32Movn_s::emitIAS(const Cfg *Func) const;
template <> void InstMIPS32Movt::emitIAS(const Cfg *Func) const;
template <> void InstMIPS32Movz_d::emitIAS(const Cfg *Func) const;
template <> void InstMIPS32Movz_s::emitIAS(const Cfg *Func) const;
template <> void InstMIPS32Mtc1::emit(const Cfg *Func) const;
......
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