Discern between load and store addresses

src/Reactor/Optimizer.cpp

@@ -630,7 +630,7 @@ Ice::Operand *Optimizer::storeAddress(const Ice::Inst *instruction)
 
 	if(auto *store = llvm::dyn_cast<Ice::InstStore>(instruction))
 	{
-		return store->getAddr();
+		return store->getStoreAddress();
 	}
 
 	if(auto *storeSubVector = asStoreSubVector(instruction))
@@ -647,7 +647,7 @@ Ice::Operand *Optimizer::loadAddress(const Ice::Inst *instruction)
 
 	if(auto *load = llvm::dyn_cast<Ice::InstLoad>(instruction))
 	{
-		return load->getSourceAddress();
+		return load->getLoadAddress();
 	}
 
 	if(auto *loadSubVector = asLoadSubVector(instruction))

third_party/subzero/src/IceASanInstrumentation.cpp

@@ -363,7 +363,7 @@ void ASanInstrumentation::instrumentCall(LoweringContext &Context,
 
 void ASanInstrumentation::instrumentLoad(LoweringContext &Context,
                                          InstLoad *Instr) {
-  Operand *Src = Instr->getSourceAddress();
+  Operand *Src = Instr->getLoadAddress();
   if (auto *Reloc = llvm::dyn_cast<ConstantRelocatable>(Src)) {
     auto *NewLoad = InstLoad::create(Context.getNode()->getCfg(),
                                      Instr->getDest(), instrumentReloc(Reloc));
@@ -373,7 +373,7 @@ void ASanInstrumentation::instrumentLoad(LoweringContext &Context,
   }
   Constant *Func =
       Ctx->getConstantExternSym(Ctx->getGlobalString("__asan_check_load"));
-  instrumentAccess(Context, Instr->getSourceAddress(),
+  instrumentAccess(Context, Instr->getLoadAddress(),
                    typeWidthInBytes(Instr->getDest()->getType()), Func);
 }
 
@@ -381,15 +381,16 @@ void ASanInstrumentation::instrumentStore(LoweringContext &Context,
                                           InstStore *Instr) {
   Operand *Data = Instr->getData();
   if (auto *Reloc = llvm::dyn_cast<ConstantRelocatable>(Data)) {
-    auto *NewStore = InstStore::create(
-        Context.getNode()->getCfg(), instrumentReloc(Reloc), Instr->getAddr());
+    auto *NewStore =
+        InstStore::create(Context.getNode()->getCfg(), instrumentReloc(Reloc),
+                          Instr->getStoreAddress());
     Instr->setDeleted();
     Context.insert(NewStore);
     Instr = NewStore;
   }
   Constant *Func =
       Ctx->getConstantExternSym(Ctx->getGlobalString("__asan_check_store"));
-  instrumentAccess(Context, Instr->getAddr(),
+  instrumentAccess(Context, Instr->getStoreAddress(),
                    typeWidthInBytes(Instr->getData()->getType()), Func);
 }
 
@@ -461,8 +462,8 @@ void ASanInstrumentation::instrumentRet(LoweringContext &Context, InstRet *) {
   Cfg *Func = Context.getNode()->getCfg();
   Context.setInsertPoint(Context.getCur());
   for (InstStore *RzUnpoison : *ICE_TLS_GET_FIELD(LocalDtors)) {
-    Context.insert(
-        InstStore::create(Func, RzUnpoison->getData(), RzUnpoison->getAddr()));
+    Context.insert(InstStore::create(Func, RzUnpoison->getData(),
+                                     RzUnpoison->getStoreAddress()));
   }
   Context.advanceCur();
   Context.advanceNext();

third_party/subzero/src/IceInst.cpp

@@ -873,7 +873,7 @@ void InstStore::dump(const Cfg *Func) const {
   Str << "store " << Ty << " ";
   getData()->dump(Func);
   Str << ", " << Ty << "* ";
-  getAddr()->dump(Func);
+  getStoreAddress()->dump(Func);
   Str << ", align " << typeAlignInBytes(Ty);
   if (getRmwBeacon()) {
     Str << ", beacon ";

third_party/subzero/src/IceInst.h

@@ -655,7 +655,7 @@ public:
     (void)Align;
     return new (Func->allocate<InstLoad>()) InstLoad(Func, Dest, SourceAddr);
   }
-  Operand *getSourceAddress() const { return getSrc(0); }
+  Operand *getLoadAddress() const { return getSrc(0); }
   bool isMemoryWrite() const override { return false; }
   void dump(const Cfg *Func) const override;
   static bool classof(const Inst *Instr) { return Instr->getKind() == Load; }
@@ -761,7 +761,7 @@ public:
     (void)Align;
     return new (Func->allocate<InstStore>()) InstStore(Func, Data, Addr);
   }
-  Operand *getAddr() const { return getSrc(1); }
+  Operand *getStoreAddress() const { return getSrc(1); }
   Operand *getData() const { return getSrc(0); }
   Variable *getRmwBeacon() const;
   void setRmwBeacon(Variable *Beacon);

third_party/subzero/src/IceTargetLoweringARM32.cpp

@@ -5483,7 +5483,7 @@ void TargetARM32::lowerLoad(const InstLoad *Load) {
   // A Load instruction can be treated the same as an Assign instruction, after
   // the source operand is transformed into an OperandARM32Mem operand.
   Type Ty = Load->getDest()->getType();
-  Operand *Src0 = formMemoryOperand(Load->getSourceAddress(), Ty);
+  Operand *Src0 = formMemoryOperand(Load->getLoadAddress(), Ty);
   Variable *DestLoad = Load->getDest();
 
   // TODO(jvoung): handled folding opportunities. Sign and zero extension can
@@ -6168,7 +6168,7 @@ void TargetARM32::lowerSelect(const InstSelect *Instr) {
 
 void TargetARM32::lowerStore(const InstStore *Instr) {
   Operand *Value = Instr->getData();
-  Operand *Addr = Instr->getAddr();
+  Operand *Addr = Instr->getStoreAddress();
   OperandARM32Mem *NewAddr = formMemoryOperand(Addr, Value->getType());
   Type Ty = NewAddr->getType();
 

third_party/subzero/src/IceTargetLoweringMIPS32.cpp

@@ -5211,7 +5211,7 @@ void TargetMIPS32::lowerLoad(const InstLoad *Instr) {
   // A Load instruction can be treated the same as an Assign instruction, after
   // the source operand is transformed into an OperandMIPS32Mem operand.
   Type Ty = Instr->getDest()->getType();
-  Operand *Src0 = formMemoryOperand(Instr->getSourceAddress(), Ty);
+  Operand *Src0 = formMemoryOperand(Instr->getLoadAddress(), Ty);
   Variable *DestLoad = Instr->getDest();
   auto *Assign = InstAssign::create(Func, DestLoad, Src0);
   lowerAssign(Assign);

third_party/subzero/src/IceTargetLoweringX86BaseImpl.h

@@ -765,8 +765,8 @@ template <typename TraitsType> void TargetX86Base<TraitsType>::findRMW() {
       // trigger, resulting in two loads and one store, which is worse than the
       // original one load and one store.  However, this is probably rare, and
       // caching probably keeps it just as fast.
-      if (!isSameMemAddressOperand<TraitsType>(Load->getSourceAddress(),
-                                               Store->getAddr()))
+      if (!isSameMemAddressOperand<TraitsType>(Load->getLoadAddress(),
+                                               Store->getStoreAddress()))
         continue;
       Operand *ArithSrcFromLoad = Arith->getSrc(0);
       Operand *ArithSrcOther = Arith->getSrc(1);
@@ -794,8 +794,9 @@ template <typename TraitsType> void TargetX86Base<TraitsType>::findRMW() {
       Store->setRmwBeacon(Beacon);
       auto *BeaconDef = InstFakeDef::create(Func, Beacon);
       Node->getInsts().insert(I3, BeaconDef);
-      auto *RMW = InstX86FakeRMW::create(Func, ArithSrcOther, Store->getAddr(),
-                                         Beacon, Arith->getOp());
+      auto *RMW =
+          InstX86FakeRMW::create(Func, ArithSrcOther, Store->getStoreAddress(),
+                                 Beacon, Arith->getOp());
       Node->getInsts().insert(I3, RMW);
     }
   }
@@ -843,8 +844,8 @@ template <typename TraitsType> void TargetX86Base<TraitsType>::doLoadOpt() {
         // An InstLoad always qualifies.
         LoadDest = Load->getDest();
         constexpr bool DoLegalize = false;
-        LoadSrc = formMemoryOperand(Load->getSourceAddress(),
-                                    LoadDest->getType(), DoLegalize);
+        LoadSrc = formMemoryOperand(Load->getLoadAddress(), LoadDest->getType(),
+                                    DoLegalize);
       } else if (auto *Intrin = llvm::dyn_cast<InstIntrinsic>(CurInst)) {
         // An AtomicLoad intrinsic qualifies as long as it has a valid memory
         // ordering, and can be implemented in a single instruction (i.e., not
@@ -6065,7 +6066,7 @@ void TargetX86Base<TraitsType>::lowerLoad(const InstLoad *Load) {
   // it doesn't need another level of transformation.
   Variable *DestLoad = Load->getDest();
   Type Ty = DestLoad->getType();
-  Operand *Src0 = formMemoryOperand(Load->getSourceAddress(), Ty);
+  Operand *Src0 = formMemoryOperand(Load->getLoadAddress(), Ty);
   doMockBoundsCheck(Src0);
   auto *Assign = InstAssign::create(Func, DestLoad, Src0);
   lowerAssign(Assign);
@@ -6958,7 +6959,7 @@ void TargetX86Base<TraitsType>::lowerSelectVector(const InstSelect *Instr) {
 template <typename TraitsType>
 void TargetX86Base<TraitsType>::lowerStore(const InstStore *Instr) {
   Operand *Value = Instr->getData();
-  Operand *Addr = Instr->getAddr();
+  Operand *Addr = Instr->getStoreAddress();
   X86OperandMem *NewAddr = formMemoryOperand(Addr, Value->getType());
   doMockBoundsCheck(NewAddr);
   Type Ty = NewAddr->getType();
@@ -6980,7 +6981,7 @@ void TargetX86Base<TraitsType>::lowerStore(const InstStore *Instr) {
 template <typename TraitsType>
 void TargetX86Base<TraitsType>::doAddressOptStore() {
   auto *Instr = llvm::cast<InstStore>(Context.getCur());
-  Operand *Addr = Instr->getAddr();
+  Operand *Addr = Instr->getStoreAddress();
   Operand *Data = Instr->getData();
   if (auto *OptAddr = computeAddressOpt(Instr, Data->getType(), Addr)) {
     Instr->setDeleted();