Add vcvt.s32.f32 instruction to the integrated ARM assembler.

src/DartARM32/assembler_arm.cc

@@ -1111,13 +1111,12 @@ void Assembler::vcvtsd(SRegister sd, DRegister dm, Condition cond) {
 void Assembler::vcvtds(DRegister dd, SRegister sm, Condition cond) {
   EmitVFPds(cond, B23 | B21 | B20 | B18 | B17 | B16 | B7 | B6, dd, sm);
 }
-#endif
-
 
+// Moved to ARM32::AssemblerARM32::vcvtis()
 void Assembler::vcvtis(SRegister sd, SRegister sm, Condition cond) {
   EmitVFPsss(cond, B23 | B21 | B20 | B19 | B18 | B16 | B7 | B6, sd, S0, sm);
 }
-
+#endif
 
 void Assembler::vcvtid(SRegister sd, DRegister dm, Condition cond) {
   EmitVFPsd(cond, B23 | B21 | B20 | B19 | B18 | B16 | B8 | B7 | B6, sd, dm);

src/DartARM32/assembler_arm.h

@@ -727,8 +727,9 @@ class Assembler : public ValueObject {
   void vcvtsd(SRegister sd, DRegister dm, Condition cond = AL);
   // Moved to ARM32::AssemblerARM32:vcvtds
   void vcvtds(DRegister dd, SRegister sm, Condition cond = AL);
-#endif
+  // Moved to ARM32::AssemblerARM32::vcvtis()
   void vcvtis(SRegister sd, SRegister sm, Condition cond = AL);
+#endif
   void vcvtid(SRegister sd, DRegister dm, Condition cond = AL);
   void vcvtsi(SRegister sd, SRegister sm, Condition cond = AL);
   void vcvtdi(DRegister dd, SRegister sm, Condition cond = AL);

src/IceAssemblerARM32.cpp

@@ -2133,7 +2133,7 @@ void AssemblerARM32::emitVFPsd(CondARM32::Cond Cond, IValueT Opcode, IValueT Sd,
 
 void AssemblerARM32::vcvtsd(const Operand *OpSd, const Operand *OpDm,
                             CondARM32::Cond Cond) {
-  constexpr const char *Vcvtsd = "vctsd";
+  constexpr const char *Vcvtsd = "vcvtsd";
   IValueT Sd = encodeSRegister(OpSd, "Sd", Vcvtsd);
   IValueT Dm = encodeDRegister(OpDm, "Dm", Vcvtsd);
   constexpr IValueT VcvtsdOpcode =
@@ -2141,6 +2141,21 @@ void AssemblerARM32::vcvtsd(const Operand *OpSd, const Operand *OpDm,
   emitVFPsd(Cond, VcvtsdOpcode, Sd, Dm);
 }
 
+void AssemblerARM32::vcvtis(const Operand *OpSd, const Operand *OpSm,
+                            CondARM32::Cond Cond) {
+  // VCVT (between floating-point and integer, Floating-point)
+  //      - ARM Section A8.8.306, encoding A1:
+  //   vcvt<c>.s32.f32 <Sd>, <Sm>
+  //
+  // cccc11101D111101dddd10101M0mmmm where cccc=Cond, ddddD=Sd, and mmmmM=Sm.
+  constexpr const char *Vcvtis = "vcvtis";
+  IValueT Sd = encodeSRegister(OpSd, "Sd", Vcvtis);
+  IValueT Sm = encodeSRegister(OpSm, "Sm", Vcvtis);
+  constexpr IValueT VcvtsiOpcode = B23 | B21 | B20 | B19 | B18 | B16 | B7 | B6;
+  constexpr IValueT S0 = 0;
+  emitVFPsss(Cond, VcvtsiOpcode, Sd, S0, Sm);
+}
+
 void AssemblerARM32::emitVFPds(CondARM32::Cond Cond, IValueT Opcode, IValueT Dd,
                                IValueT Sm) {
   assert(Dd < RegARM32::getNumDRegs());

src/IceAssemblerARM32.h

@@ -328,10 +328,13 @@ public:
   // Second argument of compare is zero (+0.0).
   void vcmpsz(const Operand *OpSd, CondARM32::Cond cond);
 
-  void vcvtsd(const Operand *OpSd, const Operand *OpDm, CondARM32::Cond Cond);
-
   void vcvtds(const Operand *OpDd, const Operand *OpSm, CondARM32::Cond Cond);
 
+  // vcvt<c>.S32.F32
+  void vcvtis(const Operand *OpSd, const Operand *OpSm, CondARM32::Cond Cond);
+
+  void vcvtsd(const Operand *OpSd, const Operand *OpDm, CondARM32::Cond Cond);
+
   void vdivd(const Operand *OpDd, const Operand *OpDn, const Operand *OpDm,
              CondARM32::Cond Cond);
 

src/IceInstARM32.cpp

@@ -1860,6 +1860,9 @@ void InstARM32Vcvt::emit(const Cfg *Func) const {
 void InstARM32Vcvt::emitIAS(const Cfg *Func) const {
   auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>();
   switch (Variant) {
+  case S2si:
+    Asm->vcvtis(getDest(), getSrc(0), getPredicate());
+    break;
   case S2d:
     Asm->vcvtds(getDest(), getSrc(0), getPredicate());
     break;

tests_lit/assembler/arm32/vcvt.s32.f32.ll

+; Show that we know how to translate converting float to signed integer.
+
+; REQUIRES: allow_dump
+
+; Compile using standalone assembler.
+; RUN: %p2i --filetype=asm -i %s --target=arm32 --args -Om1 \
+; RUN:   --reg-use=s20 | FileCheck %s --check-prefix=ASM
+
+; Show bytes in assembled standalone code.
+; RUN: %p2i --filetype=asm -i %s --target=arm32 --assemble --disassemble \
+; RUN:   --args -Om1 --reg-use=s20  | FileCheck %s --check-prefix=DIS
+
+; Compile using integrated assembler.
+; RUN: %p2i --filetype=iasm -i %s --target=arm32 --args -Om1 \
+; RUN:   --reg-use=s20 \
+; RUN:   | FileCheck %s --check-prefix=IASM
+
+; Show bytes in assembled integrated code.
+; RUN: %p2i --filetype=iasm -i %s --target=arm32 --assemble --disassemble \
+; RUN:   --args -Om1 --reg-use=s20 | FileCheck %s --check-prefix=DIS
+
+define internal i32 @FloatToSignedInt() {
+; ASM-LABEL: FloatToSignedInt:
+; DIS-LABEL: 00000000 <FloatToSignedInt>:
+; IASM-LABEL: FloatToSignedInt:
+
+entry:
+; ASM-NEXT: .LFloatToSignedInt$entry:
+; IASM-NEXT: .LFloatToSignedInt$entry:
+
+  %v = fptosi float 0.0 to i32
+
+; ASM:  vcvt.s32.f32    s20, s20
+; DIS:   14:    eebdaaca
+; IASM-NOT: vcvt
+
+  ret i32 %v
+}