Subzero, MIPS32: lowerSelect for i64

src/IceTargetLoweringMIPS32.cpp

@@ -3445,14 +3445,29 @@ void TargetMIPS32::lowerSelect(const InstSelect *Instr) {
   Variable *Dest = Instr->getDest();
   const Type DestTy = Dest->getType();
 
-  if (DestTy == IceType_i64 || isVectorType(DestTy)) {
+  if (isVectorType(DestTy)) {
     UnimplementedLoweringError(this, Instr);
     return;
   }
 
-  Variable *DestR = legalizeToReg(Dest);
-  Variable *SrcTR = legalizeToReg(Instr->getTrueOperand());
-  Variable *SrcFR = legalizeToReg(Instr->getFalseOperand());
+  Variable *DestR = nullptr;
+  Variable *DestHiR = nullptr;
+  Variable *SrcTR = nullptr;
+  Variable *SrcTHiR = nullptr;
+  Variable *SrcFR = nullptr;
+  Variable *SrcFHiR = nullptr;
+
+  if (DestTy == IceType_i64) {
+    DestR = llvm::cast<Variable>(loOperand(Dest));
+    DestHiR = llvm::cast<Variable>(hiOperand(Dest));
+    SrcTR = legalizeToReg(loOperand(Instr->getTrueOperand()));
+    SrcTHiR = legalizeToReg(hiOperand(Instr->getTrueOperand()));
+    SrcFR = legalizeToReg(loOperand(Instr->getFalseOperand()));
+    SrcFHiR = legalizeToReg(hiOperand(Instr->getFalseOperand()));
+  } else {
+    SrcTR = legalizeToReg(Instr->getTrueOperand());
+    SrcFR = legalizeToReg(Instr->getFalseOperand());
+  }
 
   Variable *ConditionR = legalizeToReg(Instr->getCondition());
 
@@ -3464,18 +3479,21 @@ void TargetMIPS32::lowerSelect(const InstSelect *Instr) {
   case IceType_i16:
   case IceType_i32:
     _movn(SrcFR, SrcTR, ConditionR);
+    _mov(Dest, SrcFR);
+    break;
+  case IceType_i64:
+    _movn(SrcFR, SrcTR, ConditionR);
+    _movn(SrcFHiR, SrcTHiR, ConditionR);
     _mov(DestR, SrcFR);
-    _mov(Dest, DestR);
+    _mov(DestHiR, SrcFHiR);
     break;
   case IceType_f32:
     _movn_s(SrcFR, SrcTR, ConditionR);
-    _mov(DestR, SrcFR);
-    _mov(Dest, DestR);
+    _mov(Dest, SrcFR);
     break;
   case IceType_f64:
     _movn_d(SrcFR, SrcTR, ConditionR);
-    _mov(DestR, SrcFR);
-    _mov(Dest, DestR);
+    _mov(Dest, SrcFR);
     break;
   default:
     UnimplementedLoweringError(this, Instr);

tests_lit/llvm2ice_tests/64bit.pnacl.ll

@@ -1926,6 +1926,10 @@ entry:
 ; ARM32-OM1: movne
 ; ARM32-O2: movcc
 
+; MIPS32-LABEL: select64VarVar
+; MIPS32: movn
+; MIPS32: movn
+
 define internal i64 @select64VarConst(i64 %a, i64 %b) {
 entry:
   %cmp = icmp ult i64 %a, %b
@@ -1965,6 +1969,10 @@ entry:
 ; ARM32-O2: mov
 ; ARM32-O2: mov
 
+; MIPS32-LABEL: select64VarConst
+; MIPS32: movn
+; MIPS32: movn
+
 define internal i64 @select64ConstVar(i64 %a, i64 %b) {
 entry:
   %cmp = icmp ult i64 %a, %b
@@ -2004,6 +2012,10 @@ entry:
 ; ARM32-OM1: movne
 ; ARM32-O2: movcc
 
+; MIPS32-LABEL: select64ConstVar
+; MIPS32: movn
+; MIPS32: movn
+
 define internal void @icmpEq64Imm() {
 entry:
   %cmp = icmp eq i64 123, 234

tests_lit/llvm2ice_tests/fp.cmp.ll

@@ -1010,7 +1010,6 @@ entry:
 ; ARM32: bx
 ; MIPS32-LABEL: selectFloatVarVar
 ; MIPS32: movn.s {{.*}}
-; MIPS32: mov.s {{.*}}
 
 define internal double @selectDoubleVarVar(double %a, double %b) {
 entry:
@@ -1030,4 +1029,3 @@ entry:
 ; ARM32: bx
 ; MIPS32-LABEL: selectDoubleVarVar
 ; MIPS32: movn.d {{.*}}
-; MIPS32: mov.d {{.*}}

tests_lit/llvm2ice_tests/select-opt.ll

@@ -78,7 +78,6 @@ declare void @useInt(i32 %x)
 ; MIPS32-LABEL: testSelect
 ; MIPS32: slt {{.*}}
 ; MIPS32: movn {{.*}}
-; MIPS32: move {{.*}}
 
 ; Check for valid addressing mode in the cmp instruction when the
 ; operand is an immediate.
@@ -93,7 +92,6 @@ entry:
 ; ARM32-NOT: cmp #{{.*}},
 ; MIPS32-LABEL: testSelectImm32
 ; MIPS32: movn {{.*}}
-; MIPS32: move {{.*}}
 
 ; Check for valid addressing mode in the cmp instruction when the
 ; operand is an immediate.  There is a different x86-32 lowering
@@ -108,3 +106,5 @@ entry:
 ; ARM32-LABEL: testSelectImm64
 ; ARM32-NOT: cmp #{{.*}},
 ; MIPS32-LABEL: testSelectImm64
+; MIPS32: movn
+; MIPS32: movn