Commit a49fce0b by Sagar Thakur Committed by Jim Stichnoth

[Subzero][MIPS32] Adds prolog instructions for MIPS32

BUG=none R=stichnot@chromium.org Review URL: https://codereview.chromium.org/2051713002 . Patch from Sagar Thakur <sagar.thakur@imgtec.com>.
parent f90118af
......@@ -101,7 +101,7 @@
ALIASES1(Reg_SP)) \
X(Reg_FP, 30, "fp", 0, 0, 0, 1, 0, 0, 0, 0, 0, \
ALIASES1(Reg_FP)) \
X(Reg_RA, 31, "ra", 0, 1, 0, 0, 0, 0, 0, 0, 0, \
X(Reg_RA, 31, "ra", 0, 0, 0, 0, 0, 0, 0, 0, 0, \
ALIASES1(Reg_RA)) \
X(Reg_LO, 0, "lo", 0, 0, 0, 0, 0, 0, 0, 0, 0, \
ALIASES2(Reg_LO, Reg_LOHI)) \
......
......@@ -447,6 +447,11 @@ public:
static Type stackSlotType();
Variable *copyToReg(Operand *Src, RegNumT RegNum = RegNumT());
// Iterates over the CFG and determines the maximum outgoing stack arguments
// bytes. This information is later used during addProlog() to pre-allocate
// the outargs area
void findMaxStackOutArgsSize();
void addProlog(CfgNode *Node) override;
void addEpilog(CfgNode *Node) override;
......@@ -457,6 +462,9 @@ public:
Operand *loOperand(Operand *Operand);
Operand *hiOperand(Operand *Operand);
void finishArgumentLowering(Variable *Arg, Variable *FramePtr,
size_t BasicFrameOffset, size_t *InArgsSizeBytes);
Operand *legalizeUndef(Operand *From, RegNumT RegNum = RegNumT());
/// Helper class that understands the Calling Convention and register
......@@ -543,13 +551,18 @@ protected:
bool UsesFramePointer = false;
bool NeedsStackAlignment = false;
bool MaybeLeafFunc = true;
bool PrologEmitsFixedAllocas = false;
uint32_t MaxOutArgsSizeBytes = 0;
static SmallBitVector TypeToRegisterSet[RCMIPS32_NUM];
static SmallBitVector TypeToRegisterSetUnfiltered[RCMIPS32_NUM];
static SmallBitVector RegisterAliases[RegMIPS32::Reg_NUM];
SmallBitVector RegsUsed;
VarList PhysicalRegisters[IceType_NUM];
VarList PreservedGPRs;
static constexpr uint32_t CHAR_BITS = 8;
static constexpr uint32_t INT32_BITS = 32;
size_t SpillAreaSizeBytes = 0;
private:
ENABLE_MAKE_UNIQUE;
......
......@@ -23,8 +23,8 @@ target:
}
; MIPS32-LABEL: uncond1
; MIPS32: b {{[0-9]+}} <.Luncond1$target>
; MIPS32: b {{[0-9a-f]+}} <.Luncond1$target>
; MIPS32: <.Luncond1$target>:
; MIPS32: li
; MIPS32: addu
; MIPS32: b {{[0-9]+}} <.Luncond1$target>
; MIPS32: b {{[0-9a-f]+}} <.Luncond1$target>
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