Subzero, MIPS32: Instruction NOR, pseudoinstruction NOT

src/IceAssemblerMIPS32.cpp

@@ -670,6 +670,12 @@ void AssemblerMIPS32::mul_s(const Operand *OpFd, const Operand *OpFs,
   emitCOP1FmtFtFsFd(Opcode, SinglePrecision, OpFd, OpFs, OpFt, "mul.s");
 }
 
+void AssemblerMIPS32::nor(const Operand *OpRd, const Operand *OpRs,
+                          const Operand *OpRt) {
+  static constexpr IValueT Opcode = 0x00000027;
+  emitRdRsRt(Opcode, OpRd, OpRs, OpRt, "nor");
+}
+
 void AssemblerMIPS32::or_(const Operand *OpRd, const Operand *OpRs,
                           const Operand *OpRt) {
   static constexpr IValueT Opcode = 0x00000025;

src/IceAssemblerMIPS32.h

@@ -184,6 +184,8 @@ public:
 
   void mul_s(const Operand *OpFd, const Operand *OpFs, const Operand *OpFt);
 
+  void nor(const Operand *OpRd, const Operand *OpRs, const Operand *OpRt);
+
   void or_(const Operand *OpRd, const Operand *OpRs, const Operand *OpRt);
 
   void ori(const Operand *OpRt, const Operand *OpRs, const uint32_t Imm);

src/IceInstMIPS32.cpp

@@ -119,6 +119,7 @@ template <> const char *InstMIPS32Mul_d::Opcode = "mul.d";
 template <> const char *InstMIPS32Mul_s::Opcode = "mul.s";
 template <> const char *InstMIPS32Mult::Opcode = "mult";
 template <> const char *InstMIPS32Multu::Opcode = "multu";
+template <> const char *InstMIPS32Nor::Opcode = "nor";
 template <> const char *InstMIPS32Or::Opcode = "or";
 template <> const char *InstMIPS32Ori::Opcode = "ori";
 template <> const char *InstMIPS32Sdc1::Opcode = "sdc1";
@@ -997,6 +998,11 @@ template <> void InstMIPS32Multu::emit(const Cfg *Func) const {
   emitThreeAddrLoHi(Opcode, this, Func);
 }
 
+template <> void InstMIPS32Nor::emitIAS(const Cfg *Func) const {
+  auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
+  Asm->nor(getDest(), getSrc(0), getSrc(1));
+}
+
 template <> void InstMIPS32Or::emitIAS(const Cfg *Func) const {
   auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
   Asm->or_(getDest(), getSrc(0), getSrc(1));

src/IceInstMIPS32.h

@@ -247,6 +247,7 @@ public:
     Mul_s,
     Mult,
     Multu,
+    Nor,
     Or,
     Ori,
     Ret,
@@ -1161,6 +1162,7 @@ using InstMIPS32Mul_d = InstMIPS32ThreeAddrFPR<InstMIPS32::Mul_d>;
 using InstMIPS32Mul_s = InstMIPS32ThreeAddrFPR<InstMIPS32::Mul_s>;
 using InstMIPS32Mult = InstMIPS32ThreeAddrGPR<InstMIPS32::Mult>;
 using InstMIPS32Multu = InstMIPS32ThreeAddrGPR<InstMIPS32::Multu>;
+using InstMIPS32Nor = InstMIPS32ThreeAddrGPR<InstMIPS32::Nor>;
 using InstMIPS32Or = InstMIPS32ThreeAddrGPR<InstMIPS32::Or>;
 using InstMIPS32Ori = InstMIPS32Imm16<InstMIPS32::Ori>;
 using InstMIPS32Sdc1 = InstMIPS32Store<InstMIPS32::Sdc1>;
@@ -1284,6 +1286,7 @@ template <> void InstMIPS32Mul_d::emitIAS(const Cfg *Func) const;
 template <> void InstMIPS32Mul_s::emitIAS(const Cfg *Func) const;
 template <> void InstMIPS32Mult::emit(const Cfg *Func) const;
 template <> void InstMIPS32Multu::emit(const Cfg *Func) const;
+template <> void InstMIPS32Nor::emitIAS(const Cfg *Func) const;
 template <> void InstMIPS32Or::emitIAS(const Cfg *Func) const;
 template <> void InstMIPS32Ori::emitIAS(const Cfg *Func) const;
 template <> void InstMIPS32Sll::emitIAS(const Cfg *Func) const;

src/IceTargetLoweringMIPS32.h

@@ -424,6 +424,14 @@ public:
 
   void _nop() { Context.insert<InstMIPS32Sll>(getZero(), getZero(), 0); }
 
+  void _nor(Variable *Dest, Variable *Src0, Variable *Src1) {
+    Context.insert<InstMIPS32Nor>(Dest, Src0, Src1);
+  }
+
+  void _not(Variable *Dest, Variable *Src0) {
+    Context.insert<InstMIPS32Nor>(Dest, Src0, getZero());
+  }
+
   void _or(Variable *Dest, Variable *Src0, Variable *Src1) {
     Context.insert<InstMIPS32Or>(Dest, Src0, Src1);
   }