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swiftshader
Commit ec1aeb84 by Ben Clayton
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SpirvShader: Add relational ops for ordered and unordered floats

Bug: b/127282157 Change-Id: Id2c5b29d744f6f7ddcbb853db0a95228425d7f83 Reviewed-on: https://swiftshader-review.googlesource.com/c/SwiftShader/+/26108Tested-by: 's avatarBen Clayton <bclayton@google.com> Reviewed-by: 's avatarNicolas Capens <nicolascapens@google.com> Kokoro-Presubmit: kokoro <noreply+kokoro@google.com>
parent 76e9bc06
Showing with 135 additions and 0 deletions
src/Pipeline/SpirvShader.cpp
...@@ -250,6 +250,18 @@ namespace sw ...@@ -250,6 +250,18 @@ namespace sw
case spv::OpFAdd: case spv::OpFAdd:
case spv::OpFSub: case spv::OpFSub:
case spv::OpFDiv: case spv::OpFDiv:
case spv::OpFOrdEqual:
case spv::OpFUnordEqual:
case spv::OpFOrdNotEqual:
case spv::OpFUnordNotEqual:
case spv::OpFOrdLessThan:
case spv::OpFUnordLessThan:
case spv::OpFOrdGreaterThan:
case spv::OpFUnordGreaterThan:
case spv::OpFOrdLessThanEqual:
case spv::OpFUnordLessThanEqual:
case spv::OpFOrdGreaterThanEqual:
case spv::OpFUnordGreaterThanEqual:
case spv::OpUMod: case spv::OpUMod:
case spv::OpIEqual: case spv::OpIEqual:
case spv::OpINotEqual: case spv::OpINotEqual:
...@@ -953,6 +965,18 @@ namespace sw ...@@ -953,6 +965,18 @@ namespace sw
case spv::OpFAdd: case spv::OpFAdd:
case spv::OpFSub: case spv::OpFSub:
case spv::OpFDiv: case spv::OpFDiv:
case spv::OpFOrdEqual:
case spv::OpFUnordEqual:
case spv::OpFOrdNotEqual:
case spv::OpFUnordNotEqual:
case spv::OpFOrdLessThan:
case spv::OpFUnordLessThan:
case spv::OpFOrdGreaterThan:
case spv::OpFUnordGreaterThan:
case spv::OpFOrdLessThanEqual:
case spv::OpFUnordLessThanEqual:
case spv::OpFOrdGreaterThanEqual:
case spv::OpFUnordGreaterThanEqual:
case spv::OpUMod: case spv::OpUMod:
case spv::OpIEqual: case spv::OpIEqual:
case spv::OpINotEqual: case spv::OpINotEqual:
...@@ -1354,6 +1378,42 @@ namespace sw ...@@ -1354,6 +1378,42 @@ namespace sw
case spv::OpFDiv: case spv::OpFDiv:
dst.emplace(i, lhs / rhs); dst.emplace(i, lhs / rhs);
break; break;
case spv::OpFOrdEqual:
dst.emplace(i, As<SIMD::Float>(CmpEQ(lhs, rhs)));
break;
case spv::OpFUnordEqual:
dst.emplace(i, As<SIMD::Float>(CmpUEQ(lhs, rhs)));
break;
case spv::OpFOrdNotEqual:
dst.emplace(i, As<SIMD::Float>(CmpNEQ(lhs, rhs)));
break;
case spv::OpFUnordNotEqual:
dst.emplace(i, As<SIMD::Float>(CmpUNEQ(lhs, rhs)));
break;
case spv::OpFOrdLessThan:
dst.emplace(i, As<SIMD::Float>(CmpLT(lhs, rhs)));
break;
case spv::OpFUnordLessThan:
dst.emplace(i, As<SIMD::Float>(CmpULT(lhs, rhs)));
break;
case spv::OpFOrdGreaterThan:
dst.emplace(i, As<SIMD::Float>(CmpGT(lhs, rhs)));
break;
case spv::OpFUnordGreaterThan:
dst.emplace(i, As<SIMD::Float>(CmpUGT(lhs, rhs)));
break;
case spv::OpFOrdLessThanEqual:
dst.emplace(i, As<SIMD::Float>(CmpLE(lhs, rhs)));
break;
case spv::OpFUnordLessThanEqual:
dst.emplace(i, As<SIMD::Float>(CmpULE(lhs, rhs)));
break;
case spv::OpFOrdGreaterThanEqual:
dst.emplace(i, As<SIMD::Float>(CmpGE(lhs, rhs)));
break;
case spv::OpFUnordGreaterThanEqual:
dst.emplace(i, As<SIMD::Float>(CmpUGE(lhs, rhs)));
break;
case spv::OpShiftRightLogical: case spv::OpShiftRightLogical:
dst.emplace(i, As<SIMD::Float>(As<SIMD::UInt>(lhs) >> As<SIMD::UInt>(rhs))); dst.emplace(i, As<SIMD::Float>(As<SIMD::UInt>(lhs) >> As<SIMD::UInt>(rhs)));
break; break;
......
src/Reactor/LLVMReactor.cpp
...@@ -6809,6 +6809,36 @@ namespace rr ...@@ -6809,6 +6809,36 @@ namespace rr
return RValue<Int4>(Nucleus::createSExt(Nucleus::createFCmpOGT(x.value, y.value), Int4::getType())); return RValue<Int4>(Nucleus::createSExt(Nucleus::createFCmpOGT(x.value, y.value), Int4::getType()));
} }
RValue<Int4> CmpUEQ(RValue<Float4> x, RValue<Float4> y)
{
return RValue<Int4>(Nucleus::createSExt(Nucleus::createFCmpUEQ(x.value, y.value), Int4::getType()));
}
RValue<Int4> CmpULT(RValue<Float4> x, RValue<Float4> y)
{
return RValue<Int4>(Nucleus::createSExt(Nucleus::createFCmpULT(x.value, y.value), Int4::getType()));
}
RValue<Int4> CmpULE(RValue<Float4> x, RValue<Float4> y)
{
return RValue<Int4>(Nucleus::createSExt(Nucleus::createFCmpULE(x.value, y.value), Int4::getType()));
}
RValue<Int4> CmpUNEQ(RValue<Float4> x, RValue<Float4> y)
{
return RValue<Int4>(Nucleus::createSExt(Nucleus::createFCmpUNE(x.value, y.value), Int4::getType()));
}
RValue<Int4> CmpUNLT(RValue<Float4> x, RValue<Float4> y)
{
return RValue<Int4>(Nucleus::createSExt(Nucleus::createFCmpUGE(x.value, y.value), Int4::getType()));
}
RValue<Int4> CmpUNLE(RValue<Float4> x, RValue<Float4> y)
{
return RValue<Int4>(Nucleus::createSExt(Nucleus::createFCmpUGT(x.value, y.value), Int4::getType()));
}
RValue<Int4> IsInf(RValue<Float4> x) RValue<Int4> IsInf(RValue<Float4> x)
{ {
return CmpEQ(As<Int4>(x) & Int4(0x7FFFFFFF), Int4(0x7F800000)); return CmpEQ(As<Int4>(x) & Int4(0x7FFFFFFF), Int4(0x7F800000));
......
src/Reactor/Reactor.hpp
...@@ -2138,12 +2138,27 @@ namespace rr ...@@ -2138,12 +2138,27 @@ namespace rr
RValue<Float4> UnpackHigh(RValue<Float4> x, RValue<Float4> y); RValue<Float4> UnpackHigh(RValue<Float4> x, RValue<Float4> y);
RValue<Float4> Mask(Float4 &lhs, RValue<Float4> rhs, unsigned char select); RValue<Float4> Mask(Float4 &lhs, RValue<Float4> rhs, unsigned char select);
RValue<Int> SignMask(RValue<Float4> x); RValue<Int> SignMask(RValue<Float4> x);
// Ordered comparison functions
RValue<Int4> CmpEQ(RValue<Float4> x, RValue<Float4> y); RValue<Int4> CmpEQ(RValue<Float4> x, RValue<Float4> y);
RValue<Int4> CmpLT(RValue<Float4> x, RValue<Float4> y); RValue<Int4> CmpLT(RValue<Float4> x, RValue<Float4> y);
RValue<Int4> CmpLE(RValue<Float4> x, RValue<Float4> y); RValue<Int4> CmpLE(RValue<Float4> x, RValue<Float4> y);
RValue<Int4> CmpNEQ(RValue<Float4> x, RValue<Float4> y); RValue<Int4> CmpNEQ(RValue<Float4> x, RValue<Float4> y);
RValue<Int4> CmpNLT(RValue<Float4> x, RValue<Float4> y); RValue<Int4> CmpNLT(RValue<Float4> x, RValue<Float4> y);
RValue<Int4> CmpNLE(RValue<Float4> x, RValue<Float4> y); RValue<Int4> CmpNLE(RValue<Float4> x, RValue<Float4> y);
inline RValue<Int4> CmpGT(RValue<Float4> x, RValue<Float4> y) { return CmpNLE(x, y); }
inline RValue<Int4> CmpGE(RValue<Float4> x, RValue<Float4> y) { return CmpNLT(x, y); }
// Unordered comparison functions
RValue<Int4> CmpUEQ(RValue<Float4> x, RValue<Float4> y);
RValue<Int4> CmpULT(RValue<Float4> x, RValue<Float4> y);
RValue<Int4> CmpULE(RValue<Float4> x, RValue<Float4> y);
RValue<Int4> CmpUNEQ(RValue<Float4> x, RValue<Float4> y);
RValue<Int4> CmpUNLT(RValue<Float4> x, RValue<Float4> y);
RValue<Int4> CmpUNLE(RValue<Float4> x, RValue<Float4> y);
inline RValue<Int4> CmpUGT(RValue<Float4> x, RValue<Float4> y) { return CmpUNLE(x, y); }
inline RValue<Int4> CmpUGE(RValue<Float4> x, RValue<Float4> y) { return CmpUNLT(x, y); }
RValue<Int4> IsInf(RValue<Float4> x); RValue<Int4> IsInf(RValue<Float4> x);
RValue<Int4> IsNan(RValue<Float4> x); RValue<Int4> IsNan(RValue<Float4> x);
RValue<Float4> Round(RValue<Float4> x); RValue<Float4> Round(RValue<Float4> x);
......
src/Reactor/SubzeroReactor.cpp
...@@ -7049,6 +7049,36 @@ namespace rr ...@@ -7049,6 +7049,36 @@ namespace rr
return RValue<Int4>(Nucleus::createFCmpOGT(x.value, y.value)); return RValue<Int4>(Nucleus::createFCmpOGT(x.value, y.value));
} }
RValue<Int4> CmpUEQ(RValue<Float4> x, RValue<Float4> y)
{
return RValue<Int4>(Nucleus::createFCmpUEQ(x.value, y.value));
}
RValue<Int4> CmpULT(RValue<Float4> x, RValue<Float4> y)
{
return RValue<Int4>(Nucleus::createFCmpULT(x.value, y.value));
}
RValue<Int4> CmpULE(RValue<Float4> x, RValue<Float4> y)
{
return RValue<Int4>(Nucleus::createFCmpULE(x.value, y.value));
}
RValue<Int4> CmpUNEQ(RValue<Float4> x, RValue<Float4> y)
{
return RValue<Int4>(Nucleus::createFCmpUNE(x.value, y.value));
}
RValue<Int4> CmpUNLT(RValue<Float4> x, RValue<Float4> y)
{
return RValue<Int4>(Nucleus::createFCmpUGE(x.value, y.value));
}
RValue<Int4> CmpUNLE(RValue<Float4> x, RValue<Float4> y)
{
return RValue<Int4>(Nucleus::createFCmpUGT(x.value, y.value));
}
RValue<Int4> IsInf(RValue<Float4> x) RValue<Int4> IsInf(RValue<Float4> x)
{ {
return CmpEQ(As<Int4>(x) & Int4(0x7FFFFFFF), Int4(0x7F800000)); return CmpEQ(As<Int4>(x) & Int4(0x7FFFFFFF), Int4(0x7F800000));
......
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