Commit f6d56f15 by Tom Tan

Add intrinsics and missing LLVM AsmParser files for Windows ARM64

llvm::parseIR in llvm-7.0\llvm\lib\IRReader\IRReader.cpp calls parseAssembly which is defined in lib/AsmParser/Parser.cpp, but the latter file is not included in swiftshader_llvm which causes unresovled symbol for linking. This CL added the necessary source files under llvm\AsmParser to swiftshader_llvm. This CL also changed __rdtsc() to use Windows ARM64 intrinsic _ReadStatusReg to get cycle counter as alternative of __rdtsc(). Bug: chromium:893460 Change-Id: I269662f2e4249a3ec5495ecad02bc759139e1d4f Reviewed-on: https://swiftshader-review.googlesource.com/c/23508Reviewed-by: 's avatarNicolas Capens <nicolascapens@google.com> Reviewed-by: 's avatarAlexis Hétu <sugoi@google.com> Tested-by: 's avatarTom Tan <Tom.Tan@microsoft.com>
parent a4afa24f
...@@ -59,7 +59,11 @@ namespace sw ...@@ -59,7 +59,11 @@ namespace sw
int64_t Timer::ticks() int64_t Timer::ticks()
{ {
#if defined(_WIN32) #if defined(_WIN32)
return __rdtsc(); #if defined(_M_ARM64)
return _ReadStatusReg(ARM64_PMCCNTR_EL0);
#else
return __rdtsc();
#endif
#elif defined(__i386__) || defined(__x86_64__) #elif defined(__i386__) || defined(__x86_64__)
int64_t tsc; int64_t tsc;
__asm volatile("rdtsc": "=A" (tsc)); __asm volatile("rdtsc": "=A" (tsc));
......
...@@ -105,6 +105,7 @@ Display::~Display() ...@@ -105,6 +105,7 @@ Display::~Display()
#define __x86_64__ 1 #define __x86_64__ 1
#endif #endif
#if defined(__i386__) || defined(__x86_64__)
static void cpuid(int registers[4], int info) static void cpuid(int registers[4], int info)
{ {
#if defined(__i386__) || defined(__x86_64__) #if defined(__i386__) || defined(__x86_64__)
...@@ -127,6 +128,7 @@ static bool detectSSE() ...@@ -127,6 +128,7 @@ static bool detectSSE()
cpuid(registers, 1); cpuid(registers, 1);
return (registers[3] & 0x02000000) != 0; return (registers[3] & 0x02000000) != 0;
} }
#endif
bool Display::initialize() bool Display::initialize()
{ {
......
...@@ -196,6 +196,9 @@ swiftshader_source_set("swiftshader_llvm") { ...@@ -196,6 +196,9 @@ swiftshader_source_set("swiftshader_llvm") {
"llvm/lib/Analysis/ValueLatticeUtils.cpp", "llvm/lib/Analysis/ValueLatticeUtils.cpp",
"llvm/lib/Analysis/ValueTracking.cpp", "llvm/lib/Analysis/ValueTracking.cpp",
"llvm/lib/Analysis/VectorUtils.cpp", "llvm/lib/Analysis/VectorUtils.cpp",
"llvm/lib/AsmParser/LLLexer.cpp",
"llvm/lib/AsmParser/LLParser.cpp",
"llvm/lib/AsmParser/Parser.cpp",
"llvm/lib/BinaryFormat/Dwarf.cpp", "llvm/lib/BinaryFormat/Dwarf.cpp",
"llvm/lib/BinaryFormat/Magic.cpp", "llvm/lib/BinaryFormat/Magic.cpp",
"llvm/lib/BinaryFormat/Wasm.cpp", "llvm/lib/BinaryFormat/Wasm.cpp",
...@@ -407,7 +410,10 @@ swiftshader_source_set("swiftshader_llvm") { ...@@ -407,7 +410,10 @@ swiftshader_source_set("swiftshader_llvm") {
} }
if (target_cpu != current_cpu && if (target_cpu != current_cpu &&
(current_cpu == "x86" || current_cpu == "x64")) { (current_cpu == "x86" || current_cpu == "x64") ||
# Windows ARM64 does cross compilation on Windows x64 host, and requires native
# x86 target.
(is_win && target_cpu == "arm64")) {
deps += [ ":swiftshader_llvm_x86" ] deps += [ ":swiftshader_llvm_x86" ]
} }
} }
......
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