- 09 Aug, 2016 1 commit
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Thomas Lively authored
BUG=https://bugs.chromium.org/p/nativeclient/issues/detail?id=4374 R=kschimpf@google.com, stichnot@chromium.org Review URL: https://codereview.chromium.org/2194853003 .
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- 08 Aug, 2016 2 commits
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Jim Stichnoth authored
BUG= none Review URL: https://codereview.chromium.org/2215623002 .
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Jim Stichnoth authored
Modify the Makefiles to pass in the current git hash, which is embedded into the translated output. As a side effect, it is also embedded into the Subzero translator binary. This is useful for two reasons: 1. The PNaCl component update process is somewhat manual, making it tricky long after the fact to know exactly which revision was pushed, e.g. when trying to reproduce a bug or crash. 2. A translated binary can be inspected to make sure Chrome used the expected revision of Subzero. (And also to verify that pnacl-sz was used rather than pnacl-llc.) The revision string is suppressed for lit tests, because a number of tests seem overly strict about global initializer expectations. BUG= none R=jpp@chromium.org Review URL: https://codereview.chromium.org/2218363002 .
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- 05 Aug, 2016 3 commits
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Jim Stichnoth authored
The opt level (O2 versus Om1) should be tested using Cfg::getOptLevel() instead of getFlags().getOptLevel() whenever possible. This is because if you run "-Om1 -force-O2=foo", and you're compiling foo, the first form tells you O2 while the second form tells you Om1. BUG= none R=eholk@chromium.org Review URL: https://codereview.chromium.org/2210773002 .
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Jim Stichnoth authored
Memset lowering was using the memcpy inline threshold instead of the memset threshold. Using the memset threshold as specified (16) seems to make spec2k performance slightly worse, so change it to the original value (8). BUG= none R=eholk@chromium.org Review URL: https://codereview.chromium.org/2217983003 .
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Manasij Mukherjee authored
LCSE is local common sub-expression elimination. LICM is loop invariant code motion. Short circuit splits basic blocks and introduces early jumps. Global Splitting is a post regalloc live range splitting pass. BUG=none R=stichnot@chromium.org Review URL: https://codereview.chromium.org/2217773003 .
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- 04 Aug, 2016 6 commits
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Manasij Mukherjee authored
Convert adds with a constant operand to lea on -aggressive-lea BUG=none R=stichnot@chromium.org Review URL: https://codereview.chromium.org/2135403002 .
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Manasij Mukherjee authored
Load multiple uses of a floating point constant (between two call instructions or block start/end) into a variable before its first use. t1 = b + 1.0 t2 = c + 1.0 Gets transformed to: t0 = 1.0 t0_1 = t0 t1 = b + t0_1 t2 = c + t0_1 Call instructions reset the procedure, but uses the same variable, just in case it got a register. We are assuming floating point registers are not calee saved in general. Example, continuing from before: result = call <some function> t3 = d + 1.0 Gets transformed to: result = call <some function> t0_2 = t0 t3 = d + t0_2 BUG= none R=stichnot@chromium.org Review URL: https://codereview.chromium.org/2208523002 .
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Manasij Mukherjee authored
After register allocation is done once, this pass targets the variables that do not get registers, break them into multiple variables with shorter (at most spanning a basic block) live ranges. After discarding the new variables with too few uses, the register allocator is run again and the new variables that manage to get registers are inserted. BUG=None R=stichnot@chromium.org Review URL: https://codereview.chromium.org/2172313002 .
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Thomas Lively authored
Added load/store and stack/heap/global information. BUG=https://bugs.chromium.org/p/nativeclient/issues/detail?id=4374 R=kschimpf@google.com Review URL: https://codereview.chromium.org/2211733002 .
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Jim Stichnoth authored
For certain cases of inlined memset lowering, the 8-bit value wasn't being properly spread/replicated into the 32-bit immediate to be stored. Specifically, if the 8-bit value is between -128 and -1 (i.e. 0x80 to 0xff), the spread value would be something like 0xffffff80 instead of 0x80808080. BUG= b/30502279 R=jpp@chromium.org Review URL: https://codereview.chromium.org/2215553002 .
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Jim Stichnoth authored
Previous CL forgot to "make format". BUG= none Review URL: https://codereview.chromium.org/2206743003 .
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- 03 Aug, 2016 1 commit
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Thomas Lively authored
BUG=https://bugs.chromium.org/p/nativeclient/issues/detail?id=4374 R=kschimpf@google.com Review URL: https://codereview.chromium.org/2209563002 .
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- 02 Aug, 2016 1 commit
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Mohit Bhakkad authored
R=stichnot@chromium.org Review URL: https://codereview.chromium.org/2197233002 . Patch from Mohit Bhakkad <mohit.bhakkad@imgtec.com>.
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- 01 Aug, 2016 2 commits
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Manasij Mukherjee authored
Reduce the default number of iterations to 1 Put the optional code behind the -lcse-no-ssa flag, which is disabled by default. This brings down the overhead of enabling this to about 2%. BUG= R=stichnot@chromium.org Review URL: https://codereview.chromium.org/2185193002 .
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Jim Stichnoth authored
The linear-scan register allocator takes an all-or-nothing approach -- either the variable's entire live range gets a register, or none of it does. To help with this, we add a pass that splits successive uses of a variable within a basic block into a chain of linked variables. This gives the register allocator the chance to allocate registers to subsets of the original live range. The split variables are linked to each other so that if they don't get a register, they share a stack slot with the original variable, and redundant writes to that stack slot are recognized and elided. This pass is executed after target lowering and right before register allocation. As such, it has to deal with some idiosyncrasies of target lowering, specifically the possibility of intra-block control flow. We experimented with doing this as a pre-lowering pass. However, the transformations interfered with some of the target lowering's pattern matching, such as bool folding, so we concluded that post-lowering was a better place for it. Note: Some of the lit tests are overly specific about registers, and in these cases it was the path of least resistance to just disable local variable splitting. BUG= none R=eholk@chromium.org, jpp@chromium.org Review URL: https://codereview.chromium.org/2177033002 .
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- 27 Jul, 2016 1 commit
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Thomas Lively authored
BUG=https://bugs.chromium.org/p/nativeclient/issues/detail?id=4374 R=stichnot@chromium.org Review URL: https://codereview.chromium.org/2183683003 .
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- 26 Jul, 2016 1 commit
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Thomas Lively authored
BUG=https://bugs.chromium.org/p/nativeclient/issues/detail?id=4374 R=stichnot@chromium.org Review URL: https://codereview.chromium.org/2183643002 .
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- 25 Jul, 2016 1 commit
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Manasij Mukherjee authored
BUG=none R=stichnot@chromium.org Review URL: https://codereview.chromium.org/2162123002 .
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- 21 Jul, 2016 4 commits
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Thomas Lively authored
BUG=https://bugs.chromium.org/p/nativeclient/issues/detail?id=4374 R=kschimpf@google.com Review URL: https://codereview.chromium.org/2165393002 .
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Manasij Mukherjee authored
Results in lower code size and more loads folded into cmp instructions. BUG=none R=eholk@chromium.org, jpp@chromium.org, stichnot@chromium.org Review URL: https://codereview.chromium.org/2124973005 .
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Sagar Thakur authored
BUG=none R=stichnot@chromium.org Review URL: https://codereview.chromium.org/2166643003 . Patch from Sagar Thakur <sagar.thakur@imgtec.com>.
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Thomas Lively authored
BUG=https://bugs.chromium.org/p/nativeclient/issues/detail?id=4374 R=stichnot@chromium.org Review URL: https://codereview.chromium.org/2148413003 .
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- 20 Jul, 2016 1 commit
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Thomas Lively authored
It was previously the case that instrumentStart in ASanInstrumentation would block until instrumentGlobals had completed. This was because instrumentStart depends on the global redzones having been inserted. However, instrumentGlobals was not called until the first function was popped off the emit queue, and when _start was the first function, it was not placed on the emit queue until after it had been instrumented and lowered. instrumentStart was waiting for instrumentGlobals, which could not happen until instrumentStart completed. BUG=https://bugs.chromium.org/p/nativeclient/issues/detail?id=4374 R=kschimpf@google.com, stichnot@chromium.org Review URL: https://codereview.chromium.org/2165493002 .
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- 19 Jul, 2016 2 commits
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Manasij Mukherjee authored
Make LoopAnalyzer compute loop bodies and depth only. Move the logic for finding out loop headers and pre-headers to LoopInfo, which provides a visitor to iterate over the loops and easy access to the information. This does not change the core algorithm. BUG=None R=jpp@chromium.org, stichnot@chromium.org Review URL: https://codereview.chromium.org/2149803005 .
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Jim Stichnoth authored
The x86 lowering sequences for sdiv/udiv/srem/urem all have a problem, in that they don't reflect the fact that two registers are affected by the instruction. For example, the urem instruction: dest = src0 urem src1 lowers to something like this: t1:eax = src0 t2:edx = 0 t2:edx = (t1:eax and t2:edx) div src1 dest = t2:edx The problem is that there is no indication that the div instruction smashes eax. As such, it's possible that the register allocator could erroneously assume that src0 is still available in eax after the div instruction. To fix this, we make use of the FakeDef instruction. In this example, we change the div instruction to "officially" produce eax as its result, then fakedef edx in terms of eax. This means that as long as the urem result is actually used, the definitions of eax and edx will be preserved, but if the urem result is unused, then the whole sequence can be dead-code eliminated. t1:eax = src0 t2:edx = 0 t1:eax = (t1:eax and t2:edx) div src1 # dest var changed to t1:eax t2:edx = fakedef t1:eax # fakedef instruction added dest = t2:edx BUG= none R=jpp@chromium.org Review URL: https://codereview.chromium.org/2158213002 .
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- 14 Jul, 2016 2 commits
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Sagar Thakur authored
BUG=none R=stichnot@chromium.org Review URL: https://codereview.chromium.org/2148593003 . Patch from Sagar Thakur <sagar.thakur@imgtec.com>.
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Thomas Lively authored
BUG=https://bugs.chromium.org/p/nativeclient/issues/detail?id=4374 R=kschimpf@google.com, stichnot@chromium.org Review URL: https://codereview.chromium.org/2145213002 .
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- 13 Jul, 2016 2 commits
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Thomas Lively authored
BUG=https://bugs.chromium.org/p/nativeclient/issues/detail?id=4374 R=kschimpf@google.com Review URL: https://codereview.chromium.org/2145063003 .
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Mohit Bhakkad authored
R=stichnot@chromium.org Review URL: https://codereview.chromium.org/2143243003 . Patch from Mohit Bhakkad <mohit.bhakkad@imgtec.com>.
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- 12 Jul, 2016 3 commits
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Manasij Mukherjee authored
Implemented behind the new -licm flag. Hoists invariant arithmetic instructions from loop bodies to pre-headers. Does not trigger for loops where headers have two incoming edges from outside the loop. Also enables multi block address optimization, because most of the instructions hoisted are address calculations coming from gep. Does not touch memory operations. This algorithm does not seem to work well for load-hoisting. BUG=none R=jpp@chromium.org, stichnot@chromium.org Review URL: https://codereview.chromium.org/2138443002 .
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Sagar Thakur authored
BUG=none R=stichnot@chromium.org Review URL: https://codereview.chromium.org/2138383002 . Patch from Sagar Thakur <sagar.thakur@imgtec.com>.
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Srdjan Obucina authored
This patch adds handling of floating point instructions fadd, fsub, fmul and fdiv. Regarding frem, Mips32 does not have instruction that calculates partial reminder, so it has to be emulated with a set of instructions. Emulating frem will be addressed in separate patch, when floating point format conversion instructions are fully implemented. BUG= R=stichnot@chromium.org Review URL: https://codereview.chromium.org/2027773002 . Patch from Srdjan Obucina <Srdjan.Obucina@imgtec.com>.
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- 10 Jul, 2016 1 commit
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Jim Stichnoth authored
This fixes some existing problems with the Variable::LinkedTo splitting/linking mechanism. The problem was that if B is linked to A, and B needs a stack slot, but A doesn't get a stack slot, B's stack offset would never get initialized. This could happen if A ends up with no explicit references in the code, or A's live range gets truncated such that it actually has a register while B doesn't. It gets even more complicated if you have a link chain like A<--B<--C<--D etc. where some of them have stack slots (which should ultimately all be the same slot) and some don't. The solution here is that if B is linked to the root A, and B has a stack slot but A doesn't, we can do a tree rotation so that B is the new root and A links to B. In addition, we initialize Variable::StackOffset to an invalid value and always make sure a value used is valid. Earlier attempts at extending the variable splitting would sometimes silently fail because the default StackOffset value of 0 ended up being used. BUG= none R=jpp@chromium.org Review URL: https://codereview.chromium.org/2116213002 .
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- 07 Jul, 2016 2 commits
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Thomas Lively authored
Increases number of spec2k tests that run successfully with ASan from 2 to 6. BUG=https://bugs.chromium.org/p/nativeclient/issues/detail?id=4374 R=kschimpf@google.com Review URL: https://codereview.chromium.org/2128383002 .
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Mohit Bhakkad authored
R=stichnot@chromium.org Review URL: https://codereview.chromium.org/2123723002 . Patch from Mohit Bhakkad <mohit.bhakkad@imgtec.com>.
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- 06 Jul, 2016 3 commits
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Srdjan Obucina authored
This patch extends InstMIPS32Mov instruction to support different datatypes, and emit proper low level instruction depending on operands properties and data types. R=stichnot@chromium.org Review URL: https://codereview.chromium.org/2122043002 . Patch from Srdjan Obucina <Srdjan.Obucina@imgtec.com>.
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Thomas Lively authored
BUG=https://bugs.chromium.org/p/nativeclient/issues/detail?id=4374 R=kschimpf@google.com Review URL: https://codereview.chromium.org/2128643002 .
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Thomas Lively authored
BUG=https://bugs.chromium.org/p/nativeclient/issues/detail?id=4374 R=kschimpf@google.com Review URL: https://codereview.chromium.org/2115693002 .
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- 30 Jun, 2016 1 commit
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Thomas Lively authored
BUG=https://bugs.chromium.org/p/nativeclient/issues/detail?id=4374 R=kschimpf@google.com, stichnot@chromium.org Review URL: https://codereview.chromium.org/2108083002 .
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