This hasn't been used in a very long time, and there's no intention of using it again.
Originally there was the idea of a "fast" block-local register allocator for an O1-like configuration, which would allocate registers for infinite-weight temporaries during target lowering, using a "local register manager". This verbose option was for tracing execution of this register manager. However, by now it seems unlikely that this would do a better/faster job than the current Om1 register allocation approach, which reuses the linear-scan code quite effectively and does very well at separation of concerns. So adios IceV_RegManager!
BUG= none
R=jvoung@chromium.org
Review URL: https://codereview.chromium.org/831663008
