Fix ARM compilation.

src/Common/CPUID.cpp

@@ -164,10 +164,17 @@ namespace sw
 
 	static void cpuid(int registers[4], int info)
 	{
-		#if defined(_WIN32)
-			__cpuid(registers, info);
+		#if defined(__i386__) || defined(__x86_64__)
+			#if defined(_WIN32)
+				__cpuid(registers, info);
+			#else
+				__asm volatile("cpuid": "=a" (registers[0]), "=b" (registers[1]), "=c" (registers[2]), "=d" (registers[3]): "a" (info));
+			#endif
 		#else
-			__asm volatile("cpuid": "=a" (registers[0]), "=b" (registers[1]), "=c" (registers[2]), "=d" (registers[3]): "a" (info));
+			registers[0] = 0;
+			registers[1] = 0;
+			registers[2] = 0;
+			registers[3] = 0;
 		#endif
 	}
 

src/Common/CPUID.hpp

@@ -17,6 +17,10 @@
 
 namespace sw
 {
+	#if !defined(__i386__) && defined(_M_IX86)
+		#define __i386__ 1
+	#endif
+
 	#if !defined(__x86_64__) && (defined(_M_AMD64) || defined (_M_X64))
 		#define __x86_64__ 1
 	#endif

src/Common/Timer.cpp

@@ -14,6 +14,14 @@
 
 #include "Timer.hpp"
 
+#if !defined(__i386__) && defined(_M_IX86)
+	#define __i386__ 1
+#endif
+
+#if !defined(__x86_64__) && (defined(_M_AMD64) || defined (_M_X64))
+	#define __x86_64__ 1
+#endif
+
 #if defined(_WIN32)
 	#ifndef WIN32_LEAN_AND_MEAN
 		#define WIN32_LEAN_AND_MEAN
@@ -22,7 +30,9 @@
 	#include <intrin.h>
 #else
 	#include <sys/time.h>
-	#include <x86intrin.h>
+	#if defined(__i386__) || defined(__x86_64__)
+		#include <x86intrin.h>
+	#endif
 #endif
 
 namespace sw
@@ -50,10 +60,12 @@ namespace sw
 	{
 		#if defined(_WIN32)
 			return __rdtsc();
-		#else
+		#elif defined(__i386__) || defined(__x86_64__)
 			int64_t tsc;
 			__asm volatile("rdtsc": "=A" (tsc));
 			return tsc;
+		#else
+			return 0;
 		#endif
 	}
 

src/OpenGL/libEGL/Display.cpp

@@ -84,12 +84,27 @@ Display::~Display()
 	#endif
 }
 
+#if !defined(__i386__) && defined(_M_IX86)
+	#define __i386__ 1
+#endif
+
+#if !defined(__x86_64__) && (defined(_M_AMD64) || defined (_M_X64))
+	#define __x86_64__ 1
+#endif
+
 static void cpuid(int registers[4], int info)
 {
-	#if defined(_WIN32)
-		__cpuid(registers, info);
+	#if defined(__i386__) || defined(__x86_64__)
+		#if defined(_WIN32)
+			__cpuid(registers, info);
+		#else
+			__asm volatile("cpuid": "=a" (registers[0]), "=b" (registers[1]), "=c" (registers[2]), "=d" (registers[3]): "a" (info));
+		#endif
 	#else
-		__asm volatile("cpuid": "=a" (registers[0]), "=b" (registers[1]), "=c" (registers[2]), "=d" (registers[3]): "a" (info));
+		registers[0] = 0;
+		registers[1] = 0;
+		registers[2] = 0;
+		registers[3] = 0;
 	#endif
 }
 
@@ -107,10 +122,12 @@ bool Display::initialize()
 		return true;
 	}
 
-	if(!detectSSE())
-	{
-		return false;
-	}
+	#if defined(__i386__) || defined(__x86_64__)
+		if(!detectSSE())
+		{
+			return false;
+		}
+	#endif
 
 	mMinSwapInterval = 0;
 	mMaxSwapInterval = 4;

src/Reactor/LLVMReactor.cpp

@@ -37,9 +37,12 @@
 #include "Memory.hpp"
 #include "MutexLock.hpp"
 
-#include <xmmintrin.h>
 #include <fstream>
 
+#if defined(__i386__) || defined(__x86_64__)
+#include <xmmintrin.h>
+#endif
+
 #if defined(__x86_64__) && defined(_WIN32)
 extern "C" void X86CompilationCallback()
 {
@@ -5734,16 +5737,16 @@ namespace sw
 
 	RValue<Float> Rcp_pp(RValue<Float> x, bool exactAtPow2)
 	{
-		if(exactAtPow2)
-		{
-			// rcpss uses a piecewise-linear approximation which minimizes the relative error
-			// but is not exact at power-of-two values. Rectify by multiplying by the inverse.
-			return x86::rcpss(x) * Float(1.0f / _mm_cvtss_f32(_mm_rcp_ss(_mm_set_ps1(1.0f))));
-		}
-		else
-		{
-			return x86::rcpss(x);
-		}
+		#if defined(__i386__) || defined(__x86_64__)
+			if(exactAtPow2)
+			{
+				// rcpss uses a piecewise-linear approximation which minimizes the relative error
+				// but is not exact at power-of-two values. Rectify by multiplying by the inverse.
+				return x86::rcpss(x) * Float(1.0f / _mm_cvtss_f32(_mm_rcp_ss(_mm_set_ps1(1.0f))));
+			}
+		#endif
+
+		return x86::rcpss(x);
 	}
 
 	RValue<Float> RcpSqrt_pp(RValue<Float> x)
@@ -6114,16 +6117,16 @@ namespace sw
 
 	RValue<Float4> Rcp_pp(RValue<Float4> x, bool exactAtPow2)
 	{
-		if(exactAtPow2)
-		{
-			// rcpps uses a piecewise-linear approximation which minimizes the relative error
-			// but is not exact at power-of-two values. Rectify by multiplying by the inverse.
-			return x86::rcpps(x) * Float4(1.0f / _mm_cvtss_f32(_mm_rcp_ss(_mm_set_ps1(1.0f))));
-		}
-		else
-		{
-			return x86::rcpps(x);
-		}
+		#if defined(__i386__) || defined(__x86_64__)
+			if(exactAtPow2)
+			{
+				// rcpps uses a piecewise-linear approximation which minimizes the relative error
+				// but is not exact at power-of-two values. Rectify by multiplying by the inverse.
+				return x86::rcpps(x) * Float4(1.0f / _mm_cvtss_f32(_mm_rcp_ss(_mm_set_ps1(1.0f))));
+			}
+		#endif
+
+		return x86::rcpps(x);
 	}
 
 	RValue<Float4> RcpSqrt_pp(RValue<Float4> x)

src/Reactor/SubzeroReactor.cpp

@@ -66,6 +66,14 @@ namespace
 
 namespace
 {
+	#if !defined(__i386__) && defined(_M_IX86)
+		#define __i386__ 1
+	#endif
+
+	#if !defined(__x86_64__) && (defined(_M_AMD64) || defined (_M_X64))
+		#define __x86_64__ 1
+	#endif
+
 	class CPUID
 	{
 	public:
@@ -74,18 +82,29 @@ namespace
 	private:
 		static void cpuid(int registers[4], int info)
 		{
-			#if defined(_WIN32)
-				__cpuid(registers, info);
+			#if defined(__i386__) || defined(__x86_64__)
+				#if defined(_WIN32)
+					__cpuid(registers, info);
+				#else
+					__asm volatile("cpuid": "=a" (registers[0]), "=b" (registers[1]), "=c" (registers[2]), "=d" (registers[3]): "a" (info));
+				#endif
 			#else
-				__asm volatile("cpuid": "=a" (registers[0]), "=b" (registers[1]), "=c" (registers[2]), "=d" (registers[3]): "a" (info));
+				registers[0] = 0;
+				registers[1] = 0;
+				registers[2] = 0;
+				registers[3] = 0;
 			#endif
 		}
 
 		static bool detectSSE4_1()
 		{
-			int registers[4];
-			cpuid(registers, 1);
-			return (registers[2] & 0x00080000) != 0;
+			#if defined(__i386__) || defined(__x86_64__)
+				int registers[4];
+				cpuid(registers, 1);
+				return (registers[2] & 0x00080000) != 0;
+			#else
+				return false;
+			#endif
 		}
 	};
 

third_party/LLVM/lib/Support/Memory.cpp

@@ -69,7 +69,7 @@ void llvm::sys::Memory::InvalidateInstructionCache(const void *Addr,
   // FIXME: Can we safely always call this for __GNUC__ everywhere?
   char *Start = (char*) Addr;
   char *End = Start + Len;
-  __clear_cache(Start, End);
+  __builtin___clear_cache(Start, End);
 #  elif defined(__mips__)
   cacheflush((char*)Addr, Len, BCACHE);
 #  endif