Commit 47dc8676 by Nicolas Capens

Fix ARM compilation.

This does not provide full support for ARM, but merely makes things (statically) compile. Bug b/37478805 Change-Id: I01d1d84e396c04c84e74d521946595014d2eafb5 Reviewed-on: https://swiftshader-review.googlesource.com/9430Reviewed-by: 's avatarNicolas Capens <capn@google.com> Tested-by: 's avatarNicolas Capens <capn@google.com>
parent 1cc44388
...@@ -164,11 +164,18 @@ namespace sw ...@@ -164,11 +164,18 @@ namespace sw
static void cpuid(int registers[4], int info) static void cpuid(int registers[4], int info)
{ {
#if defined(__i386__) || defined(__x86_64__)
#if defined(_WIN32) #if defined(_WIN32)
__cpuid(registers, info); __cpuid(registers, info);
#else #else
__asm volatile("cpuid": "=a" (registers[0]), "=b" (registers[1]), "=c" (registers[2]), "=d" (registers[3]): "a" (info)); __asm volatile("cpuid": "=a" (registers[0]), "=b" (registers[1]), "=c" (registers[2]), "=d" (registers[3]): "a" (info));
#endif #endif
#else
registers[0] = 0;
registers[1] = 0;
registers[2] = 0;
registers[3] = 0;
#endif
} }
bool CPUID::detectMMX() bool CPUID::detectMMX()
......
...@@ -17,6 +17,10 @@ ...@@ -17,6 +17,10 @@
namespace sw namespace sw
{ {
#if !defined(__i386__) && defined(_M_IX86)
#define __i386__ 1
#endif
#if !defined(__x86_64__) && (defined(_M_AMD64) || defined (_M_X64)) #if !defined(__x86_64__) && (defined(_M_AMD64) || defined (_M_X64))
#define __x86_64__ 1 #define __x86_64__ 1
#endif #endif
......
...@@ -14,6 +14,14 @@ ...@@ -14,6 +14,14 @@
#include "Timer.hpp" #include "Timer.hpp"
#if !defined(__i386__) && defined(_M_IX86)
#define __i386__ 1
#endif
#if !defined(__x86_64__) && (defined(_M_AMD64) || defined (_M_X64))
#define __x86_64__ 1
#endif
#if defined(_WIN32) #if defined(_WIN32)
#ifndef WIN32_LEAN_AND_MEAN #ifndef WIN32_LEAN_AND_MEAN
#define WIN32_LEAN_AND_MEAN #define WIN32_LEAN_AND_MEAN
...@@ -22,7 +30,9 @@ ...@@ -22,7 +30,9 @@
#include <intrin.h> #include <intrin.h>
#else #else
#include <sys/time.h> #include <sys/time.h>
#if defined(__i386__) || defined(__x86_64__)
#include <x86intrin.h> #include <x86intrin.h>
#endif
#endif #endif
namespace sw namespace sw
...@@ -50,10 +60,12 @@ namespace sw ...@@ -50,10 +60,12 @@ namespace sw
{ {
#if defined(_WIN32) #if defined(_WIN32)
return __rdtsc(); return __rdtsc();
#else #elif defined(__i386__) || defined(__x86_64__)
int64_t tsc; int64_t tsc;
__asm volatile("rdtsc": "=A" (tsc)); __asm volatile("rdtsc": "=A" (tsc));
return tsc; return tsc;
#else
return 0;
#endif #endif
} }
......
...@@ -84,13 +84,28 @@ Display::~Display() ...@@ -84,13 +84,28 @@ Display::~Display()
#endif #endif
} }
#if !defined(__i386__) && defined(_M_IX86)
#define __i386__ 1
#endif
#if !defined(__x86_64__) && (defined(_M_AMD64) || defined (_M_X64))
#define __x86_64__ 1
#endif
static void cpuid(int registers[4], int info) static void cpuid(int registers[4], int info)
{ {
#if defined(__i386__) || defined(__x86_64__)
#if defined(_WIN32) #if defined(_WIN32)
__cpuid(registers, info); __cpuid(registers, info);
#else #else
__asm volatile("cpuid": "=a" (registers[0]), "=b" (registers[1]), "=c" (registers[2]), "=d" (registers[3]): "a" (info)); __asm volatile("cpuid": "=a" (registers[0]), "=b" (registers[1]), "=c" (registers[2]), "=d" (registers[3]): "a" (info));
#endif #endif
#else
registers[0] = 0;
registers[1] = 0;
registers[2] = 0;
registers[3] = 0;
#endif
} }
static bool detectSSE() static bool detectSSE()
...@@ -107,10 +122,12 @@ bool Display::initialize() ...@@ -107,10 +122,12 @@ bool Display::initialize()
return true; return true;
} }
#if defined(__i386__) || defined(__x86_64__)
if(!detectSSE()) if(!detectSSE())
{ {
return false; return false;
} }
#endif
mMinSwapInterval = 0; mMinSwapInterval = 0;
mMaxSwapInterval = 4; mMaxSwapInterval = 4;
......
...@@ -37,9 +37,12 @@ ...@@ -37,9 +37,12 @@
#include "Memory.hpp" #include "Memory.hpp"
#include "MutexLock.hpp" #include "MutexLock.hpp"
#include <xmmintrin.h>
#include <fstream> #include <fstream>
#if defined(__i386__) || defined(__x86_64__)
#include <xmmintrin.h>
#endif
#if defined(__x86_64__) && defined(_WIN32) #if defined(__x86_64__) && defined(_WIN32)
extern "C" void X86CompilationCallback() extern "C" void X86CompilationCallback()
{ {
...@@ -5734,17 +5737,17 @@ namespace sw ...@@ -5734,17 +5737,17 @@ namespace sw
RValue<Float> Rcp_pp(RValue<Float> x, bool exactAtPow2) RValue<Float> Rcp_pp(RValue<Float> x, bool exactAtPow2)
{ {
#if defined(__i386__) || defined(__x86_64__)
if(exactAtPow2) if(exactAtPow2)
{ {
// rcpss uses a piecewise-linear approximation which minimizes the relative error // rcpss uses a piecewise-linear approximation which minimizes the relative error
// but is not exact at power-of-two values. Rectify by multiplying by the inverse. // but is not exact at power-of-two values. Rectify by multiplying by the inverse.
return x86::rcpss(x) * Float(1.0f / _mm_cvtss_f32(_mm_rcp_ss(_mm_set_ps1(1.0f)))); return x86::rcpss(x) * Float(1.0f / _mm_cvtss_f32(_mm_rcp_ss(_mm_set_ps1(1.0f))));
} }
else #endif
{
return x86::rcpss(x); return x86::rcpss(x);
} }
}
RValue<Float> RcpSqrt_pp(RValue<Float> x) RValue<Float> RcpSqrt_pp(RValue<Float> x)
{ {
...@@ -6114,17 +6117,17 @@ namespace sw ...@@ -6114,17 +6117,17 @@ namespace sw
RValue<Float4> Rcp_pp(RValue<Float4> x, bool exactAtPow2) RValue<Float4> Rcp_pp(RValue<Float4> x, bool exactAtPow2)
{ {
#if defined(__i386__) || defined(__x86_64__)
if(exactAtPow2) if(exactAtPow2)
{ {
// rcpps uses a piecewise-linear approximation which minimizes the relative error // rcpps uses a piecewise-linear approximation which minimizes the relative error
// but is not exact at power-of-two values. Rectify by multiplying by the inverse. // but is not exact at power-of-two values. Rectify by multiplying by the inverse.
return x86::rcpps(x) * Float4(1.0f / _mm_cvtss_f32(_mm_rcp_ss(_mm_set_ps1(1.0f)))); return x86::rcpps(x) * Float4(1.0f / _mm_cvtss_f32(_mm_rcp_ss(_mm_set_ps1(1.0f))));
} }
else #endif
{
return x86::rcpps(x); return x86::rcpps(x);
} }
}
RValue<Float4> RcpSqrt_pp(RValue<Float4> x) RValue<Float4> RcpSqrt_pp(RValue<Float4> x)
{ {
......
...@@ -66,6 +66,14 @@ namespace ...@@ -66,6 +66,14 @@ namespace
namespace namespace
{ {
#if !defined(__i386__) && defined(_M_IX86)
#define __i386__ 1
#endif
#if !defined(__x86_64__) && (defined(_M_AMD64) || defined (_M_X64))
#define __x86_64__ 1
#endif
class CPUID class CPUID
{ {
public: public:
...@@ -74,18 +82,29 @@ namespace ...@@ -74,18 +82,29 @@ namespace
private: private:
static void cpuid(int registers[4], int info) static void cpuid(int registers[4], int info)
{ {
#if defined(__i386__) || defined(__x86_64__)
#if defined(_WIN32) #if defined(_WIN32)
__cpuid(registers, info); __cpuid(registers, info);
#else #else
__asm volatile("cpuid": "=a" (registers[0]), "=b" (registers[1]), "=c" (registers[2]), "=d" (registers[3]): "a" (info)); __asm volatile("cpuid": "=a" (registers[0]), "=b" (registers[1]), "=c" (registers[2]), "=d" (registers[3]): "a" (info));
#endif #endif
#else
registers[0] = 0;
registers[1] = 0;
registers[2] = 0;
registers[3] = 0;
#endif
} }
static bool detectSSE4_1() static bool detectSSE4_1()
{ {
#if defined(__i386__) || defined(__x86_64__)
int registers[4]; int registers[4];
cpuid(registers, 1); cpuid(registers, 1);
return (registers[2] & 0x00080000) != 0; return (registers[2] & 0x00080000) != 0;
#else
return false;
#endif
} }
}; };
......
...@@ -25,8 +25,10 @@ ...@@ -25,8 +25,10 @@
#include "Common/Debug.hpp" #include "Common/Debug.hpp"
#include "Reactor/Reactor.hpp" #include "Reactor/Reactor.hpp"
#include <xmmintrin.h> #if defined(__i386__) || defined(__x86_64__)
#include <emmintrin.h> #include <xmmintrin.h>
#include <emmintrin.h>
#endif
#undef min #undef min
#undef max #undef max
...@@ -3104,6 +3106,7 @@ namespace sw ...@@ -3104,6 +3106,7 @@ namespace sw
bytes -= 2; bytes -= 2;
} }
#if defined(__i386__) || defined(__x86_64__)
if(CPUID::supportsSSE()) if(CPUID::supportsSSE())
{ {
while((size_t)buffer & 0xF && bytes >= 4) while((size_t)buffer & 0xF && bytes >= 4)
...@@ -3131,6 +3134,7 @@ namespace sw ...@@ -3131,6 +3134,7 @@ namespace sw
buffer = pointer; buffer = pointer;
} }
#endif
while(bytes >= 4) while(bytes >= 4)
{ {
...@@ -3771,6 +3775,7 @@ namespace sw ...@@ -3771,6 +3775,7 @@ namespace sw
internal.format == FORMAT_X8B8G8R8 || internal.format == FORMAT_A8B8G8R8 || internal.format == FORMAT_X8B8G8R8 || internal.format == FORMAT_A8B8G8R8 ||
internal.format == FORMAT_SRGB8_X8 || internal.format == FORMAT_SRGB8_A8) internal.format == FORMAT_SRGB8_X8 || internal.format == FORMAT_SRGB8_A8)
{ {
#if defined(__i386__) || defined(__x86_64__)
if(CPUID::supportsSSE2() && (width % 4) == 0) if(CPUID::supportsSSE2() && (width % 4) == 0)
{ {
if(internal.depth == 2) if(internal.depth == 2)
...@@ -3914,6 +3919,7 @@ namespace sw ...@@ -3914,6 +3919,7 @@ namespace sw
else ASSERT(false); else ASSERT(false);
} }
else else
#endif
{ {
#define AVERAGE(x, y) (((x) & (y)) + ((((x) ^ (y)) >> 1) & 0x7F7F7F7F) + (((x) ^ (y)) & 0x01010101)) #define AVERAGE(x, y) (((x) & (y)) + ((((x) ^ (y)) >> 1) & 0x7F7F7F7F) + (((x) ^ (y)) & 0x01010101))
...@@ -4062,6 +4068,8 @@ namespace sw ...@@ -4062,6 +4068,8 @@ namespace sw
} }
else if(internal.format == FORMAT_G16R16) else if(internal.format == FORMAT_G16R16)
{ {
#if defined(__i386__) || defined(__x86_64__)
if(CPUID::supportsSSE2() && (width % 4) == 0) if(CPUID::supportsSSE2() && (width % 4) == 0)
{ {
if(internal.depth == 2) if(internal.depth == 2)
...@@ -4205,6 +4213,7 @@ namespace sw ...@@ -4205,6 +4213,7 @@ namespace sw
else ASSERT(false); else ASSERT(false);
} }
else else
#endif
{ {
#define AVERAGE(x, y) (((x) & (y)) + ((((x) ^ (y)) >> 1) & 0x7FFF7FFF) + (((x) ^ (y)) & 0x00010001)) #define AVERAGE(x, y) (((x) & (y)) + ((((x) ^ (y)) >> 1) & 0x7FFF7FFF) + (((x) ^ (y)) & 0x00010001))
...@@ -4353,6 +4362,7 @@ namespace sw ...@@ -4353,6 +4362,7 @@ namespace sw
} }
else if(internal.format == FORMAT_A16B16G16R16) else if(internal.format == FORMAT_A16B16G16R16)
{ {
#if defined(__i386__) || defined(__x86_64__)
if(CPUID::supportsSSE2() && (width % 2) == 0) if(CPUID::supportsSSE2() && (width % 2) == 0)
{ {
if(internal.depth == 2) if(internal.depth == 2)
...@@ -4496,6 +4506,7 @@ namespace sw ...@@ -4496,6 +4506,7 @@ namespace sw
else ASSERT(false); else ASSERT(false);
} }
else else
#endif
{ {
#define AVERAGE(x, y) (((x) & (y)) + ((((x) ^ (y)) >> 1) & 0x7FFF7FFF) + (((x) ^ (y)) & 0x00010001)) #define AVERAGE(x, y) (((x) & (y)) + ((((x) ^ (y)) >> 1) & 0x7FFF7FFF) + (((x) ^ (y)) & 0x00010001))
...@@ -4644,6 +4655,7 @@ namespace sw ...@@ -4644,6 +4655,7 @@ namespace sw
} }
else if(internal.format == FORMAT_R32F) else if(internal.format == FORMAT_R32F)
{ {
#if defined(__i386__) || defined(__x86_64__)
if(CPUID::supportsSSE() && (width % 4) == 0) if(CPUID::supportsSSE() && (width % 4) == 0)
{ {
if(internal.depth == 2) if(internal.depth == 2)
...@@ -4791,6 +4803,7 @@ namespace sw ...@@ -4791,6 +4803,7 @@ namespace sw
else ASSERT(false); else ASSERT(false);
} }
else else
#endif
{ {
if(internal.depth == 2) if(internal.depth == 2)
{ {
...@@ -4939,6 +4952,7 @@ namespace sw ...@@ -4939,6 +4952,7 @@ namespace sw
} }
else if(internal.format == FORMAT_G32R32F) else if(internal.format == FORMAT_G32R32F)
{ {
#if defined(__i386__) || defined(__x86_64__)
if(CPUID::supportsSSE() && (width % 2) == 0) if(CPUID::supportsSSE() && (width % 2) == 0)
{ {
if(internal.depth == 2) if(internal.depth == 2)
...@@ -5086,6 +5100,7 @@ namespace sw ...@@ -5086,6 +5100,7 @@ namespace sw
else ASSERT(false); else ASSERT(false);
} }
else else
#endif
{ {
if(internal.depth == 2) if(internal.depth == 2)
{ {
...@@ -5234,6 +5249,7 @@ namespace sw ...@@ -5234,6 +5249,7 @@ namespace sw
} }
else if(internal.format == FORMAT_A32B32G32R32F || internal.format == FORMAT_X32B32G32R32F) else if(internal.format == FORMAT_A32B32G32R32F || internal.format == FORMAT_X32B32G32R32F)
{ {
#if defined(__i386__) || defined(__x86_64__)
if(CPUID::supportsSSE()) if(CPUID::supportsSSE())
{ {
if(internal.depth == 2) if(internal.depth == 2)
...@@ -5381,6 +5397,7 @@ namespace sw ...@@ -5381,6 +5397,7 @@ namespace sw
else ASSERT(false); else ASSERT(false);
} }
else else
#endif
{ {
if(internal.depth == 2) if(internal.depth == 2)
{ {
...@@ -5529,6 +5546,7 @@ namespace sw ...@@ -5529,6 +5546,7 @@ namespace sw
} }
else if(internal.format == FORMAT_R5G6B5) else if(internal.format == FORMAT_R5G6B5)
{ {
#if defined(__i386__) || defined(__x86_64__)
if(CPUID::supportsSSE2() && (width % 8) == 0) if(CPUID::supportsSSE2() && (width % 8) == 0)
{ {
if(internal.depth == 2) if(internal.depth == 2)
...@@ -5782,6 +5800,7 @@ namespace sw ...@@ -5782,6 +5800,7 @@ namespace sw
else ASSERT(false); else ASSERT(false);
} }
else else
#endif
{ {
#define AVERAGE(x, y) (((x) & (y)) + ((((x) ^ (y)) >> 1) & 0x7BEF) + (((x) ^ (y)) & 0x0821)) #define AVERAGE(x, y) (((x) & (y)) + ((((x) ^ (y)) >> 1) & 0x7BEF) + (((x) ^ (y)) & 0x0821))
......
...@@ -69,7 +69,7 @@ void llvm::sys::Memory::InvalidateInstructionCache(const void *Addr, ...@@ -69,7 +69,7 @@ void llvm::sys::Memory::InvalidateInstructionCache(const void *Addr,
// FIXME: Can we safely always call this for __GNUC__ everywhere? // FIXME: Can we safely always call this for __GNUC__ everywhere?
char *Start = (char*) Addr; char *Start = (char*) Addr;
char *End = Start + Len; char *End = Start + Len;
__clear_cache(Start, End); __builtin___clear_cache(Start, End);
# elif defined(__mips__) # elif defined(__mips__)
cacheflush((char*)Addr, Len, BCACHE); cacheflush((char*)Addr, Len, BCACHE);
# endif # endif
......
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