Pipeline/SpirvShader: Move setActiveLaneMask()

src/Pipeline/SpirvShader.hpp

@@ -879,11 +879,6 @@ private:
 			return RValue<SIMD::Int>(storesAndAtomicsMaskValue);
 		}
 
-		void setActiveLaneMask(RValue<SIMD::Int> mask)
-		{
-			activeLaneMaskValue = mask.value;
-		}
-
 		// Add a new active lane mask edge from the current block to out.
 		// The edge mask value will be (mask AND activeLaneMaskValue).
 		// If multiple active lane masks are added for the same edge, then
@@ -1060,6 +1055,9 @@ private:
 	// Asserts if from is reachable and the edge does not exist.
 	RValue<SIMD::Int> GetActiveLaneMaskEdge(EmitState *state, Block::ID from, Block::ID to) const;
 
+	// Updates the current active lane mask.
+	void SetActiveLaneMask(RValue<SIMD::Int> mask, EmitState *state) const;
+
 	// Emit all the unvisited blocks (except for ignore) in DFS order,
 	// starting with id.
 	void EmitBlocks(Block::ID id, EmitState *state, Block::ID ignore = 0) const;

src/Pipeline/SpirvShaderControlFlow.cpp

@@ -300,7 +300,7 @@ void SpirvShader::EmitNonLoop(EmitState *state) const
 			auto inMask = GetActiveLaneMaskEdge(state, in, blockId);
 			activeLaneMask |= inMask;
 		}
-		state->setActiveLaneMask(activeLaneMask);
+		SetActiveLaneMask(activeLaneMask, state);
 	}
 
 	EmitInstructions(block.begin(), block.end(), state);
@@ -377,7 +377,7 @@ void SpirvShader::EmitLoop(EmitState *state) const
 	Nucleus::setInsertBlock(headerBasicBlock);
 
 	// Load the active lane mask.
-	state->setActiveLaneMask(loopActiveLaneMask);
+	SetActiveLaneMask(loopActiveLaneMask, state);
 
 	// Emit the non-phi loop header block's instructions.
 	for(auto insn = block.begin(); insn != block.end(); insn++)
@@ -544,20 +544,20 @@ SpirvShader::EmitResult SpirvShader::EmitSwitch(InsnIterator insn, EmitState *st
 SpirvShader::EmitResult SpirvShader::EmitUnreachable(InsnIterator insn, EmitState *state) const
 {
 	// TODO: Log something in this case?
-	state->setActiveLaneMask(SIMD::Int(0));
+	SetActiveLaneMask(SIMD::Int(0), state);
 	return EmitResult::Terminator;
 }
 
 SpirvShader::EmitResult SpirvShader::EmitReturn(InsnIterator insn, EmitState *state) const
 {
-	state->setActiveLaneMask(SIMD::Int(0));
+	SetActiveLaneMask(SIMD::Int(0), state);
 	return EmitResult::Terminator;
 }
 
 SpirvShader::EmitResult SpirvShader::EmitKill(InsnIterator insn, EmitState *state) const
 {
 	state->routine->killMask |= SignMask(state->activeLaneMask());
-	state->setActiveLaneMask(SIMD::Int(0));
+	SetActiveLaneMask(SIMD::Int(0), state);
 	return EmitResult::Terminator;
 }
 
@@ -699,4 +699,9 @@ void SpirvShader::Yield(YieldResult res) const
 	rr::Yield(RValue<Int>(int(res)));
 }
 
+void SpirvShader::SetActiveLaneMask(RValue<SIMD::Int> mask, EmitState *state) const
+{
+	state->activeLaneMaskValue = mask.value;
+}
+
 }  // namespace sw
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