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    • Sets the stage for enabling the use of the 8-bit high registers, but doesn't yet… · 5bff61c4
      Jim Stichnoth authored 
      Sets the stage for enabling the use of the 8-bit high registers, but doesn't yet turn it on because more work is needed for correctness.

In the lowering, typing is tightened up so that we don't specify e.g. eax when we really mean ax or al.  This gets rid of the ShiftHack hack.  The one exception is the pinsr instruction which always requires an r32 register even if the memory operand is m8 or m16.

The x86 assembler unit tests are fixed, by not passing a GlobalContext arg to the Assembler ctor.

Many constexpr and "auto *" upgrades are applied.  Sorry for not putting this into a separate CL - a few local fixes got out of hand...

Tested in the following ways:
- "make check-lit" - some .ll CHECK line changes due to register randomization
- "make check-xtest"
- "make check-xtest" with forced filetype=asm (via local .py hack)
- spec2k with all -filetype options
- compare before-and-after spec2k filetype=asm output - a few differences where the correct narrow register is used instead of the full-width register

To do in the next CL:

1. Add new register classes:
  (a) 32-bit GPR truncable to 8-bit (eax, ecx, edx, ebx)
  (b) 16-bit GPR truncable to 8-bit (ax, cx, dx, bx)
  (c) 8-bit truncable from 16/32-bit (al, bl, cl, dl)
  (c) 8-bit "mov"able from ah/bh/ch/dh

2. Enable use of ah/bh/ch/dh for x86-32.

3. Enable use of ah (but skip bh/ch/dh) for x86-64.

4. Statically initialize register tables in the TargetLowering subclass.

BUG= none
R=jpp@chromium.org, kschimpf@google.com

Review URL: https://codereview.chromium.org/1419903002 .
    • Subzero. ARM32. Implements the Availability Optimization. · 562233c8
      John Porto authored 
      Implements the Availability optimization:

a = b
x = f(a, c)

becomes

a = b
x = f(b, c)

This only triggers if b is an infinite-weight temporary, and it
prevents a potential spill at the cost of higher register pressure.

BUG= https://code.google.com/p/nativeclient/issues/detail?id=4076
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/1424873003 .
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