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  1. 31 Oct, 2016 1 commit
  3. 28 Oct, 2016 3 commits
  5. 26 Oct, 2016 2 commits
    • [SubZero] Fix f64 to/from i64 moves · a7979bfd
      Jaydeep Patil authored 
      The allocation of Hi/Lo part of i64 on stack has been corrected as per MIPS32 ABI. The patch also fixes ZEXT issues occurred while lowering unsigned operations.
Following tests from cross-test framework were testing successfully: (non-vector, ASM mode, Om1, O2)

mem_intrin
TotalTests=114300 Passes=114300 Failures=0

simple_loop
TotalTests=102 Passes=102 Failures=0

test_arith
TotalTests=49489704 Passes=49489704 Failures=0

test_bitmanip
TotalTests=1200 Passes=1200 Failures=0

test_cast
TotalTests=3722 Passes=3722 Failures=0

test_fcmp
TotalTests=123904 Passes=123904 Failures=0

test_global
TotalTests=270 Passes=270 Failures=0

test_icmp
TotalTests=3341520 Passes=3341520 Failures=0

test_strengthreduce
TotalTests=240 Passes=240 Failures=0

Following tests are disabled as they are either all-vectors or contain unimplemented intrinsic lowering:

test_calling_conv
test_select
test_stacksave
test_sync_atomic
test_vector_ops

There are couple of fixes to ARM32 and X86 specific files occurred due to compile-time errors.

R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/2432373002 .

Patch from Jaydeep Patil <jaydeep.patil@imgtec.com>.
    • Fix two-vector unpack case. · a3688eaf
      Nicolas Capens authored 
      Bug swiftshader:15

Change-Id: I351268b44491091c271d6c7c5b644cd21ffb623b
Reviewed-on: https://chromium-review.googlesource.com/403409Reviewed-by: 's avatarJim Stichnoth <stichnot@chromium.org>
Tested-by: 's avatarNicolas Capens <nicolascapens@google.com>
  7. 24 Oct, 2016 1 commit
  9. 21 Oct, 2016 2 commits
  11. 20 Oct, 2016 1 commit
  13. 19 Oct, 2016 4 commits
    • Implement bitcast between i32 and (emulated) v4i8. · 8b8af824
      Nicolas Capens authored 
      BUG=swiftshader:15

Change-Id: Ic795def8a914508ab0d850c846b73b343ace45de
    • Implement vector packing intrinsics. · ef8210d9
      Nicolas Capens authored 
      BUG=swiftshader:15

Change-Id: Id95a08f82c47ec20bb958358c01f389b6fb5565b
    • Fix 64-bit pointer type for non-x32 ABIs. · 32f9ccef
      Nicolas Capens authored 
      BUG=swiftshader:9

Change-Id: Ife06416736d47acba4f2cff1ea8b17be61134752
    • Subzero: Fix compiler warnings. · 7145e693
      Jim Stichnoth authored 
      src/IceTargetLoweringX86BaseImpl.h:6093:13: error: unused variable 'Src1RM' [-Werror,-Wunused-variable]
      auto *Src1RM = legalize(Src1, Legal_Reg | Legal_Mem);
            ^

src/IceTargetLoweringX86BaseImpl.h:4007:3: error: default label in switch which covers all enumeration values [-Werror,-Wcovered-switch-default]
  default:
  ^

src/IceTargetLoweringMIPS32.cpp:4065:3: error: default label in switch which covers all enumeration values [-Werror,-Wcovered-switch-default]
  default:
  ^

src/IceTargetLoweringARM32.cpp:4975:3: error: default label in switch which covers all enumeration values [-Werror,-Wcovered-switch-default]
  default:
  ^

BUG= none
R=capn@chromium.org

Review URL: https://codereview.chromium.org/2434643002 .
  15. 18 Oct, 2016 2 commits
  17. 17 Oct, 2016 5 commits
  19. 16 Oct, 2016 2 commits
  21. 12 Oct, 2016 1 commit
  23. 07 Oct, 2016 4 commits
  25. 06 Oct, 2016 1 commit
  27. 05 Oct, 2016 1 commit
    • Subzero, MIPS32: Fix conditional mov instructions · afe5fe22
      Stefan Maksimovic authored 
      This patch implements changes needed for conditional mov instructions
to fix problem with failing crosstest and invalid register allocation.
Problem is visible from icmp test examples, causing cross test for icmp
to fail. Eg:

Incorrect, before this change:
674:	00653026	xor	a2,v1,a1
678:	00a3182b	sltu	v1,a1,v1
67c:	0082102b	sltu	v0,a0,v0
680:	0043180a	movz	v1,v0,v0

Correct, aftrer this change:
674:	00653026	xor	a2,v1,a1
678:	00a3182b	sltu	v1,a1,v1
67c:	0082102b	sltu	v0,a0,v0
680:	0046180a	movz	v1,v0,a2

R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/2394773004 .

Patch from Stefan Maksimovic <makdstefan@gmail.com>.
  29. 03 Oct, 2016 2 commits
    • Subzero: Remove --skip-unimplemented from ARM lit tests. · 033dda7e
      Jim Stichnoth authored 
      ARM support is complete, so clean up some of the lit tests:

1. Remove --skip-unimplemented
2. Use --filetype=obj instead of =asm, and remove --assemble
3. Remove --need=allow_dump requirement
4. Remove related TODOs.
5. Fix some CHECK lines because objdump output is slightly different from filetype=asm output.

BUG= none
R=jpp@chromium.org

Review URL: https://codereview.chromium.org/2384983002 .
    • [SubZero] Vector types support for MIPS · 958ddb75
      Jaydeep Patil authored 
      This patch implements vector operations on MIPS32 using VariableVecOn32 method (on the lines of Variable64On32).
Vector operations are scalarized prior to lowering. Each vector variable is split into 4 containers to hold a variable of vector type.
For MIPS32, four GP/FP registers are used to hold a vector variable. Arguments are passed in GP registers irrespective of the type of the vector variable.

Lit test vector-mips.ll has been added to test this implementation.

R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/2380023002 .

Patch from Jaydeep Patil <jaydeep.patil@imgtec.com>.
  31. 29 Sep, 2016 3 commits
  33. 28 Sep, 2016 4 commits
  35. 27 Sep, 2016 1 commit