BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/1432413003 .

This CL passes in context from the ARM target lowering, so that
it can figure out what register (SP or FP) and offset to use
when loading/storing variables.

BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/1414043015 .

Partition allocas that occur in the entry block into two categories.  The first is those whose size is fixed and alignment are less than or equal to the stack alignment.  These are emitted relative to a pointer, either in increasing offset relative to the stack pointer or decreasing offset relative to the frame pointer.  (Actually, we are not enabling this optimization for frame pointer frames yet)  The second category is allocas whose size is dynamic or alignment is creater than the stack alignment.  These are emitted relative to a user variable in increasing offset order.  This optimization is only enabled for x86 at O2.

BUG=
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/1411583007 .

Extends assembler movw method to handle integer constants in addition
to relocatable constants, since (32-bit) integer constants are
frequently used in movw instructions.

BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/1440693002 .

Improves the bool folding logic so that branches are short circuited.

BUG= https://code.google.com/p/nativeclient/issues/detail?id=4076
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/1417393003 .

Removes blank line after push instructions.

BUG=None
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/1439683002 .

Fold and/or followed by branch to eliminate cmp.  Also, fold fcmp instructions into branches similarly to what was done for icmp instructions.

BUG=
R=jpp@chromium.org, stichnot@chromium.org

Review URL: https://codereview.chromium.org/1436623002 .

Originally, for each non-deleted instruction, CfgNode::emit() would call the virtual Inst::emit() and then print a newline (also printing end-of-live-range info as necessary).  This resulted in clumsy blank lines in the asm output, corresponding to non target specific pseudo instructions such as FakeDef, FakeUse, FakeKill.

We change this so that CfgNode::emit() only prints a newline for an InstTarget subclass, or if any end-of-live-range text was printed.

If a high-level instruction still wants to emit something in a comment, it's responsible for printing its own newline.

BUG= none
TEST= ./pydir/szbuild_spec2k.py -O2 --force -v --filetype=asm --sz=--asm-verbose=0
TEST= ./pydir/szbuild_spec2k.py -O2 --force -v --filetype=asm --sz=--asm-verbose=1
TEST= ./pydir/szbuild_spec2k.py -O2 --force -v --filetype=asm --target=arm32
R=kschimpf@google.com

Review URL: https://codereview.chromium.org/1431353003 .

BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=jpp@chromium.org, stichnot@chromium.org

Review URL: https://codereview.chromium.org/1433743002 .

This enables the following workflow:

1. Run "szbuild.py --filetype=asm ..." to generate a .s file.
2. Edit the .s file to mock up a Subzero change.
3. Run "szbuild.py --filetype=asm --no-sz ..." to restart the build post pnacl-sz.

This workflow is good for trying out localized changes to hot basic blocks, though it isn't really appropriate for global optimizations like register allocation.

BUG= none
R=kschimpf@google.com

Review URL: https://codereview.chromium.org/1417003005 .

BUG=
R=jpp@chromium.org, stichnot@chromium.org

Review URL: https://codereview.chromium.org/1430273004 .

Patch from Reed Kotler <rkotlerimgtec@gmail.com>.

BUG= https://code.google.com/p/nativeclient/issues/detail?id=4076
R=kschimpf@google.com, stichnot@chromium.org

Review URL: https://codereview.chromium.org/1422753010 .

Also formatted IceCfg.cpp, since it needed it.

BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/1422253003 .

First, the width was not being correctly defined for non-vector
instructions.

Second, the order of the width/condition was incorrect when the
instruction was prefixed with a V. That is, for V prefixed instructions,
the order is predicate/width while for non-V prefixed instructions the
order is width/predicate.

Also fixes bug in target lowering that did not always convert results
of a compare to i1.

BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/1415953007 .

Sets up additional register attributes, plus the notion of register classes, to enable robust usage of the high 8-bit GPRs (ah/bh/ch/dh), for both x86-32 and x86-64.  (Note that the x86-64 changes are currently untested.)

We add a Register Class field to the Variable class.  The default register class is a value corresponding to the variable's type, but the target can extend the set of register class values, and the target lowering can assign different register classes as needed.  The register allocator uses the register class instead of the type to determine the set of registers to draw from.

For x86-64, the high 8-bit registers are not included in the general register allocation pool, but there are explicit references to ah for lowering the div/rem instructions.

The target lowering is modified as needed to make sure types are appropriate and register use in instructions is legalized.

Some other fixes and cleanups are included in this CL:

* Makefile.standalone changes.  Source files are reordered so that the more expensive compiles are done earlier, speeding up parallel builds by decreasing fragmentation.  A dependency error is fixed for check-spec.

* A bug is fixed in advanced phi lowering.  When a temporary is introduced to break a cycle, we were neglecting to updated the predecessor count for one of the operands, leading to an assertion failure.  (Applying that fix to master resulted in no changes to spec2k code generation.)  A consistency check is added to help find future problems like this.  Also, refactored iteration over the Phi descriptor array to use range-based for loops and avoid directly indexing the array.

* Removed most of the "IceType_" prefixes in x-macro tables for brevity.

* Fix a correctness TODO in the register allocator.  This had no effect on spec2k code generation in master or in this CL, so we were probably just lucky.

* Made some much-needed s/Dest->getType()/Ty/ changes for brevity, in the target lowering sections that needed other changes.

BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4095
R=jpp@chromium.org

Review URL: https://codereview.chromium.org/1427973003 .

When a temporary is introduced to break a cycle, we neglected to update the predecessor count for one of the operands, leading to a possible assertion failure.

This problem isn't currently seen in master, but it arises when we enable register aliases, as in https://codereview.chromium.org/1427973003/ .  No changes are seen in spec2k code generation as a result of this fix.

A consistency check is added to help find future problems like this.

Also, refactored iteration over the Phi descriptor array to use range-based for loops and avoid directly indexing the array.

BUG= none
R=jpp@chromium.org

Review URL: https://codereview.chromium.org/1435543002 .

BUG= none
R=jpp@chromium.org

Review URL: https://codereview.chromium.org/1416113007 .

Split allocas in the entry block into two categories.  The first has alignment <= stack alignment and constant size.  The second violates one or both of those conditions.  Sort both of these lists in descending alignment order and emit.  Also, compute the need for a frame pointer during the pass.

BUG=
R=jpp@chromium.org, stichnot@chromium.org

Review URL: https://codereview.chromium.org/1414343010 .

BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/1412963008 .

The integrated ARM assembler was incorrectly assuming that an
(instruction) label defines a corresponding assembler instruction.
Therefore, placement into the buffer was incorrect.

This CL fixes this mistake. This fixes assembler translator problems
with ARM branch, movw, and movt instructions.

BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/1430973003 .

This is basically the same patch as for ARM issue 1127003003

https://codereview.chromium.org/1127003003

BUG= https://code.google.com/p/nativeclient/issues/detail?id=4167
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/1414383004 .

Patch from Reed Kotler <rkotlerimgtec@gmail.com>.

BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/1429073005 .

Previously, the code assumed that the emit() method of all ARM
instructions emitted a single instruction. This is false. Instructions
like PUSH and POP may generate multiple instructions.

This is only a problem when the hybrid ARM assembler reverts back to
using the stand-alone assembler to generate instructions the
integrated assembler can't handle.

The fix is to add infrastructure to allow ARM instructions to
communicate to the assembler, the number of instructions they
generate, so that the correct-sized filler is added to the assembly
buffer.

This fixes all cross-test failures for (pc-relative) branches, except
one.

BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/1426513004 .

Each TargetLowering subclass has several fields (generally register allocation related) that are initialized to the same values every time a TargetLowering object is created.  These fields are essentially const once initialized, so there is no reason to repeatedly initialize them.

The solution is to make them static fields, and statically initialize them at program startup.

This also makes it practical to access such fields without needing a TargetLowering object.

There are likely more items that should also get this treatment, but those can be changed later.

The staticInit() method needs a run-once guard because the unit tests actually cause it to be called more than once.

BUG= none
R=kschimpf@google.com

Review URL: https://codereview.chromium.org/1418853005 .

Also cleans up instructions that use emitType01 to share more common
code.

BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/1413473005 .

BUG=
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/1421603003 .

BUG= https://code.google.com/p/nativeclient/issues/detail?id=4076
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/1414883007 .

When translating an Variable without a register, the code assumes the
variable is on the stack using sp. This is still true. However, if it
is a (derived class) StackVariable, the register defined by
getBaseRegNum() should be used instead.

BUG= https://code.google.com/p/nativeclient/issues/detail?id=4334
R=jpp@chromium.org, stichnot@chromium.org

Review URL: https://codereview.chromium.org/1432453003 .

It turns out that there are several instruction in the ARM integrated
assembler that do not get translated correctly. This results in the
spec2k tests not being compilable.

To workaround this problem, this CL adds a (temporary) flag that allows all translations to be applied by the integrated assembler. When this flag is false (the default) only correctly working translations to be applied by the integrated assembler. This allows lit tests to still be applied to the correct portions of broken translations.

This CL also fixes a bug with local (instruction) labels that did not
generate a corresponding label to the -filetype=iasm assembly file.

BUG= https://code.google.com/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/1424923005 .

BUG= https://code.google.com/p/nativeclient/issues/detail?id=4334
R=jpp@chromium.org, stichnot@chromium.org

Review URL: https://codereview.chromium.org/1415943009 .

"make -f Makefile.standalone check-spec" will translate and run all the spec2k components for a given target.

The advantages are that this can be done all within the subzero directory, and the spec components can be run in parallel via "make -j" (particularly helpful for arm32/qemu).

Default target is x8632, and arm32 is also available.

Example:

  make -j32 -f Makefile.standalone check-spec TARGET=arm32 SPEC="-O2 --filetype=iasm"

Also removes unnecessary tab characters from the makefile, fixes >80-column lines, and gives more consistent indentation.

BUG= none
R=jpp@chromium.org

Review URL: https://codereview.chromium.org/1413033009 .

If the alloca alignment exceeds the known ABI stack alignment, the lowering sequence adds an "and esp, xxx" instruction.  In this case, the esp adjustment is no longer statically known, so we must force an ebp-based frame.

BUG= none
R=sehr@google.com

Review URL: https://codereview.chromium.org/1426933003 .

BUG= https://code.google.com/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/1403403009 .

BUG=None
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/1425243002 .

Also cleans up comments on rotated immediate 8 constants.

BUG= https://code.google.com/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/1414483008 .

BUG= https://code.google.com/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/1427023004 .

Somehow missed this in https://codereview.chromium.org/1419173006 .

BUG= none
R=kschimpf@google.com

Review URL: https://codereview.chromium.org/1410813004 .

Also clean up some comments on where code was moved from in Dart
sourced.

BUG= https://code.google.com/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/1429003002 .

BUG=None
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/1424353003 .

This makes it easier to copy the commands and run them manually.

BUG= none
R=kschimpf@google.com

Review URL: https://codereview.chromium.org/1419173006 .