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  1. 19 Oct, 2016 2 commits
    • Fix 64-bit pointer type for non-x32 ABIs. · 32f9ccef
      Nicolas Capens authored 
      BUG=swiftshader:9

Change-Id: Ife06416736d47acba4f2cff1ea8b17be61134752
    • Subzero: Fix compiler warnings. · 7145e693
      Jim Stichnoth authored 
      src/IceTargetLoweringX86BaseImpl.h:6093:13: error: unused variable 'Src1RM' [-Werror,-Wunused-variable]
      auto *Src1RM = legalize(Src1, Legal_Reg | Legal_Mem);
            ^

src/IceTargetLoweringX86BaseImpl.h:4007:3: error: default label in switch which covers all enumeration values [-Werror,-Wcovered-switch-default]
  default:
  ^

src/IceTargetLoweringMIPS32.cpp:4065:3: error: default label in switch which covers all enumeration values [-Werror,-Wcovered-switch-default]
  default:
  ^

src/IceTargetLoweringARM32.cpp:4975:3: error: default label in switch which covers all enumeration values [-Werror,-Wcovered-switch-default]
  default:
  ^

BUG= none
R=capn@chromium.org

Review URL: https://codereview.chromium.org/2434643002 .
  3. 18 Oct, 2016 2 commits
  5. 17 Oct, 2016 5 commits
  7. 16 Oct, 2016 2 commits
  9. 12 Oct, 2016 1 commit
  11. 07 Oct, 2016 4 commits
  13. 06 Oct, 2016 1 commit
  15. 05 Oct, 2016 1 commit
    • Subzero, MIPS32: Fix conditional mov instructions · afe5fe22
      Stefan Maksimovic authored 
      This patch implements changes needed for conditional mov instructions
to fix problem with failing crosstest and invalid register allocation.
Problem is visible from icmp test examples, causing cross test for icmp
to fail. Eg:

Incorrect, before this change:
674:	00653026	xor	a2,v1,a1
678:	00a3182b	sltu	v1,a1,v1
67c:	0082102b	sltu	v0,a0,v0
680:	0043180a	movz	v1,v0,v0

Correct, aftrer this change:
674:	00653026	xor	a2,v1,a1
678:	00a3182b	sltu	v1,a1,v1
67c:	0082102b	sltu	v0,a0,v0
680:	0046180a	movz	v1,v0,a2

R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/2394773004 .

Patch from Stefan Maksimovic <makdstefan@gmail.com>.
  17. 03 Oct, 2016 2 commits
    • Subzero: Remove --skip-unimplemented from ARM lit tests. · 033dda7e
      Jim Stichnoth authored 
      ARM support is complete, so clean up some of the lit tests:

1. Remove --skip-unimplemented
2. Use --filetype=obj instead of =asm, and remove --assemble
3. Remove --need=allow_dump requirement
4. Remove related TODOs.
5. Fix some CHECK lines because objdump output is slightly different from filetype=asm output.

BUG= none
R=jpp@chromium.org

Review URL: https://codereview.chromium.org/2384983002 .
    • [SubZero] Vector types support for MIPS · 958ddb75
      Jaydeep Patil authored 
      This patch implements vector operations on MIPS32 using VariableVecOn32 method (on the lines of Variable64On32).
Vector operations are scalarized prior to lowering. Each vector variable is split into 4 containers to hold a variable of vector type.
For MIPS32, four GP/FP registers are used to hold a vector variable. Arguments are passed in GP registers irrespective of the type of the vector variable.

Lit test vector-mips.ll has been added to test this implementation.

R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/2380023002 .

Patch from Jaydeep Patil <jaydeep.patil@imgtec.com>.
  19. 29 Sep, 2016 3 commits
  21. 28 Sep, 2016 4 commits
  23. 27 Sep, 2016 5 commits
  25. 25 Sep, 2016 1 commit
  27. 23 Sep, 2016 3 commits
  29. 22 Sep, 2016 3 commits
  31. 21 Sep, 2016 1 commit