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  1. 16 Oct, 2016 1 commit
  3. 12 Oct, 2016 1 commit
  5. 07 Oct, 2016 4 commits
  7. 06 Oct, 2016 1 commit
  9. 05 Oct, 2016 1 commit
    • Subzero, MIPS32: Fix conditional mov instructions · afe5fe22
      Stefan Maksimovic authored 
      This patch implements changes needed for conditional mov instructions
to fix problem with failing crosstest and invalid register allocation.
Problem is visible from icmp test examples, causing cross test for icmp
to fail. Eg:

Incorrect, before this change:
674:	00653026	xor	a2,v1,a1
678:	00a3182b	sltu	v1,a1,v1
67c:	0082102b	sltu	v0,a0,v0
680:	0043180a	movz	v1,v0,v0

Correct, aftrer this change:
674:	00653026	xor	a2,v1,a1
678:	00a3182b	sltu	v1,a1,v1
67c:	0082102b	sltu	v0,a0,v0
680:	0046180a	movz	v1,v0,a2

R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/2394773004 .

Patch from Stefan Maksimovic <makdstefan@gmail.com>.
  11. 03 Oct, 2016 2 commits
    • Subzero: Remove --skip-unimplemented from ARM lit tests. · 033dda7e
      Jim Stichnoth authored 
      ARM support is complete, so clean up some of the lit tests:

1. Remove --skip-unimplemented
2. Use --filetype=obj instead of =asm, and remove --assemble
3. Remove --need=allow_dump requirement
4. Remove related TODOs.
5. Fix some CHECK lines because objdump output is slightly different from filetype=asm output.

BUG= none
R=jpp@chromium.org

Review URL: https://codereview.chromium.org/2384983002 .
    • [SubZero] Vector types support for MIPS · 958ddb75
      Jaydeep Patil authored 
      This patch implements vector operations on MIPS32 using VariableVecOn32 method (on the lines of Variable64On32).
Vector operations are scalarized prior to lowering. Each vector variable is split into 4 containers to hold a variable of vector type.
For MIPS32, four GP/FP registers are used to hold a vector variable. Arguments are passed in GP registers irrespective of the type of the vector variable.

Lit test vector-mips.ll has been added to test this implementation.

R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/2380023002 .

Patch from Jaydeep Patil <jaydeep.patil@imgtec.com>.
  13. 29 Sep, 2016 3 commits
  15. 28 Sep, 2016 4 commits
  17. 27 Sep, 2016 5 commits
  19. 25 Sep, 2016 1 commit
  21. 23 Sep, 2016 3 commits
  23. 22 Sep, 2016 3 commits
  25. 21 Sep, 2016 1 commit
  27. 20 Sep, 2016 4 commits
  29. 19 Sep, 2016 3 commits
  31. 18 Sep, 2016 2 commits
    • Subzero, MIPS32: Floating point support in ELF output · 132ea7a5
      Srdjan Obucina authored 
      Patch implements improvements and instruction encodings for many COP1 instructions for handling floating point values.

Patch covers load, store, basic arithmetic, data movement for FPR<->FPR, GPR<->FPR, FPR<->GPR, and format conversion instructinos.

Added instruction encodings:
Load: lb, lh, lwc1, ldc1
Store: sb, sh, swc1, sdc1
FP arith: abs_d, abs_s, add_d, add_s, div_d, div_s, mul_d, mul_s, sqrt_d, sqrt_s, sub_d, sub_s
FP movs: mfc1, mov_d, mov_s, movn_d, movn_s, movz_d, movz_s, mtc1
Conversion: cvt_d_l, cvt_d_s, cvt_d_w, cvt_s_d, cvt_s_l, cvt_s_w, trunc_l_d, trunc_l_s, trunc_w_d, trunc_w_s

R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/2341713003 .

Patch from Srdjan Obucina <Srdjan.Obucina@imgtec.com>.
    • Subzero, MIPS32: nacl-other-intrinsics-mips merged to original file · 40fc8193
      Srdjan Obucina authored 
      With fix related to stack alignment bytes increasing, it is
possible to return mips tests from nacl-other-intrinsics-mips
to its original place. However, with existing vector test, O2 test
had to be turned off. This does not affect anything imortant,
because it only tested one case (test_sqrt_ignored).

R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/2342083003 .

Patch from Srdjan Obucina <Srdjan.Obucina@imgtec.com>.
  33. 16 Sep, 2016 1 commit