BUG=
R=kschimpf@google.com, stichnot@chromium.org

Review URL: https://codereview.chromium.org/1661193004 .

Following the newer convention enhances readability and in addition this is a prelude to some macro changes in unimplemented I would like to make in order to simplify that code.

BUG=
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/1667553002 .

Patch from Reed Kotler <rkotlerimgtec@gmail.com>.

BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/1665593002 .

BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=eholk@chromium.org, stichnot@chromium.org

Review URL: https://codereview.chromium.org/1655363002 .

This CL allows ConstantRelocatables in to Subzero
have symbolic constants. A symbolic constant is an
assembly label whose value is not known during
lowering, but it is well defined during code
emission.

For example, the following code is now possible in Subzero:

foo:
  push $foo.bar
  jmp target
  nop
  nop
foo.bar:
  ...

BUG=
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/1651163002 .

BUG=None
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/1658423002 .

Adds the non-vector forms of fabs.

BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=eholk@chromium.org, stichnot@chromium.org

Review URL: https://codereview.chromium.org/1657193003 .

Also simplify several switch statements by replacing type entries with
default.

BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334

Review URL: https://codereview.chromium.org/1661633002 .

BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=jpp@chromium.org, stichnot@chromium.org

Review URL: https://codereview.chromium.org/1657353002 .

BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/1651263002 .

Fixes generation of emit text fixup code in integrated ARM assembler to
properly reset the text fixup flag when skipping unimplemented
instructions.

Also fixes broken assertion for the "vmul" instruction.

BUG=None
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/1656023002 .

Replaces the hacky implementation with essentially the less hacky x86-64 implementation, minus the i64 handling.

Also does a couple of cleanups on the x86-64 side, including removing special-casing for rbp.

BUG= none
R=jpp@chromium.org

Review URL: https://codereview.chromium.org/1657833002 .

This patch is a MIPS version of this part of ARM patch:
https://codereview.chromium.org/1151663004/

BUG=
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/1640913004 .

Patch from Reed Kotler <rkotlerimgtec@gmail.com>.

Fixes readability of error messages, based on comment in CL:

   https://codereview.chromium.org/1652173002

BUG=None
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/1654803003 .

BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/1652173002 .

This CL implements two little pieces of the lowering that are needed
for --filetype=obj support in arm. With this change, spec2k builds and
verifies with --filetype=obj

BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4076
R=kschimpf@google.com, stichnot@chromium.org

Review URL: https://codereview.chromium.org/1651603003 .

This is the same as the fix that https://codereview.chromium.org/1531623007 (b19d39cc) made to the same file.

Otherwise the broken x86-32 implementation of getGprForType() gives an assertion failure.

BUG= none
R=eholk@chromium.org

Review URL: https://codereview.chromium.org/1643383002 .

Fixes issues raised after committing the following CLs:

    https://codereview.chromium.org/1649053002
    https://codereview.chromium.org/1647113003

Also generates a trap instruction if hybrid assembly is turned off, and
the skip implementation command line flag is turned on.

BUG=None
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/1654483002 .

Note: Once this CL has landed, Subzero's "make -f Makeefile.standalone
check-spec" works in the integrated assembler without using hybrid
assembly.

BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=jpp@chromium.org

Review URL: https://codereview.chromium.org/1649053002 .

Also fixes the non-hybrid ARM assembler to display the instruction it
can't translate, making it easier to see what can't be handled. This
change was added to see what still isn't being translated in spec2k
performance tests.

BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=jpp@chromium.org

Review URL: https://codereview.chromium.org/1647113003 .

Implements moves between double and i64. It also completes the
implementation of the IR "move" instruction, except for vectors.

BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=eholk@chromium.org, jpp@chromium.org, stichnot@chromium.org

Review URL: https://codereview.chromium.org/1642253002 .

BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=jpp@chromium.org, stichnot@chromium.org

Review URL: https://codereview.chromium.org/1642303002 .

The problem is that if you too aggressively -reg-use or -reg-exclude, you can get failures because of inherently high register pressure, and there are also contributions from the "specialty" register classes.

For example, when you combine load optimization, address mode inference, local register availability optimization, and the div instruction, you can end up needing 5 simultaneously live infinite-weight registers.

The fix/enhancement here is to keep track of the "reserve" set of registers for each register class, and allow the register allocator to draw from that as a last resort.  This behavior is guarded by the -reg-reserve flag.

This CL also includes two improvements in lowering sequences to reduce register pressure.

BUG= none
R=kschimpf@google.com

Review URL: https://codereview.chromium.org/1641653004 .

BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4076
R=kschimpf@google.com

Review URL: https://codereview.chromium.org/1646033002 .

BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4076
R=kschimpf@google.com

Review URL: https://codereview.chromium.org/1640933002 .

See CL https://codereview.chromium.org/1645683003

BUG=None
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/1641753003 .

Adds vmovrs that implements moving from an integer (GP) register and a
float (S) register to the integrated ARM assembler.

The test also shows that moving from a float (S) register to an
integer (GP) register also works.

BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=eholk@chromium.org, stichnot@chromium.org

Review URL: https://codereview.chromium.org/1647683002 .

BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4076
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/1639403004 .

R=jpp@chromium.org

Review URL: https://codereview.chromium.org/1639063002 .

Adds generating binary versions of vmov for moves between floating
point registers, in the integrated ARM assembler.

Also adds simple lit test. Also simplifies the lit test for push/pop
(which had to be changed anyway since it included vmov instructions as
well).

BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=eholk@chromium.org, jpp@chromium.org

Review URL: https://codereview.chromium.org/1645683003 .

BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4076
R=jpp@chromium.org, kschimpf@google.com

Review URL: https://codereview.chromium.org/1637173002 .

This CL also changes UnimplementedLoweringError to display the name of
the unimplemented instruction.

Improve test coverage for ARM32 vector load instructions.

BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4076
R=jpp@chromium.org, kschimpf@google.com

Review URL: https://codereview.chromium.org/1639923002 .

These were all pointed out by the llvm test suite, the gcc torture
tests, and the scons tests.

BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4077
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/1631383002 .

BUG=
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/1574883002 .

Patch from Reed Kotler <rkotlerimgtec@gmail.com>.

Fixes case where IceTargetLowring.cpp and IceInstARM32.cpp generate
implementations for emitIAS().

BUG=None
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/1638123002 .

Adds the scalar floating point versions of instruction VMLA to the
integrated ARM assembler.

BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=jpp@chromium.org, stichnot@chromium.org

Review URL: https://codereview.chromium.org/1634913005 .

BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4077
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/1616103002 .

Adds the vmovs/vmovd instructions to the integerated ARM assembler.

BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/1624383004 .

BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4076
R=jpp@chromium.org

Review URL: https://codereview.chromium.org/1635713002 .

Cleans up the integrated ARM assembler, and its handling of register
memory addresses that can be modified by an immediate value. Handles
each possible encoding of such memory addresses.

Also adds assertions to check that the immediate value has the proper
range for the immediate value, based on the corresponding encoding.

BUG=None
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/1630863002 .