1. 10 Feb, 2016 4 commits
    • Subzero: Use a proper RegNumT type instead of int32_t/SizeT. · 8aa39661
      Jim Stichnoth authored
      Originally, register numbers were represented explicitly as int32_t, particularly so that -1 (or negative values in general) could be used as a NoRegister sentinel value.  This created two problems:
      
      1. It would be better to use a unique name for the type, to distinguish from other explicit int32_t uses such as stack offsets.
      
      2. Apart from NoRegister, register number values ultimately come from unsigned sources like enum values and bitvector positions.  This results in a number of clumsy casts to remove compiler warnings.
      
      This creates a simple RegNumT class to manage this.  It also deletes ordered comparison operators to help catch errors where particular register number orderings are assumed (as opposed to orderings of the encoded register values).
      
      In addition, it creates a RegNumBitVector wrapper class that makes it much cleaner to do range-based for loops over bit vectors that represent RegNumT sets.
      
      BUG= none
      R=eholk@chromium.org, jpp@chromium.org
      
      Review URL: https://codereview.chromium.org/1676123002 .
    • Fix bug in arith.ll (ARM) tests. · 47898280
      Karl Schimpf authored
      CL https://codereview.chromium.org/1687553002 introduced a bug when
      running:
      
         make -f Makefile.standalone check-lit FORCEASM=1
      
      The cause of the problem is the way options "--asemble --disassemble"
      work in run-pnacl-sz.py. When compiling using "--filetype=asm", the
      assembler writes:
      
         .word 0xe7fedef0
      
      The output after assembly/disassembly is the same as above.
      
      On the other hand, when compiling using "--filetype=iasm", the assembler
      writes:
      
         .byte 0xe7
         .byte 0xfe
         .byte 0xde
         .byte 0xf0
      
      While the same sequence of bytes is assembled, the dissassembly for the
      latter generates assembly instruction:
      
          udf #60896 ; 0xede0
      
      The fix is to not check the generated disassembled instructions. Rather,
      have it check if the same word is associated with the assembly
      instruction.
      
      Longer term, we should fix the several different ways --filetype=asm
      introduces this instruction to match the "udf ..." output.
      
      BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4076
      R=stichnot@chromium.org
      
      Review URL: https://codereview.chromium.org/1682253003 .
    • ARM32 vector division lowering. · cfc25533
      Eric Holk authored
      Enables vector division by scalarization.
      
      Also, removed an assert as suggested by Karl in a previous CL:
      https://codereview.chromium.org/1646033002/diff/1/src/IceInstARM32.cpp#newcode717
      
      BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4076
      R=stichnot@chromium.org
      
      Review URL: https://codereview.chromium.org/1681003002 .
    • Subzero: Fix trailing whitespace errors. · fbdc7e4c
      Jim Stichnoth authored
      To view the non-whitespace changes in this CL:
      
        git cl patch -b testbranch 1678133003
        git diff -w --ignore-blank-lines -b master
      
      Such changes are only in gen_arm32_reg_tables.py and IceInst.cpp.
      
      There are lots of tab characters in .ll files that shouldn't be there, but fixing them would require some thought about how to do consistent formatting, so that's left for later.
      
      BUG= none
      R=eholk@chromium.org, kschimpf@google.com
      
      Review URL: https://codereview.chromium.org/1678133003 .
  2. 09 Feb, 2016 3 commits
  3. 08 Feb, 2016 1 commit
  4. 07 Feb, 2016 1 commit
    • Subzero: Clean up some uses of *_cast<>. · 2d6c8267
      Jim Stichnoth authored
      Some casts to size_t for use as array indexes are simply unnecessary.
      
      Some explicit declaration types are changed to "auto" to avoid redundancy with the static_cast type.
      
      A few llvm::dyn_cast<> operations are changed to llvm::cast<>, and vice versa.
      
      A few explicit declaration types are changed to "auto" when used with llvm::cast<> and llvm::dynamic_cast<>.  Some of these were missed during an earlier cleansing because of multi-line issues.
      
      There are still a few opportunities related to Variable register numbers, but they are ignored for now because they are being addressed in another CL.
      
      BUG= none
      R=jpp@chromium.org
      
      Review URL: https://codereview.chromium.org/1674033002 .
  5. 05 Feb, 2016 4 commits
    • Subzero: Fix a mul lowering error. · 28df6bad
      Jim Stichnoth authored
      The low-level mul instruction may produce results in a register pair where one register is the explicit dest of the instruction, and the other register is defined through a FakeDef.  If the FakeDef portion is ultimately unused, the FakeDef gets dead-code eliminated, and the register allocator doesn't know that the mul instruction affects the other register.
      
      On x86, this can silently produce incorrect code.  On ARM, the emitter complains that the explicitly represented second dest variable does not have a register.
      
      The fix is to add a FakeUse of the FakeDef'd register.  Unfortunately, this prevents the low-level mul instruction from ever being dead-code eliminated, but that's probably OK because it should have been eliminated at the high level.
      
      BUG= none
      R=eholk@chromium.org
      
      Review URL: https://codereview.chromium.org/1678523002 .
    • Subzero: Improve an error message. · 45bec54f
      Jim Stichnoth authored
      Add the variable name and function name to the fatal error message.
      
      BUG= none
      R=kschimpf@google.com
      
      Review URL: https://codereview.chromium.org/1677593003 .
    • Subzero: Cleanup Inst==>Instr. · 8cfeb69e
      Jim Stichnoth authored
      In the beginning, Ice::Inst was called IceInst, and patterns like "IceInst *Inst = ..." made perfect sense.
      
      After the Ice:: name change, "Inst *Inst = ..." continued to compile, mostly.
      
      However, shadowing a type name is clumsy and newer code tends to use "Inst *Instr", so we might as well switch all the instances over.
      
      Some are still called "I" and those are left alone.
      
      BUG= none
      R=kschimpf@google.com
      
      Review URL: https://codereview.chromium.org/1665423002 .
    • Clean up assembling MOV instructions in the integrated ARM assembler. · 282d7afd
      Karl Schimpf authored
      Flattens out MOV's emitIAS methods making it easier to see valid types
      for source/destination of the move.
      
      BUG=None
      R=stichnot@chromium.org
      
      Review URL: https://codereview.chromium.org/1665323002 .
  6. 04 Feb, 2016 4 commits
  7. 03 Feb, 2016 3 commits
  8. 02 Feb, 2016 9 commits
  9. 01 Feb, 2016 5 commits
  10. 29 Jan, 2016 5 commits
  11. 28 Jan, 2016 1 commit